[PATCH 0/5] meson: add clk and adc support for JetHub D1 (j100)

[PATCH 0/5] meson: add clk and adc support for JetHub D1 (j100)

[Vyacheslav Bocharov]

Prepare to use ADC channel 1 in JetHub D1 (j100) to check the hardware 
revision of the board.

- add support for AXG in saradc driver
- add simple clk-ao driver for AXG (base is taken from g12a)
- enable saradc in dts and board config file
- fix typo in the g12a-clk-ao driver name


Vyacheslav Bocharov (5):
  clk: meson: add minimal driver for axg-ao clocks
  clk: meson: fix driver name for g12a-ao clocks
  adc: meson-saradc: add AXG variant
  board: amlogic: jethub j100: enable saradc in dts
  board: amlogic: jethub j100: enable saradc in config

 .../arm/dts/meson-axg-jethome-jethub-j100.dts |  5 ++
 configs/jethub_j100_defconfig                 |  5 ++
 drivers/adc/meson-saradc.c                    |  2 +
 drivers/clk/meson/Makefile                    |  1 +
 drivers/clk/meson/axg-ao.c                    | 83 +++++++++++++++++++
 drivers/clk/meson/g12a-ao.c                   |  2 +-
 6 files changed, 97 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/meson/axg-ao.c

-- 
2.30.2

[PATCH 1/5] clk: meson: add minimal driver for axg-ao clocks

[Vyacheslav Bocharov]

Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
are supported.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
---
 drivers/clk/meson/Makefile |  1 +
 drivers/clk/meson/axg-ao.c | 83 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)
 create mode 100644 drivers/clk/meson/axg-ao.c

diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
index b9c6bd66cf..a486b13e9c 100644
--- a/drivers/clk/meson/Makefile
+++ b/drivers/clk/meson/Makefile
@@ -5,5 +5,6 @@
 
 obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
 obj-$(CONFIG_CLK_MESON_AXG) += axg.o
+obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
 obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
 obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
new file mode 100644
index 0000000000..264ec6f0d3
--- /dev/null
+++ b/drivers/clk/meson/axg-ao.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <log.h>
+#include <asm/io.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <dt-bindings/clock/axg-aoclkc.h>
+
+#include "clk_meson.h"
+
+struct meson_clk {
+	struct regmap *map;
+};
+
+#define AO_CLK_GATE0		0x40
+#define AO_SAR_CLK		0x90
+
+static struct meson_gate gates[] = {
+	MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
+	MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
+};
+
+static int meson_set_gate(struct clk *clk, bool on)
+{
+	struct meson_clk *priv = dev_get_priv(clk->dev);
+	struct meson_gate *gate;
+
+	if (clk->id >= ARRAY_SIZE(gates))
+		return -ENOENT;
+
+	gate = &gates[clk->id];
+
+	if (gate->reg == 0)
+		return 0;
+
+	regmap_update_bits(priv->map, gate->reg,
+			   BIT(gate->bit), on ? BIT(gate->bit) : 0);
+
+	return 0;
+}
+
+static int meson_clk_enable(struct clk *clk)
+{
+	return meson_set_gate(clk, true);
+}
+
+static int meson_clk_disable(struct clk *clk)
+{
+	return meson_set_gate(clk, false);
+}
+
+static int meson_clk_probe(struct udevice *dev)
+{
+	struct meson_clk *priv = dev_get_priv(dev);
+
+	priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
+	if (IS_ERR(priv->map))
+		return PTR_ERR(priv->map);
+
+	return 0;
+}
+
+static struct clk_ops meson_clk_ops = {
+	.disable	= meson_clk_disable,
+	.enable		= meson_clk_enable,
+};
+
+static const struct udevice_id meson_clk_ids[] = {
+	{ .compatible = "amlogic,meson-axg-aoclkc" },
+	{ }
+};
+
+U_BOOT_DRIVER(meson_clk_axg_ao) = {
+	.name		= "meson_clk_axg_ao",
+	.id		= UCLASS_CLK,
+	.of_match	= meson_clk_ids,
+	.priv_auto	= sizeof(struct meson_clk),
+	.ops		= &meson_clk_ops,
+	.probe		= meson_clk_probe,
+};
-- 
2.30.2

[PATCH 2/5] clk: meson: fix driver name for g12a-ao clocks

[Vyacheslav Bocharov]

Update the clk-g12a-ao driver from "axg" to "g12a"

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
---
 drivers/clk/meson/g12a-ao.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/meson/g12a-ao.c b/drivers/clk/meson/g12a-ao.c
index 0148529e04..17b11eb52a 100644
--- a/drivers/clk/meson/g12a-ao.c
+++ b/drivers/clk/meson/g12a-ao.c
@@ -73,7 +73,7 @@ static const struct udevice_id meson_clk_ids[] = {
 	{ }
 };
 
-U_BOOT_DRIVER(meson_clk_axg) = {
+U_BOOT_DRIVER(meson_clk_g12a_ao) = {
 	.name		= "meson_clk_g12a_ao",
 	.id		= UCLASS_CLK,
 	.of_match	= meson_clk_ids,
-- 
2.30.2

[PATCH 3/5] adc: meson-saradc: add AXG variant

[Vyacheslav Bocharov]

Add support for the SARADC variant found on the AXG SoCs family.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
---
 drivers/adc/meson-saradc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c
index 1a45a3a265..37023512f0 100644
--- a/drivers/adc/meson-saradc.c
+++ b/drivers/adc/meson-saradc.c
@@ -737,6 +737,8 @@ static const struct udevice_id meson_saradc_ids[] = {
 	  .data = (ulong)&gxl_saradc_data },
 	{ .compatible = "amlogic,meson-g12a-saradc",
 	  .data = (ulong)&gxl_saradc_data },
+	{ .compatible = "amlogic,meson-axg-saradc",
+	  .data = (ulong)&gxl_saradc_data },
 	{ }
 };
 
-- 
2.30.2

[PATCH 4/5] board: amlogic: jethub j100: enable saradc in dts

[Vyacheslav Bocharov]

Prepare to use ADC channel 1 to check the hardware revision of the board.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
---
 arch/arm/dts/meson-axg-jethome-jethub-j100.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
index 5783732dc6..00a0b268af 100644
--- a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
+++ b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
@@ -359,3 +359,8 @@
 &cpu3 {
 	#cooling-cells = <2>;
 };
+
+&saradc {
+	status = "okay";
+	vref-supply = <&vddio_ao18>;
+};
-- 
2.30.2

[PATCH 5/5] board: amlogic: jethub j100: enable saradc in config

[Vyacheslav Bocharov]

Enable ADC in board config file

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
---
 configs/jethub_j100_defconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig
index 1c6db9f6a0..a30940bf1c 100644
--- a/configs/jethub_j100_defconfig
+++ b/configs/jethub_j100_defconfig
@@ -17,6 +17,7 @@ CONFIG_REMAKE_ELF=y
 CONFIG_OF_BOARD_SETUP=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_MISC_INIT_R=y
+CONFIG_CMD_ADC=y
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set
 CONFIG_CMD_EEPROM=y
@@ -34,6 +35,10 @@ CONFIG_OF_CONTROL=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_MESON=y
+CONFIG_ADC=y
+CONFIG_SARADC_MESON=y
+CONFIG_CLK=y
+CONFIG_CLK_MESON_AXG=y
 CONFIG_MMC_MESON_GX=y
 CONFIG_MTD_UBI=y
 CONFIG_PHY_REALTEK=y
-- 
2.30.2

Re: [PATCH 1/5] clk: meson: add minimal driver for axg-ao clocks

[Sean Anderson]

On 4/20/22 1:54 PM, Vyacheslav Bocharov wrote:
> Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
> are supported.
> 
> Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
> ---
>   drivers/clk/meson/Makefile |  1 +
>   drivers/clk/meson/axg-ao.c | 83 ++++++++++++++++++++++++++++++++++++++
>   2 files changed, 84 insertions(+)
>   create mode 100644 drivers/clk/meson/axg-ao.c
> 
> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
> index b9c6bd66cf..a486b13e9c 100644
> --- a/drivers/clk/meson/Makefile
> +++ b/drivers/clk/meson/Makefile
> @@ -5,5 +5,6 @@
>   
>   obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
>   obj-$(CONFIG_CLK_MESON_AXG) += axg.o
> +obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
>   obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
>   obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
> diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
> new file mode 100644
> index 0000000000..264ec6f0d3
> --- /dev/null
> +++ b/drivers/clk/meson/axg-ao.c
> @@ -0,0 +1,83 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +
> +#include <common.h>
> +#include <log.h>
> +#include <asm/io.h>
> +#include <clk-uclass.h>
> +#include <dm.h>
> +#include <regmap.h>
> +#include <syscon.h>
> +#include <dt-bindings/clock/axg-aoclkc.h>
> +
> +#include "clk_meson.h"
> +
> +struct meson_clk {
> +	struct regmap *map;
> +};
> +
> +#define AO_CLK_GATE0		0x40
> +#define AO_SAR_CLK		0x90
> +
> +static struct meson_gate gates[] = {
> +	MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
> +	MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
> +};
> +
> +static int meson_set_gate(struct clk *clk, bool on)
> +{
> +	struct meson_clk *priv = dev_get_priv(clk->dev);
> +	struct meson_gate *gate;
> +
> +	if (clk->id >= ARRAY_SIZE(gates))
> +		return -ENOENT;
Do this check in request().

> +	gate = &gates[clk->id];
> +
> +	if (gate->reg == 0)
> +		return 0;
> +
> +	regmap_update_bits(priv->map, gate->reg,
> +			   BIT(gate->bit), on ? BIT(gate->bit) : 0);
> +
> +	return 0;
> +}
> +
> +static int meson_clk_enable(struct clk *clk)
> +{
> +	return meson_set_gate(clk, true);
> +}
> +
> +static int meson_clk_disable(struct clk *clk)
> +{
> +	return meson_set_gate(clk, false);
> +}
> +
> +static int meson_clk_probe(struct udevice *dev)
> +{
> +	struct meson_clk *priv = dev_get_priv(dev);
> +
> +	priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
> +	if (IS_ERR(priv->map))
> +		return PTR_ERR(priv->map);
> +
> +	return 0;
> +}
> +
> +static struct clk_ops meson_clk_ops = {
> +	.disable	= meson_clk_disable,
> +	.enable		= meson_clk_enable,
> +};
> +
> +static const struct udevice_id meson_clk_ids[] = {
> +	{ .compatible = "amlogic,meson-axg-aoclkc" },
> +	{ }
> +};
> +
> +U_BOOT_DRIVER(meson_clk_axg_ao) = {
> +	.name		= "meson_clk_axg_ao",
> +	.id		= UCLASS_CLK,
> +	.of_match	= meson_clk_ids,
> +	.priv_auto	= sizeof(struct meson_clk),
> +	.ops		= &meson_clk_ops,
> +	.probe		= meson_clk_probe,
> +};
> 

Otherwise LGTM

--Sean

Re: [PATCH 1/5] clk: meson: add minimal driver for axg-ao clocks

[Vyacheslav]

20.04.2022 23:12, Sean Anderson пишет:
> On 4/20/22 1:54 PM, Vyacheslav Bocharov wrote:
>> Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
>> are supported.
>>
>> Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
>> ---
>>   drivers/clk/meson/Makefile |  1 +
>>   drivers/clk/meson/axg-ao.c | 83 ++++++++++++++++++++++++++++++++++++++
>>   2 files changed, 84 insertions(+)
>>   create mode 100644 drivers/clk/meson/axg-ao.c
>>
>> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
>> index b9c6bd66cf..a486b13e9c 100644
>> --- a/drivers/clk/meson/Makefile
>> +++ b/drivers/clk/meson/Makefile
>> @@ -5,5 +5,6 @@
>>   obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
>>   obj-$(CONFIG_CLK_MESON_AXG) += axg.o
>> +obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
>> diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
>> new file mode 100644
>> index 0000000000..264ec6f0d3
>> --- /dev/null
>> +++ b/drivers/clk/meson/axg-ao.c
>> @@ -0,0 +1,83 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +
>> +#include <common.h>
>> +#include <log.h>
>> +#include <asm/io.h>
>> +#include <clk-uclass.h>
>> +#include <dm.h>
>> +#include <regmap.h>
>> +#include <syscon.h>
>> +#include <dt-bindings/clock/axg-aoclkc.h>
>> +
>> +#include "clk_meson.h"
>> +
>> +struct meson_clk {
>> +    struct regmap *map;
>> +};
>> +
>> +#define AO_CLK_GATE0        0x40
>> +#define AO_SAR_CLK        0x90
>> +
>> +static struct meson_gate gates[] = {
>> +    MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
>> +    MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
>> +};
>> +
>> +static int meson_set_gate(struct clk *clk, bool on)
>> +{
>> +    struct meson_clk *priv = dev_get_priv(clk->dev);
>> +    struct meson_gate *gate;
>> +
>> +    if (clk->id >= ARRAY_SIZE(gates))
>> +        return -ENOENT;
> Do this check in request().

Do you mean remove this check from meson_set_gate and add request 
function like this:

static int meson_clk_request(struct clk *clk)
{
	struct npcm_clk_priv *priv = dev_get_priv(clk->dev);

	if (clk->id >= ARRAY_SIZE(gates))
		return -ENOENT;

	return 0;
}

static struct clk_ops meson_clk_ops = {
	.disable	= meson_clk_disable,
	.enable		= meson_clk_enable,
	.request	= meson_clk_request,
};

?

> 
>> +    gate = &gates[clk->id];
>> +
>> +    if (gate->reg == 0)
>> +        return 0;
>> +
>> +    regmap_update_bits(priv->map, gate->reg,
>> +               BIT(gate->bit), on ? BIT(gate->bit) : 0);
>> +
>> +    return 0;
>> +}
>> +
>> +static int meson_clk_enable(struct clk *clk)
>> +{
>> +    return meson_set_gate(clk, true);
>> +}
>> +
>> +static int meson_clk_disable(struct clk *clk)
>> +{
>> +    return meson_set_gate(clk, false);
>> +}
>> +
>> +static int meson_clk_probe(struct udevice *dev)
>> +{
>> +    struct meson_clk *priv = dev_get_priv(dev);
>> +
>> +    priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
>> +    if (IS_ERR(priv->map))
>> +        return PTR_ERR(priv->map);
>> +
>> +    return 0;
>> +}
>> +
>> +static struct clk_ops meson_clk_ops = {
>> +    .disable    = meson_clk_disable,
>> +    .enable        = meson_clk_enable,
>> +};
>> +
>> +static const struct udevice_id meson_clk_ids[] = {
>> +    { .compatible = "amlogic,meson-axg-aoclkc" },
>> +    { }
>> +};
>> +
>> +U_BOOT_DRIVER(meson_clk_axg_ao) = {
>> +    .name        = "meson_clk_axg_ao",
>> +    .id        = UCLASS_CLK,
>> +    .of_match    = meson_clk_ids,
>> +    .priv_auto    = sizeof(struct meson_clk),
>> +    .ops        = &meson_clk_ops,
>> +    .probe        = meson_clk_probe,
>> +};
>>
> 
> Otherwise LGTM

Thanks

> --Sean

-- 
Vyacheslav

Re: [PATCH 1/5] clk: meson: add minimal driver for axg-ao clocks

[Vyacheslav Bocharov]

20.04.2022 23:12, Sean Anderson пишет:
> On 4/20/22 1:54 PM, Vyacheslav Bocharov wrote:
>> Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
>> are supported.
>>
>> Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
>> ---
>>   drivers/clk/meson/Makefile |  1 +
>>   drivers/clk/meson/axg-ao.c | 83 ++++++++++++++++++++++++++++++++++++++
>>   2 files changed, 84 insertions(+)
>>   create mode 100644 drivers/clk/meson/axg-ao.c
>>
>> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
>> index b9c6bd66cf..a486b13e9c 100644
>> --- a/drivers/clk/meson/Makefile
>> +++ b/drivers/clk/meson/Makefile
>> @@ -5,5 +5,6 @@
>>   obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
>>   obj-$(CONFIG_CLK_MESON_AXG) += axg.o
>> +obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
>> diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
>> new file mode 100644
>> index 0000000000..264ec6f0d3
>> --- /dev/null
>> +++ b/drivers/clk/meson/axg-ao.c
>> @@ -0,0 +1,83 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +
>> +#include <common.h>
>> +#include <log.h>
>> +#include <asm/io.h>
>> +#include <clk-uclass.h>
>> +#include <dm.h>
>> +#include <regmap.h>
>> +#include <syscon.h>
>> +#include <dt-bindings/clock/axg-aoclkc.h>
>> +
>> +#include "clk_meson.h"
>> +
>> +struct meson_clk {
>> +    struct regmap *map;
>> +};
>> +
>> +#define AO_CLK_GATE0        0x40
>> +#define AO_SAR_CLK        0x90
>> +
>> +static struct meson_gate gates[] = {
>> +    MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
>> +    MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
>> +};
>> +
>> +static int meson_set_gate(struct clk *clk, bool on)
>> +{
>> +    struct meson_clk *priv = dev_get_priv(clk->dev);
>> +    struct meson_gate *gate;
>> +
>> +    if (clk->id >= ARRAY_SIZE(gates))
>> +        return -ENOENT;
> Do this check in request().

Do you mean remove this check from meson_set_gate and add request 
function like this:

static int meson_clk_request(struct clk *clk)
{
	struct npcm_clk_priv *priv = dev_get_priv(clk->dev);

	if (clk->id >= ARRAY_SIZE(gates))
		return -ENOENT;

	return 0;
}

static struct clk_ops meson_clk_ops = {
	.disable	= meson_clk_disable,
	.enable		= meson_clk_enable,
	.request	= meson_clk_request,
};

?

> 
>> +    gate = &gates[clk->id];
>> +
>> +    if (gate->reg == 0)
>> +        return 0;
>> +
>> +    regmap_update_bits(priv->map, gate->reg,
>> +               BIT(gate->bit), on ? BIT(gate->bit) : 0);
>> +
>> +    return 0;
>> +}
>> +
>> +static int meson_clk_enable(struct clk *clk)
>> +{
>> +    return meson_set_gate(clk, true);
>> +}
>> +
>> +static int meson_clk_disable(struct clk *clk)
>> +{
>> +    return meson_set_gate(clk, false);
>> +}
>> +
>> +static int meson_clk_probe(struct udevice *dev)
>> +{
>> +    struct meson_clk *priv = dev_get_priv(dev);
>> +
>> +    priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
>> +    if (IS_ERR(priv->map))
>> +        return PTR_ERR(priv->map);
>> +
>> +    return 0;
>> +}
>> +
>> +static struct clk_ops meson_clk_ops = {
>> +    .disable    = meson_clk_disable,
>> +    .enable        = meson_clk_enable,
>> +};
>> +
>> +static const struct udevice_id meson_clk_ids[] = {
>> +    { .compatible = "amlogic,meson-axg-aoclkc" },
>> +    { }
>> +};
>> +
>> +U_BOOT_DRIVER(meson_clk_axg_ao) = {
>> +    .name        = "meson_clk_axg_ao",
>> +    .id        = UCLASS_CLK,
>> +    .of_match    = meson_clk_ids,
>> +    .priv_auto    = sizeof(struct meson_clk),
>> +    .ops        = &meson_clk_ops,
>> +    .probe        = meson_clk_probe,
>> +};
>>
> 
> Otherwise LGTM

Thanks

> --Sean

-- 
Vyacheslav

Re: [PATCH 1/5] clk: meson: add minimal driver for axg-ao clocks

[Sean Anderson]

On 4/21/22 1:57 AM, Vyacheslav wrote:
> 20.04.2022 23:12, Sean Anderson пишет:
>> On 4/20/22 1:54 PM, Vyacheslav Bocharov wrote:
>>> Add minimal driver AO clocks on meson AXG family. Only ADC related clocks
>>> are supported.
>>>
>>> Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
>>> ---
>>>   drivers/clk/meson/Makefile |  1 +
>>>   drivers/clk/meson/axg-ao.c | 83 ++++++++++++++++++++++++++++++++++++++
>>>   2 files changed, 84 insertions(+)
>>>   create mode 100644 drivers/clk/meson/axg-ao.c
>>>
>>> diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
>>> index b9c6bd66cf..a486b13e9c 100644
>>> --- a/drivers/clk/meson/Makefile
>>> +++ b/drivers/clk/meson/Makefile
>>> @@ -5,5 +5,6 @@
>>>   obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
>>>   obj-$(CONFIG_CLK_MESON_AXG) += axg.o
>>> +obj-$(CONFIG_CLK_MESON_AXG) += axg-ao.o
>>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
>>>   obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o
>>> diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
>>> new file mode 100644
>>> index 0000000000..264ec6f0d3
>>> --- /dev/null
>>> +++ b/drivers/clk/meson/axg-ao.c
>>> @@ -0,0 +1,83 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +
>>> +#include <common.h>
>>> +#include <log.h>
>>> +#include <asm/io.h>
>>> +#include <clk-uclass.h>
>>> +#include <dm.h>
>>> +#include <regmap.h>
>>> +#include <syscon.h>
>>> +#include <dt-bindings/clock/axg-aoclkc.h>
>>> +
>>> +#include "clk_meson.h"
>>> +
>>> +struct meson_clk {
>>> +    struct regmap *map;
>>> +};
>>> +
>>> +#define AO_CLK_GATE0        0x40
>>> +#define AO_SAR_CLK        0x90
>>> +
>>> +static struct meson_gate gates[] = {
>>> +    MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 7),
>>> +    MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 7),
>>> +};
>>> +
>>> +static int meson_set_gate(struct clk *clk, bool on)
>>> +{
>>> +    struct meson_clk *priv = dev_get_priv(clk->dev);
>>> +    struct meson_gate *gate;
>>> +
>>> +    if (clk->id >= ARRAY_SIZE(gates))
>>> +        return -ENOENT;
>> Do this check in request().
> 
> Do you mean remove this check from meson_set_gate and add request function like this:
> 
> static int meson_clk_request(struct clk *clk)
> {
>      struct npcm_clk_priv *priv = dev_get_priv(clk->dev);
> 
>      if (clk->id >= ARRAY_SIZE(gates))
>          return -ENOENT;
> 
>      return 0;
> }
> 
> static struct clk_ops meson_clk_ops = {
>      .disable    = meson_clk_disable,
>      .enable        = meson_clk_enable,
>      .request    = meson_clk_request,
> };

Yes.

--Sean

>>
>>> +    gate = &gates[clk->id];
>>> +
>>> +    if (gate->reg == 0)
>>> +        return 0;
>>> +
>>> +    regmap_update_bits(priv->map, gate->reg,
>>> +               BIT(gate->bit), on ? BIT(gate->bit) : 0);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static int meson_clk_enable(struct clk *clk)
>>> +{
>>> +    return meson_set_gate(clk, true);
>>> +}
>>> +
>>> +static int meson_clk_disable(struct clk *clk)
>>> +{
>>> +    return meson_set_gate(clk, false);
>>> +}
>>> +
>>> +static int meson_clk_probe(struct udevice *dev)
>>> +{
>>> +    struct meson_clk *priv = dev_get_priv(dev);
>>> +
>>> +    priv->map = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
>>> +    if (IS_ERR(priv->map))
>>> +        return PTR_ERR(priv->map);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static struct clk_ops meson_clk_ops = {
>>> +    .disable    = meson_clk_disable,
>>> +    .enable        = meson_clk_enable,
>>> +};
>>> +
>>> +static const struct udevice_id meson_clk_ids[] = {
>>> +    { .compatible = "amlogic,meson-axg-aoclkc" },
>>> +    { }
>>> +};
>>> +
>>> +U_BOOT_DRIVER(meson_clk_axg_ao) = {
>>> +    .name        = "meson_clk_axg_ao",
>>> +    .id        = UCLASS_CLK,
>>> +    .of_match    = meson_clk_ids,
>>> +    .priv_auto    = sizeof(struct meson_clk),
>>> +    .ops        = &meson_clk_ops,
>>> +    .probe        = meson_clk_probe,
>>> +};
>>>
>>
>> Otherwise LGTM
> 
> Thanks
> 
>> --Sean
>