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From: Robin Murphy <robin.murphy@arm.com>
To: Adam Van Ymeren <adam@vany.ca>, Peter Geis <pgwipeout@gmail.com>
Cc: "open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Heiko Stuebner <heiko@sntech.de>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: rockchip: Fix rk3328-roc-cc sdmmcio-regulator
Date: Wed, 5 Feb 2020 17:39:25 +0000	[thread overview]
Message-ID: <aa1ecada-687b-dd86-508c-b57a6df6f406@arm.com> (raw)
In-Reply-To: <2f863743-f5fd-7702-ac22-762dbca834cb@vany.ca>

On 05/02/2020 4:14 pm, Adam Van Ymeren wrote:
[...]
>>> Calling regmap_write seems wrong, as we end up setting all bits in the register, so this should probably be regmap_update_bits.  The top 16-bits are write-enable for the lower 16-bits, but I can't find documentation if it works to set both the write enable bit and the target bit at the same time.
>> data = (val ? BIT(bit) : 0) | BIT(bit + 16); handles setting both the
>> bit and the write bit.
> Right I saw that, I was more wondering if it's legal to set both in the
> same operation, or if the chip requires you to set the write bit, and
> then the data bit in a subsequent write.

The point of this particular hardware idiom is that the mask indicates 
which data bits to update, and both mask and data are part of a single 
write, thus there is no need for a non-atomic read-modify-write 
sequence. For example:

- register value is 0x00000000
- write 0xffffffff (mask all set, data all 1s)
- register value is now 0x0000ffff
- write 0x00090000 (mask bits 0 and 3 set, corresponding data bit values 0)
- register value is now 0x0000fff6


FWIW I've confirmed on my box that there doesn't seem to be any problem 
with the grf-gpio driver itself - setting the value to 1 or 0 from 
userspace shows up as the enable pin on the audio line driver (per the 
RK3328 reference design) going high and low respectively.

One thing I did notice, though, is that GPIO_MUTE seems to have some 
inherent coupling to the analog codec, as the value automatically goes 
high when starting to play audio, and low again when stopping (but can 
still be manually toggled in between). Thus unless there's some secret 
to disabling that behaviour then it might not be safe to enable analog 
audio on these ROC-CC boards for fear of messing up peoples' SD cards.

Robin.

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Adam Van Ymeren <adam@vany.ca>, Peter Geis <pgwipeout@gmail.com>
Cc: "open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Heiko Stuebner <heiko@sntech.de>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: rockchip: Fix rk3328-roc-cc sdmmcio-regulator
Date: Wed, 5 Feb 2020 17:39:25 +0000	[thread overview]
Message-ID: <aa1ecada-687b-dd86-508c-b57a6df6f406@arm.com> (raw)
In-Reply-To: <2f863743-f5fd-7702-ac22-762dbca834cb@vany.ca>

On 05/02/2020 4:14 pm, Adam Van Ymeren wrote:
[...]
>>> Calling regmap_write seems wrong, as we end up setting all bits in the register, so this should probably be regmap_update_bits.  The top 16-bits are write-enable for the lower 16-bits, but I can't find documentation if it works to set both the write enable bit and the target bit at the same time.
>> data = (val ? BIT(bit) : 0) | BIT(bit + 16); handles setting both the
>> bit and the write bit.
> Right I saw that, I was more wondering if it's legal to set both in the
> same operation, or if the chip requires you to set the write bit, and
> then the data bit in a subsequent write.

The point of this particular hardware idiom is that the mask indicates 
which data bits to update, and both mask and data are part of a single 
write, thus there is no need for a non-atomic read-modify-write 
sequence. For example:

- register value is 0x00000000
- write 0xffffffff (mask all set, data all 1s)
- register value is now 0x0000ffff
- write 0x00090000 (mask bits 0 and 3 set, corresponding data bit values 0)
- register value is now 0x0000fff6


FWIW I've confirmed on my box that there doesn't seem to be any problem 
with the grf-gpio driver itself - setting the value to 1 or 0 from 
userspace shows up as the enable pin on the audio line driver (per the 
RK3328 reference design) going high and low respectively.

One thing I did notice, though, is that GPIO_MUTE seems to have some 
inherent coupling to the analog codec, as the value automatically goes 
high when starting to play audio, and low again when stopping (but can 
still be manually toggled in between). Thus unless there's some secret 
to disabling that behaviour then it might not be safe to enable analog 
audio on these ROC-CC boards for fear of messing up peoples' SD cards.

Robin.

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  reply	other threads:[~2020-02-05 17:39 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-31 23:38 [PATCH] arm64: dts: rockchip: Fix rk3328-roc-cc sdmmcio-regulator Adam Van Ymeren
2020-01-31 23:38 ` Adam Van Ymeren
2020-02-01 10:51 ` Robin Murphy
2020-02-01 10:51   ` Robin Murphy
2020-02-01 15:41   ` Adam Van Ymeren
2020-02-01 17:46     ` Robin Murphy
2020-02-01 22:10       ` Adam Van Ymeren
     [not found]         ` <510d310b-30af-7b24-d472-907bc6b2ef46-M8Nx6PV4agg@public.gmane.org>
2020-02-04 15:15           ` Peter Geis
2020-02-04 15:15             ` Peter Geis
2020-02-04 16:14             ` Adam Van Ymeren
     [not found]               ` <7b36198e-25c0-4f3b-d871-6bd5aaf619d8-M8Nx6PV4agg@public.gmane.org>
2020-02-04 17:25                 ` Peter Geis
2020-02-04 17:25                   ` Peter Geis
2020-02-05 16:14                   ` Adam Van Ymeren
2020-02-05 17:39                     ` Robin Murphy [this message]
2020-02-05 17:39                       ` Robin Murphy
     [not found]                     ` <2f863743-f5fd-7702-ac22-762dbca834cb-M8Nx6PV4agg@public.gmane.org>
2020-02-05 18:43                       ` Peter Geis
2020-02-05 18:43                         ` Peter Geis
2020-02-05 19:02                         ` Robin Murphy
2020-02-05 19:02                           ` Robin Murphy
2020-02-06  3:05                           ` Thomas McKahan
2020-02-06  3:05                             ` Thomas McKahan
     [not found]                         ` <CAMdYzYopKjRpVnyq2k84XZK0kmR_ZBH8KNjVyPz3upQjx0rLJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-02-09  1:07                           ` Adam Van Ymeren
2020-02-09  1:07                             ` Adam Van Ymeren
2020-02-10 13:37                             ` Robin Murphy
2020-02-11 21:32                               ` Adam Van Ymeren
2020-02-11 21:39                               ` Adam Van Ymeren

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