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* [PATCH] drm/i915: Fix wrong escape clock divisor init for GLK
@ 2019-07-10 14:12 Stanislav Lisovskiy
  2019-07-10 14:33 ` Maarten Lankhorst
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Stanislav Lisovskiy @ 2019-07-10 14:12 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula, martin.peres

According to Bspec clock divisor registers in GeminiLake
should be initialized by shifting 1(<<) to amount of correspondent
divisor. While i915 was writing all this time that value as is.

Surprisingly that it by accident worked, until we met some issues
with Microtech Etab.

Signed-off-by: Stanislav.Lisovskiy@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108826
---
 drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
index 99cc3e2e9c2c..f016a776a39e 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -396,8 +396,8 @@ static void glk_dsi_program_esc_clock(struct drm_device *dev,
 	else
 		txesc2_div = 10;
 
-	I915_WRITE(MIPIO_TXESC_CLK_DIV1, txesc1_div & GLK_TX_ESC_CLK_DIV1_MASK);
-	I915_WRITE(MIPIO_TXESC_CLK_DIV2, txesc2_div & GLK_TX_ESC_CLK_DIV2_MASK);
+	I915_WRITE(MIPIO_TXESC_CLK_DIV1, (1 << (txesc1_div - 1)) & GLK_TX_ESC_CLK_DIV1_MASK);
+	I915_WRITE(MIPIO_TXESC_CLK_DIV2, (1 << (txesc2_div - 1)) & GLK_TX_ESC_CLK_DIV2_MASK);
 }
 
 /* Program BXT Mipi clocks and dividers */
-- 
2.17.1

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^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-07-11 15:24 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-10 14:12 [PATCH] drm/i915: Fix wrong escape clock divisor init for GLK Stanislav Lisovskiy
2019-07-10 14:33 ` Maarten Lankhorst
2019-07-11  8:32   ` Kulkarni, Vandita
2019-07-10 14:34 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-07-11  8:56 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-11 15:24 ` ✓ Fi.CI.IGT: " Patchwork

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