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From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski@canonical.com>, <ulf.hansson@linaro.org>,
	<robh+dt@kernel.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<geert@linux-m68k.org>, <yamada.masahiro@socionext.com>,
	<piotrs@cadence.com>, <linux-mmc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v3 6/6] riscv: dts: microchip: use vendor compatible for Cadence SD4HC
Date: Tue, 21 Sep 2021 10:14:05 +0000	[thread overview]
Message-ID: <abb0b273-4a60-f2b3-4e40-99d3ebfc024d@microchip.com> (raw)
In-Reply-To: <20210920150807.164673-6-krzysztof.kozlowski@canonical.com>

On 20/09/2021 16:08, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Licensed IP blocks should have their own vendor compatible.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>
> ---
>
> Changes since v1:
> 1. New patch
> ---
>   arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 55d86b078c53..7948c4249de5 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -263,7 +263,7 @@ serial3: serial@20104000 {
>                  };
>
>                  mmc: mmc@20008000 {
> -                       compatible = "cdns,sd4hc";
> +                       compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc";
>                          reg = <0x0 0x20008000 0x0 0x1000>;
>                          interrupt-parent = <&plic>;
>                          interrupts = <88>;
> --
> 2.30.2
>
Reviewed-by: Conor Dooley<conor.dooley@microchip.com>


WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski@canonical.com>, <ulf.hansson@linaro.org>,
	<robh+dt@kernel.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<geert@linux-m68k.org>, <yamada.masahiro@socionext.com>,
	<piotrs@cadence.com>, <linux-mmc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v3 6/6] riscv: dts: microchip: use vendor compatible for Cadence SD4HC
Date: Tue, 21 Sep 2021 10:14:05 +0000	[thread overview]
Message-ID: <abb0b273-4a60-f2b3-4e40-99d3ebfc024d@microchip.com> (raw)
In-Reply-To: <20210920150807.164673-6-krzysztof.kozlowski@canonical.com>

On 20/09/2021 16:08, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Licensed IP blocks should have their own vendor compatible.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
>
> ---
>
> Changes since v1:
> 1. New patch
> ---
>   arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 55d86b078c53..7948c4249de5 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -263,7 +263,7 @@ serial3: serial@20104000 {
>                  };
>
>                  mmc: mmc@20008000 {
> -                       compatible = "cdns,sd4hc";
> +                       compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc";
>                          reg = <0x0 0x20008000 0x0 0x1000>;
>                          interrupt-parent = <&plic>;
>                          interrupts = <88>;
> --
> 2.30.2
>
Reviewed-by: Conor Dooley<conor.dooley@microchip.com>

_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-09-21 10:14 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-20 15:08 [PATCH v3 1/6] dt-bindings: mmc: cdns: document Microchip MPFS MMC/SDHCI controller Krzysztof Kozlowski
2021-09-20 15:08 ` Krzysztof Kozlowski
2021-09-20 15:08 ` [PATCH v3 2/6] riscv: dts: microchip: drop duplicated nodes Krzysztof Kozlowski
2021-09-20 15:08   ` Krzysztof Kozlowski
2021-09-21 11:42   ` Geert Uytterhoeven
2021-09-21 11:42     ` Geert Uytterhoeven
2021-09-20 15:08 ` [PATCH v3 3/6] riscv: dts: microchip: fix board compatible Krzysztof Kozlowski
2021-09-20 15:08   ` Krzysztof Kozlowski
2021-09-21 10:05   ` Conor.Dooley
2021-09-21 10:05     ` Conor.Dooley
2021-09-21 11:46   ` Geert Uytterhoeven
2021-09-21 11:46     ` Geert Uytterhoeven
2021-09-20 15:08 ` [PATCH v3 4/6] riscv: dts: microchip: drop duplicated MMC/SDHC node Krzysztof Kozlowski
2021-09-20 15:08   ` Krzysztof Kozlowski
2021-09-21 10:40   ` Conor.Dooley
2021-09-21 10:40     ` Conor.Dooley
2021-09-21 11:57     ` Krzysztof Kozlowski
2021-09-21 11:57       ` Krzysztof Kozlowski
2021-09-21 14:15       ` Conor.Dooley
2021-09-21 14:15         ` Conor.Dooley
2021-09-20 15:08 ` [PATCH v3 5/6] riscv: dts: microchip: drop unused pinctrl-names Krzysztof Kozlowski
2021-09-20 15:08   ` Krzysztof Kozlowski
2021-09-20 15:08 ` [PATCH v3 6/6] riscv: dts: microchip: use vendor compatible for Cadence SD4HC Krzysztof Kozlowski
2021-09-20 15:08   ` Krzysztof Kozlowski
2021-09-21 10:14   ` Conor.Dooley [this message]
2021-09-21 10:14     ` Conor.Dooley
2021-09-21 11:48   ` Geert Uytterhoeven
2021-09-21 11:48     ` Geert Uytterhoeven
2021-09-21 11:40 ` [PATCH v3 1/6] dt-bindings: mmc: cdns: document Microchip MPFS MMC/SDHCI controller Geert Uytterhoeven
2021-09-21 11:40   ` Geert Uytterhoeven
2021-09-23 17:00 ` Rob Herring
2021-09-23 17:00   ` Rob Herring

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