[PATCH 0/3] OMAP2/3 PM: Powerdomain patch set for supporting Open Switch Retention

[PATCH 0/3] OMAP2/3 PM: Powerdomain patch set for supporting Open Switch Retention

[Thara Gopinath]

From: Thara Gopinath <thara@omaplbp.(none)>

This patch series contains some preparatory powerdomain framework
related fixes for supporting Open Switch Retetion of Core and MPU
domains in OMAP3.

Thara Gopinath (3):
  OMAP2/3 PM: Adding powerdomain APIs for reading the next logic and
    mem state
  OMAP3 PM: Defining .pwrsts_logic_ret field for core power domain
    structure
  OMAP3 PM: Adding counters for power domain logic off and mem off
    during retention.

 arch/arm/mach-omap2/pm-debug.c                |    5 ++
 arch/arm/mach-omap2/powerdomain.c             |   93 +++++++++++++++++++++++++
 arch/arm/mach-omap2/powerdomains34xx.h        |    2 +
 arch/arm/plat-omap/include/plat/powerdomain.h |    4 +
 4 files changed, 104 insertions(+), 0 deletions(-)

[PATCH 1/3] OMAP2/3 PM: Adding powerdomain APIs for reading the next logic and mem state

[Thara Gopinath]

This patch adds APIs pwrdm_read_logic_retst and
pwrdm_read_mem_retst for reading the next programmed
logic and memory state a powerdomain is to hit in event
of the next power domain state being retention.

Signed-off-by: Thara Gopinath <thara@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/powerdomain.c             |   73 +++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/powerdomain.h |    2 +
 2 files changed, 75 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index dc03289..e9eeaa4 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -679,6 +679,29 @@ int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
 }
 
 /**
+ * pwrdm_read_logic_retst - get next powerdomain logic power state
+ * @pwrdm: struct powerdomain * to get next logic power state
+ *
+ * Return the powerdomain pwrdm's logic power state.  Returns -EINVAL
+ * if the powerdomain pointer is null or returns the next logic
+ * power state upon success.
+ */
+int pwrdm_read_logic_retst(struct powerdomain *pwrdm)
+{
+	if (!pwrdm)
+		return -EINVAL;
+
+	/*
+	 * The register bit names below may not correspond to the
+	 * actual names of the bits in each powerdomain's register,
+	 * but the type of value returned is the same for each
+	 * powerdomain.
+	 */
+	return prm_read_mod_bits_shift(pwrdm->prcm_offs, pwrstctrl_reg_offs,
+					OMAP3430_LOGICSTATEST);
+}
+
+/**
  * pwrdm_read_mem_pwrst - get current memory bank power state
  * @pwrdm: struct powerdomain * to get current memory bank power state
  * @bank: memory bank number (0-3)
@@ -785,6 +808,56 @@ int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
 }
 
 /**
+ * pwrdm_read_mem_retst - get next memory bank power state
+ * @pwrdm: struct powerdomain * to get mext memory bank power state
+ * @bank: memory bank number (0-3)
+ *
+ * Return the powerdomain pwrdm's next memory power state for bank
+ * x.  Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
+ * the target memory bank does not exist or is not controllable, or
+ * returns the next memory power state upon success.
+ */
+int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
+{
+	u32 m;
+
+	if (!pwrdm)
+		return -EINVAL;
+
+	if (pwrdm->banks < (bank + 1))
+		return -EEXIST;
+
+	/*
+	 * The register bit names below may not correspond to the
+	 * actual names of the bits in each powerdomain's register,
+	 * but the type of value returned is the same for each
+	 * powerdomain.
+	 */
+	switch (bank) {
+	case 0:
+		m = OMAP_MEM0_RETSTATE_MASK;
+		break;
+	case 1:
+		m = OMAP_MEM1_RETSTATE_MASK;
+		break;
+	case 2:
+		m = OMAP_MEM2_RETSTATE_MASK;
+		break;
+	case 3:
+		m = OMAP_MEM3_RETSTATE_MASK;
+		break;
+	case 4:
+		m = OMAP_MEM4_RETSTATE_MASK;
+	default:
+		WARN_ON(1); /* should never happen */
+		return -EEXIST;
+	}
+
+	return prm_read_mod_bits_shift(pwrdm->prcm_offs,
+					pwrstctrl_reg_offs, m);
+}
+
+/**
  * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm
  * @pwrdm: struct powerdomain * to clear
  *
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index e15c7e9..6657ff2 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -137,8 +137,10 @@ int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 
 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
+int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
+int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
 
 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
-- 
1.7.0.rc1.33.g07cf0f

[PATCH 2/3] OMAP3 PM: Defining .pwrsts_logic_ret field for core power domain structure

[Thara Gopinath]

This patch adds the flag .pwrsts_logic_ret info for the core power domain
in the associated powerdomain structure. This flag specifies the states
core domain logic can hit in event of the domain entering retention.

Signed-off-by: Thara Gopinath <thara@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/powerdomains34xx.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h
index 186c013..bd87112 100644
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -82,6 +82,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
 					   CHIP_IS_OMAP3430ES2 |
 					   CHIP_IS_OMAP3430ES3_0),
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
+	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.banks		  = 2,
 	.pwrsts_mem_ret	  = {
 		[0] = PWRSTS_OFF_RET,	 /* MEM1RETSTATE */
@@ -98,6 +99,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
 	.prcm_offs	  = CORE_MOD,
 	.omap_chip	  = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
 	.pwrsts		  = PWRSTS_OFF_RET_ON,
+	.pwrsts_logic_ret = PWRSTS_OFF_RET,
 	.flags		  = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
 	.banks		  = 2,
 	.pwrsts_mem_ret	  = {
-- 
1.7.0.rc1.33.g07cf0f

[PATCH 3/3] OMAP3 PM: Adding counters for power domain logic off and mem off during retention.

[Thara Gopinath]

This patch adds counters to keep track of whether the powerdomain
logic or software controllable memory banks are turned off when
the power domain enters retention. During power domain retention
if logic gets turned off, the scenario is known as Open Switch Retention.
Also during retention s/w controllable memory banks of a power
domain can be chosen to be kept in retention or off.

This patch adds one counter per powerdomain to track the power domain
logic state during retention. Number of memory bank state counters
added depends on the number of software controllable memory banks
of the powerdomain. To view these counters do
	cat ../debug/pm_debug/count

Signed-off-by: Thara Gopinath <thara@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/pm-debug.c                |    5 +++++
 arch/arm/mach-omap2/powerdomain.c             |   20 ++++++++++++++++++++
 arch/arm/plat-omap/include/plat/powerdomain.h |    2 ++
 3 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 0ce356f..c18f7f2 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -385,6 +385,11 @@ static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
 		seq_printf(s, ",%s:%d", pwrdm_state_names[i],
 			pwrdm->state_counter[i]);
 
+	seq_printf(s, ",RET-LOGIC-OFF:%d", pwrdm->ret_logic_off_counter);
+	for (i = 0; i < pwrdm->banks; i++)
+		seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1,
+				pwrdm->ret_mem_off_counter[i]);
+
 	seq_printf(s, "\n");
 
 	return 0;
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e9eeaa4..34f1f6c 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -125,6 +125,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
 	for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
 		pwrdm->state_counter[i] = 0;
 
+	pwrdm->ret_logic_off_counter = 0;
+	for (i = 0; i < pwrdm->banks; i++)
+		pwrdm->ret_mem_off_counter[i] = 0;
+
 	pwrdm_wait_transition(pwrdm);
 	pwrdm->state = pwrdm_read_pwrst(pwrdm);
 	pwrdm->state_counter[pwrdm->state] = 1;
@@ -153,6 +157,22 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
 		prev = pwrdm_read_prev_pwrst(pwrdm);
 		if (pwrdm->state != prev)
 			pwrdm->state_counter[prev]++;
+		if (prev == PWRDM_POWER_RET) {
+			int i;
+
+			if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) &&
+					(pwrdm_read_prev_logic_pwrst(pwrdm) ==
+					PWRDM_POWER_OFF))
+				pwrdm->ret_logic_off_counter++;
+
+			for (i = 0; i < pwrdm->banks; i++) {
+				if ((pwrdm->pwrsts_mem_ret[i] ==
+						PWRSTS_OFF_RET) &&
+						(pwrdm_read_prev_mem_pwrst(
+						pwrdm, i) == PWRDM_POWER_OFF))
+					pwrdm->ret_mem_off_counter[i]++;
+			}
+		}
 		break;
 	default:
 		return -EINVAL;
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index 9b97c90..de33455 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -100,6 +100,8 @@ struct powerdomain {
 	struct list_head node;
 	int state;
 	unsigned state_counter[PWRDM_MAX_PWRSTS];
+	unsigned ret_logic_off_counter;
+	unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
 
 #ifdef CONFIG_PM_DEBUG
 	s64 timer;
-- 
1.7.0.rc1.33.g07cf0f

Re: [PATCH 1/3] OMAP2/3 PM: Adding powerdomain APIs for reading the next logic and mem state

[Paul Walmsley]

On Thu, 4 Feb 2010, Thara Gopinath wrote:

> This patch adds APIs pwrdm_read_logic_retst and
> pwrdm_read_mem_retst for reading the next programmed
> logic and memory state a powerdomain is to hit in event
> of the next power domain state being retention.
> 
> Signed-off-by: Thara Gopinath <thara@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>

Thanks, looks good Thara.  Queued for 2.6.34.


- Paul

Re: [PATCH 2/3] OMAP3 PM: Defining .pwrsts_logic_ret field for core power domain structure

[Paul Walmsley]

On Thu, 4 Feb 2010, Thara Gopinath wrote:

> This patch adds the flag .pwrsts_logic_ret info for the core power domain
> in the associated powerdomain structure. This flag specifies the states
> core domain logic can hit in event of the domain entering retention.
> 
> Signed-off-by: Thara Gopinath <thara@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>

Also queued for 2.6.34.


- Paul

Re: [PATCH 3/3] OMAP3 PM: Adding counters for power domain logic off and mem off during retention.

[Paul Walmsley]

Hi Thara,

On Thu, 4 Feb 2010, Thara Gopinath wrote:

> This patch adds counters to keep track of whether the powerdomain
> logic or software controllable memory banks are turned off when
> the power domain enters retention. During power domain retention
> if logic gets turned off, the scenario is known as Open Switch Retention.
> Also during retention s/w controllable memory banks of a power
> domain can be chosen to be kept in retention or off.
> 
> This patch adds one counter per powerdomain to track the power domain
> logic state during retention. Number of memory bank state counters
> added depends on the number of software controllable memory banks
> of the powerdomain. To view these counters do
> 	cat ../debug/pm_debug/count
> 
> Signed-off-by: Thara Gopinath <thara@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>

I've moved the OSWR counter incrementing code out into its own function, 
and simplified the conditionals, both per Documentation/CodingStyle.  
Revised patch attached below.  Could you please check this to confirm that 
it works as intended?


- Paul

>From 3fe59666447821406068ee7f48aa7f1698e51a72 Mon Sep 17 00:00:00 2001
From: Thara Gopinath <thara@ti.com>
Date: Thu, 4 Feb 2010 22:17:51 +0530
Subject: [PATCH] OMAP3 PM: Adding counters for power domain logic off and mem off during retention.

This patch adds counters to keep track of whether the powerdomain
logic or software controllable memory banks are turned off when
the power domain enters retention. During power domain retention
if logic gets turned off, the scenario is known as Open Switch Retention.
Also during retention s/w controllable memory banks of a power
domain can be chosen to be kept in retention or off.

This patch adds one counter per powerdomain to track the power domain
logic state during retention. Number of memory bank state counters
added depends on the number of software controllable memory banks
of the powerdomain. To view these counters do
	cat ../debug/pm_debug/count

Signed-off-by: Thara Gopinath <thara@ti.com>
[paul@pwsan.com: conditional expressions simplified; counter increment
 code moved to its own function]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/pm-debug.c                |    5 +++++
 arch/arm/mach-omap2/powerdomain.c             |   25 +++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/powerdomain.h |    2 ++
 3 files changed, 32 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 0ce356f..c18f7f2 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -385,6 +385,11 @@ static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
 		seq_printf(s, ",%s:%d", pwrdm_state_names[i],
 			pwrdm->state_counter[i]);
 
+	seq_printf(s, ",RET-LOGIC-OFF:%d", pwrdm->ret_logic_off_counter);
+	for (i = 0; i < pwrdm->banks; i++)
+		seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1,
+				pwrdm->ret_mem_off_counter[i]);
+
 	seq_printf(s, "\n");
 
 	return 0;
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e9eeaa4..9a0fb38 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -125,6 +125,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
 	for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
 		pwrdm->state_counter[i] = 0;
 
+	pwrdm->ret_logic_off_counter = 0;
+	for (i = 0; i < pwrdm->banks; i++)
+		pwrdm->ret_mem_off_counter[i] = 0;
+
 	pwrdm_wait_transition(pwrdm);
 	pwrdm->state = pwrdm_read_pwrst(pwrdm);
 	pwrdm->state_counter[pwrdm->state] = 1;
@@ -134,6 +138,25 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
 	return 0;
 }
 
+static void _update_logic_membank_counters(struct powerdomain *pwrdm)
+{
+	int i;
+	u8 prev_logic_pwrst, prev_mem_pwrst;
+
+	prev_logic_pwrst = pwrdm_read_prev_logic_pwrst(pwrdm);
+	if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) &&
+	    (prev_logic_pwrst == PWRDM_POWER_OFF))
+		pwrdm->ret_logic_off_counter++;
+
+	for (i = 0; i < pwrdm->banks; i++) {
+		prev_mem_pwrst = pwrdm_read_prev_mem_pwrst(pwrdm, i);
+
+		if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) &&
+		    (prev_mem_pwrst == PWRDM_POWER_OFF))
+			pwrdm->ret_mem_off_counter[i]++;
+	}
+}
+
 static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
 {
 
@@ -153,6 +176,8 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
 		prev = pwrdm_read_prev_pwrst(pwrdm);
 		if (pwrdm->state != prev)
 			pwrdm->state_counter[prev]++;
+		if (prev == PWRDM_POWER_RET)
+			_update_logic_membank_counters(pwrdm);
 		break;
 	default:
 		return -EINVAL;
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index 6657ff2..d82b2c0 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -100,6 +100,8 @@ struct powerdomain {
 	struct list_head node;
 	int state;
 	unsigned state_counter[PWRDM_MAX_PWRSTS];
+	unsigned ret_logic_off_counter;
+	unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
 
 #ifdef CONFIG_PM_DEBUG
 	s64 timer;
-- 
1.6.6.rc2.5.g49666

RE: [PATCH 3/3] OMAP3 PM: Adding counters for power domain logic off and mem off during retention.

[Gopinath, Thara]

>>-----Original Message-----
>>From: Paul Walmsley [mailto:paul@pwsan.com]
>>Sent: Friday, February 05, 2010 1:59 PM
>>To: Gopinath, Thara
>>Cc: linux-omap@vger.kernel.org
>>Subject: Re: [PATCH 3/3] OMAP3 PM: Adding counters for power domain logic off and mem off during
>>retention.
>>
>>Hi Thara,
>>
>>On Thu, 4 Feb 2010, Thara Gopinath wrote:
>>
>>> This patch adds counters to keep track of whether the powerdomain
>>> logic or software controllable memory banks are turned off when
>>> the power domain enters retention. During power domain retention
>>> if logic gets turned off, the scenario is known as Open Switch Retention.
>>> Also during retention s/w controllable memory banks of a power
>>> domain can be chosen to be kept in retention or off.
>>>
>>> This patch adds one counter per powerdomain to track the power domain
>>> logic state during retention. Number of memory bank state counters
>>> added depends on the number of software controllable memory banks
>>> of the powerdomain. To view these counters do
>>> 	cat ../debug/pm_debug/count
>>>
>>> Signed-off-by: Thara Gopinath <thara@ti.com>
>>> Cc: Paul Walmsley <paul@pwsan.com>
>>
>>I've moved the OSWR counter incrementing code out into its own function,
>>and simplified the conditionals, both per Documentation/CodingStyle.
>>Revised patch attached below.  Could you please check this to confirm that
>>it works as intended?

Hello Paul,

This patch looks fine to me.

Regards
Thara
>>
>>
>>- Paul
>>
>>From 3fe59666447821406068ee7f48aa7f1698e51a72 Mon Sep 17 00:00:00 2001
>>From: Thara Gopinath <thara@ti.com>
>>Date: Thu, 4 Feb 2010 22:17:51 +0530
>>Subject: [PATCH] OMAP3 PM: Adding counters for power domain logic off and mem off during retention.
>>
>>This patch adds counters to keep track of whether the powerdomain
>>logic or software controllable memory banks are turned off when
>>the power domain enters retention. During power domain retention
>>if logic gets turned off, the scenario is known as Open Switch Retention.
>>Also during retention s/w controllable memory banks of a power
>>domain can be chosen to be kept in retention or off.
>>
>>This patch adds one counter per powerdomain to track the power domain
>>logic state during retention. Number of memory bank state counters
>>added depends on the number of software controllable memory banks
>>of the powerdomain. To view these counters do
>>	cat ../debug/pm_debug/count
>>
>>Signed-off-by: Thara Gopinath <thara@ti.com>
>>[paul@pwsan.com: conditional expressions simplified; counter increment
>> code moved to its own function]
>>Signed-off-by: Paul Walmsley <paul@pwsan.com>
>>---
>> arch/arm/mach-omap2/pm-debug.c                |    5 +++++
>> arch/arm/mach-omap2/powerdomain.c             |   25 +++++++++++++++++++++++++
>> arch/arm/plat-omap/include/plat/powerdomain.h |    2 ++
>> 3 files changed, 32 insertions(+), 0 deletions(-)
>>
>>diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
>>index 0ce356f..c18f7f2 100644
>>--- a/arch/arm/mach-omap2/pm-debug.c
>>+++ b/arch/arm/mach-omap2/pm-debug.c
>>@@ -385,6 +385,11 @@ static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
>> 		seq_printf(s, ",%s:%d", pwrdm_state_names[i],
>> 			pwrdm->state_counter[i]);
>>
>>+	seq_printf(s, ",RET-LOGIC-OFF:%d", pwrdm->ret_logic_off_counter);
>>+	for (i = 0; i < pwrdm->banks; i++)
>>+		seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1,
>>+				pwrdm->ret_mem_off_counter[i]);
>>+
>> 	seq_printf(s, "\n");
>>
>> 	return 0;
>>diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
>>index e9eeaa4..9a0fb38 100644
>>--- a/arch/arm/mach-omap2/powerdomain.c
>>+++ b/arch/arm/mach-omap2/powerdomain.c
>>@@ -125,6 +125,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
>> 	for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
>> 		pwrdm->state_counter[i] = 0;
>>
>>+	pwrdm->ret_logic_off_counter = 0;
>>+	for (i = 0; i < pwrdm->banks; i++)
>>+		pwrdm->ret_mem_off_counter[i] = 0;
>>+
>> 	pwrdm_wait_transition(pwrdm);
>> 	pwrdm->state = pwrdm_read_pwrst(pwrdm);
>> 	pwrdm->state_counter[pwrdm->state] = 1;
>>@@ -134,6 +138,25 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
>> 	return 0;
>> }
>>
>>+static void _update_logic_membank_counters(struct powerdomain *pwrdm)
>>+{
>>+	int i;
>>+	u8 prev_logic_pwrst, prev_mem_pwrst;
>>+
>>+	prev_logic_pwrst = pwrdm_read_prev_logic_pwrst(pwrdm);
>>+	if ((pwrdm->pwrsts_logic_ret == PWRSTS_OFF_RET) &&
>>+	    (prev_logic_pwrst == PWRDM_POWER_OFF))
>>+		pwrdm->ret_logic_off_counter++;
>>+
>>+	for (i = 0; i < pwrdm->banks; i++) {
>>+		prev_mem_pwrst = pwrdm_read_prev_mem_pwrst(pwrdm, i);
>>+
>>+		if ((pwrdm->pwrsts_mem_ret[i] == PWRSTS_OFF_RET) &&
>>+		    (prev_mem_pwrst == PWRDM_POWER_OFF))
>>+			pwrdm->ret_mem_off_counter[i]++;
>>+	}
>>+}
>>+
>> static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
>> {
>>
>>@@ -153,6 +176,8 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
>> 		prev = pwrdm_read_prev_pwrst(pwrdm);
>> 		if (pwrdm->state != prev)
>> 			pwrdm->state_counter[prev]++;
>>+		if (prev == PWRDM_POWER_RET)
>>+			_update_logic_membank_counters(pwrdm);
>> 		break;
>> 	default:
>> 		return -EINVAL;
>>diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-
>>omap/include/plat/powerdomain.h
>>index 6657ff2..d82b2c0 100644
>>--- a/arch/arm/plat-omap/include/plat/powerdomain.h
>>+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
>>@@ -100,6 +100,8 @@ struct powerdomain {
>> 	struct list_head node;
>> 	int state;
>> 	unsigned state_counter[PWRDM_MAX_PWRSTS];
>>+	unsigned ret_logic_off_counter;
>>+	unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
>>
>> #ifdef CONFIG_PM_DEBUG
>> 	s64 timer;
>>--
>>1.6.6.rc2.5.g49666

RE: [PATCH 3/3] OMAP3 PM: Adding counters for power domain logic off and mem off during retention.

[Paul Walmsley]

On Fri, 5 Feb 2010, Gopinath, Thara wrote:

> This patch looks fine to me.

Thanks, it's queued for 2.6.34.


- Paul