[PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window

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* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-01 18:08 ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

Hi,

This set contains PRCM related cleanups meant for 3.18 merge window.
These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
(http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
set is used as basis to avoid merge issues.

Purpose of this work is to eventually convert the PRCM code into a
separate driver, but this is done in incremental parts as the amount
of changes is substantial. Expected conclusion of this work is 3.19
if everything goes fine.

This part of the work mostly moves some of the SoC specific PRCM driver
calls under generic version of the same, and adds SoC-ops to support
these on the driver level.

Working branch posted here:

tree: https://github.com/t-kristo/linux-pm.git
branch: for-v3.18/prcm-cleanup

Testing done:
am335x-evm: boot
am335x-bone: boot
am335x-boneblack: boot
am3517-evm: boot
am437x-gp-evm: boot
omap3-beagle-xm: boot
omap3-beagle: boot suspend/resume (ret/off)
dra7-evm: boot (with additional clock patches to fix boot issues)
omap3-n900: boot
omap5-uevm: boot
omap4-panda-es: boot suspend/resume (ret)
omap2430-sdp: boot

-Tero

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-01 18:08 ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

Hi,

This set contains PRCM related cleanups meant for 3.18 merge window.
These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
(http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
set is used as basis to avoid merge issues.

Purpose of this work is to eventually convert the PRCM code into a
separate driver, but this is done in incremental parts as the amount
of changes is substantial. Expected conclusion of this work is 3.19
if everything goes fine.

This part of the work mostly moves some of the SoC specific PRCM driver
calls under generic version of the same, and adds SoC-ops to support
these on the driver level.

Working branch posted here:

tree: https://github.com/t-kristo/linux-pm.git
branch: for-v3.18/prcm-cleanup

Testing done:
am335x-evm: boot
am335x-bone: boot
am335x-boneblack: boot
am3517-evm: boot
am437x-gp-evm: boot
omap3-beagle-xm: boot
omap3-beagle: boot suspend/resume (ret/off)
dra7-evm: boot (with additional clock patches to fix boot issues)
omap3-n900: boot
omap5-uevm: boot
omap4-panda-es: boot suspend/resume (ret)
omap2430-sdp: boot

-Tero

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 01/26] ARM: DRA7: PRM: add voltage processor check behind a prm_feature flag
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

This is done in attempt to get rid of cpu_is_X calls from the PRM core.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm.h     |    1 +
 arch/arm/mach-omap2/prm44xx.c |   10 ++++++----
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 48480d5..9f4d747 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -29,6 +29,7 @@ int of_prcm_init(void);
  * PRM_HAS_VOLTAGE: has voltage domains
  */
 #define PRM_HAS_IO_WAKEUP	(1 << 0)
+#define PRM_HAS_VOLTAGE		(1 << 1)
 
 /*
  * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0958d07..76e75aa 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -652,11 +652,10 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
 
 static int omap4_check_vcvp(void)
 {
-	/* No VC/VP on dra7xx devices */
-	if (soc_is_dra7xx())
-		return 0;
+	if (prm_features & PRM_HAS_VOLTAGE)
+		return 1;
 
-	return 1;
+	return 0;
 }
 
 struct pwrdm_ops omap4_pwrdm_operations = {
@@ -696,6 +695,9 @@ int __init omap44xx_prm_init(void)
 	if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
 		prm_features |= PRM_HAS_IO_WAKEUP;
 
+	if (!soc_is_dra7xx())
+		prm_features |= PRM_HAS_VOLTAGE;
+
 	return prm_register(&omap44xx_prm_ll_data);
 }
 
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 01/26] ARM: DRA7: PRM: add voltage processor check behind a prm_feature flag
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

This is done in attempt to get rid of cpu_is_X calls from the PRM core.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm.h     |    1 +
 arch/arm/mach-omap2/prm44xx.c |   10 ++++++----
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 48480d5..9f4d747 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -29,6 +29,7 @@ int of_prcm_init(void);
  * PRM_HAS_VOLTAGE: has voltage domains
  */
 #define PRM_HAS_IO_WAKEUP	(1 << 0)
+#define PRM_HAS_VOLTAGE		(1 << 1)
 
 /*
  * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0958d07..76e75aa 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -652,11 +652,10 @@ static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
 
 static int omap4_check_vcvp(void)
 {
-	/* No VC/VP on dra7xx devices */
-	if (soc_is_dra7xx())
-		return 0;
+	if (prm_features & PRM_HAS_VOLTAGE)
+		return 1;
 
-	return 1;
+	return 0;
 }
 
 struct pwrdm_ops omap4_pwrdm_operations = {
@@ -696,6 +695,9 @@ int __init omap44xx_prm_init(void)
 	if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
 		prm_features |= PRM_HAS_IO_WAKEUP;
 
+	if (!soc_is_dra7xx())
+		prm_features |= PRM_HAS_VOLTAGE;
+
 	return prm_register(&omap44xx_prm_ll_data);
 }
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 02/26] ARM: AM43XX: PRM: use OMAP4 PRM driver
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

AM43xx will be re-using OMAP4 PRM driver, thus call its init function.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/io.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5d0667c..5c2c71a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -608,6 +608,7 @@ void __init am43xx_init_early(void)
 	omap_cm_base_init();
 	omap3xxx_check_revision();
 	am33xx_check_features();
+	omap44xx_prm_init();
 	am43xx_powerdomains_init();
 	am43xx_clockdomains_init();
 	am43xx_hwmod_init();
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 02/26] ARM: AM43XX: PRM: use OMAP4 PRM driver
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

AM43xx will be re-using OMAP4 PRM driver, thus call its init function.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/io.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5d0667c..5c2c71a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -608,6 +608,7 @@ void __init am43xx_init_early(void)
 	omap_cm_base_init();
 	omap3xxx_check_revision();
 	am33xx_check_features();
+	omap44xx_prm_init();
 	am43xx_powerdomains_init();
 	am43xx_clockdomains_init();
 	am43xx_hwmod_init();
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 03/26] ARM: OMAP2/3: hwmod: merge wait_target_ready functions for omap2/3
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

The implementation on these is identical, so no need to have them separate.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c |   35 ++++-------------------------------
 1 file changed, 4 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6c074f3..1bb6d07 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2923,7 +2923,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
 /* Static functions intended only for use in soc_ops field function pointers */
 
 /**
- * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
+ * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
  * @oh: struct omap_hwmod *
  *
  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
@@ -2931,7 +2931,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  * slave idle; otherwise, pass along the return value of the
  * appropriate *_cm*_wait_module_ready() function.
  */
-static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
+static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
 {
 	if (!oh)
 		return -EINVAL;
@@ -2950,33 +2950,6 @@ static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
 }
 
 /**
- * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
-{
-	if (!oh)
-		return -EINVAL;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	if (!_find_mpu_rt_port(oh))
-		return 0;
-
-	/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
-
-	return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
-					     oh->prcm.omap2.idlest_reg_id,
-					     oh->prcm.omap2.idlest_idle_bit);
-}
-
-/**
  * _omap4_wait_target_ready - wait for a module to leave slave idle
  * @oh: struct omap_hwmod *
  *
@@ -4227,12 +4200,12 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
 void __init omap_hwmod_init(void)
 {
 	if (cpu_is_omap24xx()) {
-		soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
+		soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
 		soc_ops.assert_hardreset = _omap2_assert_hardreset;
 		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
 	} else if (cpu_is_omap34xx()) {
-		soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
+		soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
 		soc_ops.assert_hardreset = _omap2_assert_hardreset;
 		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 03/26] ARM: OMAP2/3: hwmod: merge wait_target_ready functions for omap2/3
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

The implementation on these is identical, so no need to have them separate.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c |   35 ++++-------------------------------
 1 file changed, 4 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6c074f3..1bb6d07 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2923,7 +2923,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
 /* Static functions intended only for use in soc_ops field function pointers */
 
 /**
- * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
+ * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
  * @oh: struct omap_hwmod *
  *
  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
@@ -2931,7 +2931,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  * slave idle; otherwise, pass along the return value of the
  * appropriate *_cm*_wait_module_ready() function.
  */
-static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
+static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
 {
 	if (!oh)
 		return -EINVAL;
@@ -2950,33 +2950,6 @@ static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
 }
 
 /**
- * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
-{
-	if (!oh)
-		return -EINVAL;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	if (!_find_mpu_rt_port(oh))
-		return 0;
-
-	/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
-
-	return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
-					     oh->prcm.omap2.idlest_reg_id,
-					     oh->prcm.omap2.idlest_idle_bit);
-}
-
-/**
  * _omap4_wait_target_ready - wait for a module to leave slave idle
  * @oh: struct omap_hwmod *
  *
@@ -4227,12 +4200,12 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
 void __init omap_hwmod_init(void)
 {
 	if (cpu_is_omap24xx()) {
-		soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
+		soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
 		soc_ops.assert_hardreset = _omap2_assert_hardreset;
 		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
 	} else if (cpu_is_omap34xx()) {
-		soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
+		soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
 		soc_ops.assert_hardreset = _omap2_assert_hardreset;
 		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 04/26] ARM: AM33xx/OMAP4+: CM: remove cdoffs parameter from wait_module_idle/ready
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

This is not needed for anything. This also eases the consolidation of
the wait_module_ready / wait_module_idle calls behind a generic CM
driver API by reducing the number of needed parameters.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm33xx.c     |   18 +++++++-----------
 arch/arm/mach-omap2/cm33xx.h     |   13 +++++--------
 arch/arm/mach-omap2/cminst44xx.c |   19 +++++++------------
 arch/arm/mach-omap2/cminst44xx.h |    5 ++---
 arch/arm/mach-omap2/omap_hwmod.c |    4 ----
 5 files changed, 21 insertions(+), 38 deletions(-)

diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b3f99e9..ef9e9018 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -96,13 +96,12 @@ static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
 /**
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
  * bit 0.
  */
-static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs)
 {
 	u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
 	v &= AM33XX_IDLEST_MASK;
@@ -113,17 +112,16 @@ static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
 /**
  * _is_module_ready - can module registers be accessed without causing an abort?
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
  * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
  */
-static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static bool _is_module_ready(u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
-	v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs);
+	v = _clkctrl_idlest(inst, clkctrl_offs);
 
 	return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
@@ -229,7 +227,6 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
 /**
  * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
@@ -237,11 +234,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
-	omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs),
+	omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
 	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -251,21 +248,20 @@ int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
  * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
  * state
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
 	if (!clkctrl_offs)
 		return 0;
 
-	omap_test_timeout((_clkctrl_idlest(inst, cdoffs, clkctrl_offs) ==
+	omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
 				CLKCTRL_IDLEST_DISABLED),
 				MAX_MODULE_READY_TIME, i);
 
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index bd24417..1771fc1 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -381,17 +381,14 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
+int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
 extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
-extern int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
+int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs);
 #else
-static inline int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
+static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
 {
 	return 0;
 }
@@ -403,8 +400,8 @@ static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs)
 {
 }
-static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
+
+static inline int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
 {
 	return 0;
 }
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 12aca56..7e6970a 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -78,13 +78,12 @@ void omap_cm_base_init(void)
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
  * bit 0.
  */
-static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static u32 _clkctrl_idlest(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
 	v &= OMAP4430_IDLEST_MASK;
@@ -96,17 +95,16 @@ static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
  * _is_module_ready - can module registers be accessed without causing an abort?
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
  * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
  */
-static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
-	v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs);
+	v = _clkctrl_idlest(part, inst, clkctrl_offs);
 
 	return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
@@ -267,7 +265,6 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
  * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
@@ -275,15 +272,14 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
-				   u16 clkctrl_offs)
+int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
 	if (!clkctrl_offs)
 		return 0;
 
-	omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs),
+	omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
 	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -294,21 +290,20 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
  * state
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
 	if (!clkctrl_offs)
 		return 0;
 
-	omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
+	omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) ==
 			   CLKCTRL_IDLEST_DISABLED),
 			  MAX_MODULE_DISABLE_TIME, i);
 
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 7f56ea4..67a05f9 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,9 +16,8 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
-extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
-					 u16 clkctrl_offs);
+int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs);
+int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1bb6d07..b531be8 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1028,7 +1028,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 
 	return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
 					     oh->clkdm->cm_inst,
-					     oh->clkdm->clkdm_offs,
 					     oh->prcm.omap4.clkctrl_offs);
 }
 
@@ -1053,7 +1052,6 @@ static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
 		return 0;
 
 	return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
-					     oh->clkdm->clkdm_offs,
 					     oh->prcm.omap4.clkctrl_offs);
 }
 
@@ -2973,7 +2971,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 
 	return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
 					      oh->clkdm->cm_inst,
-					      oh->clkdm->clkdm_offs,
 					      oh->prcm.omap4.clkctrl_offs);
 }
 
@@ -3000,7 +2997,6 @@ static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
 	/* XXX check module SIDLEMODE, hardreset status */
 
 	return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
-					      oh->clkdm->clkdm_offs,
 					      oh->prcm.omap4.clkctrl_offs);
 }
 
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 04/26] ARM: AM33xx/OMAP4+: CM: remove cdoffs parameter from wait_module_idle/ready
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

This is not needed for anything. This also eases the consolidation of
the wait_module_ready / wait_module_idle calls behind a generic CM
driver API by reducing the number of needed parameters.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm33xx.c     |   18 +++++++-----------
 arch/arm/mach-omap2/cm33xx.h     |   13 +++++--------
 arch/arm/mach-omap2/cminst44xx.c |   19 +++++++------------
 arch/arm/mach-omap2/cminst44xx.h |    5 ++---
 arch/arm/mach-omap2/omap_hwmod.c |    4 ----
 5 files changed, 21 insertions(+), 38 deletions(-)

diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b3f99e9..ef9e9018 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -96,13 +96,12 @@ static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
 /**
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
  * bit 0.
  */
-static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs)
 {
 	u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
 	v &= AM33XX_IDLEST_MASK;
@@ -113,17 +112,16 @@ static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
 /**
  * _is_module_ready - can module registers be accessed without causing an abort?
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
  * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
  */
-static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static bool _is_module_ready(u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
-	v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs);
+	v = _clkctrl_idlest(inst, clkctrl_offs);
 
 	return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
@@ -229,7 +227,6 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
 /**
  * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
@@ -237,11 +234,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
-	omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs),
+	omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
 	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -251,21 +248,20 @@ int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
  * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
  * state
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
 	if (!clkctrl_offs)
 		return 0;
 
-	omap_test_timeout((_clkctrl_idlest(inst, cdoffs, clkctrl_offs) ==
+	omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
 				CLKCTRL_IDLEST_DISABLED),
 				MAX_MODULE_READY_TIME, i);
 
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index bd24417..1771fc1 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -381,17 +381,14 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
+int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
 extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
-extern int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
+int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs);
 #else
-static inline int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
+static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
 {
 	return 0;
 }
@@ -403,8 +400,8 @@ static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs)
 {
 }
-static inline int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
+
+static inline int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
 {
 	return 0;
 }
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 12aca56..7e6970a 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -78,13 +78,12 @@ void omap_cm_base_init(void)
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
  * bit 0.
  */
-static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static u32 _clkctrl_idlest(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs);
 	v &= OMAP4430_IDLEST_MASK;
@@ -96,17 +95,16 @@ static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
  * _is_module_ready - can module registers be accessed without causing an abort?
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
  * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
  */
-static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
-	v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs);
+	v = _clkctrl_idlest(part, inst, clkctrl_offs);
 
 	return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
@@ -267,7 +265,6 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
  * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
@@ -275,15 +272,14 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
-				   u16 clkctrl_offs)
+int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
 	if (!clkctrl_offs)
 		return 0;
 
-	omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs),
+	omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs),
 			  MAX_MODULE_READY_TIME, i);
 
 	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -294,21 +290,20 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs,
  * state
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	int i = 0;
 
 	if (!clkctrl_offs)
 		return 0;
 
-	omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
+	omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) ==
 			   CLKCTRL_IDLEST_DISABLED),
 			  MAX_MODULE_DISABLE_TIME, i);
 
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 7f56ea4..67a05f9 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,9 +16,8 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
-extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
-					 u16 clkctrl_offs);
+int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs);
+int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1bb6d07..b531be8 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1028,7 +1028,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 
 	return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
 					     oh->clkdm->cm_inst,
-					     oh->clkdm->clkdm_offs,
 					     oh->prcm.omap4.clkctrl_offs);
 }
 
@@ -1053,7 +1052,6 @@ static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
 		return 0;
 
 	return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
-					     oh->clkdm->clkdm_offs,
 					     oh->prcm.omap4.clkctrl_offs);
 }
 
@@ -2973,7 +2971,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 
 	return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
 					      oh->clkdm->cm_inst,
-					      oh->clkdm->clkdm_offs,
 					      oh->prcm.omap4.clkctrl_offs);
 }
 
@@ -3000,7 +2997,6 @@ static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
 	/* XXX check module SIDLEMODE, hardreset status */
 
 	return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
-					      oh->clkdm->clkdm_offs,
 					      oh->prcm.omap4.clkctrl_offs);
 }
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 05/26] ARM: OMAP4/AM33xx: add cm_init / cm_exit calls for AM33xx and OMAP4+
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

This is needed for expanding the generic CM driver API to include
AM33xx and OMAP4 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm33xx.c     |   13 +++++++++++++
 arch/arm/mach-omap2/cm33xx.h     |    1 +
 arch/arm/mach-omap2/cminst44xx.c |   13 +++++++++++++
 arch/arm/mach-omap2/cminst44xx.h |    1 +
 arch/arm/mach-omap2/io.c         |    6 ++++++
 5 files changed, 34 insertions(+)

diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index ef9e9018..e02988f 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -358,3 +358,16 @@ struct clkdm_ops am33xx_clkdm_operations = {
 	.clkdm_clk_enable	= am33xx_clkdm_clk_enable,
 	.clkdm_clk_disable	= am33xx_clkdm_clk_disable,
 };
+
+static struct cm_ll_data am33xx_cm_ll_data;
+
+int __init am33xx_cm_init(void)
+{
+	return cm_register(&am33xx_cm_ll_data);
+}
+
+static void __exit am33xx_cm_exit(void)
+{
+	cm_unregister(&am33xx_cm_ll_data);
+}
+__exitcall(am33xx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 1771fc1..1d3cde7 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -379,6 +379,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
+int am33xx_cm_init(void);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
 int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 7e6970a..695e71e 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -505,3 +505,16 @@ struct clkdm_ops am43xx_clkdm_operations = {
 	.clkdm_clk_enable	= omap4_clkdm_clk_enable,
 	.clkdm_clk_disable	= omap4_clkdm_clk_disable,
 };
+
+static struct cm_ll_data omap4xxx_cm_ll_data;
+
+int __init omap4_cm_init(void)
+{
+	return cm_register(&omap4xxx_cm_ll_data);
+}
+
+static void __exit omap4_cm_exit(void)
+{
+	cm_unregister(&omap4xxx_cm_ll_data);
+}
+__exitcall(omap4_cm_exit);
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 67a05f9..cc3c913 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -38,5 +38,6 @@ extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
 					   u32 mask);
 
 extern void omap_cm_base_init(void);
+int omap4_cm_init(void);
 
 #endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5c2c71a..26055d9 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -45,6 +45,7 @@
 #include "sram.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
+#include "cm33xx.h"
 #include "prm.h"
 #include "cm.h"
 #include "prcm_mpu44xx.h"
@@ -582,6 +583,7 @@ void __init am33xx_init_early(void)
 	omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
 	omap3xxx_check_revision();
 	am33xx_check_features();
+	am33xx_cm_init();
 	am33xx_powerdomains_init();
 	am33xx_clockdomains_init();
 	am33xx_hwmod_init();
@@ -609,6 +611,7 @@ void __init am43xx_init_early(void)
 	omap3xxx_check_revision();
 	am33xx_check_features();
 	omap44xx_prm_init();
+	omap4_cm_init();
 	am43xx_powerdomains_init();
 	am43xx_clockdomains_init();
 	am43xx_hwmod_init();
@@ -638,6 +641,7 @@ void __init omap4430_init_early(void)
 	omap_cm_base_init();
 	omap4xxx_check_revision();
 	omap4xxx_check_features();
+	omap4_cm_init();
 	omap4_pm_init_early();
 	omap44xx_prm_init();
 	omap44xx_voltagedomains_init();
@@ -672,6 +676,7 @@ void __init omap5_init_early(void)
 	omap_cm_base_init();
 	omap44xx_prm_init();
 	omap5xxx_check_revision();
+	omap4_cm_init();
 	omap54xx_voltagedomains_init();
 	omap54xx_powerdomains_init();
 	omap54xx_clockdomains_init();
@@ -700,6 +705,7 @@ void __init dra7xx_init_early(void)
 	omap_cm_base_init();
 	omap44xx_prm_init();
 	dra7xxx_check_revision();
+	omap4_cm_init();
 	dra7xx_powerdomains_init();
 	dra7xx_clockdomains_init();
 	dra7xx_hwmod_init();
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 05/26] ARM: OMAP4/AM33xx: add cm_init / cm_exit calls for AM33xx and OMAP4+
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

This is needed for expanding the generic CM driver API to include
AM33xx and OMAP4 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm33xx.c     |   13 +++++++++++++
 arch/arm/mach-omap2/cm33xx.h     |    1 +
 arch/arm/mach-omap2/cminst44xx.c |   13 +++++++++++++
 arch/arm/mach-omap2/cminst44xx.h |    1 +
 arch/arm/mach-omap2/io.c         |    6 ++++++
 5 files changed, 34 insertions(+)

diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index ef9e9018..e02988f 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -358,3 +358,16 @@ struct clkdm_ops am33xx_clkdm_operations = {
 	.clkdm_clk_enable	= am33xx_clkdm_clk_enable,
 	.clkdm_clk_disable	= am33xx_clkdm_clk_disable,
 };
+
+static struct cm_ll_data am33xx_cm_ll_data;
+
+int __init am33xx_cm_init(void)
+{
+	return cm_register(&am33xx_cm_ll_data);
+}
+
+static void __exit am33xx_cm_exit(void)
+{
+	cm_unregister(&am33xx_cm_ll_data);
+}
+__exitcall(am33xx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 1771fc1..1d3cde7 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -379,6 +379,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
 void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
+int am33xx_cm_init(void);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
 int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 7e6970a..695e71e 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -505,3 +505,16 @@ struct clkdm_ops am43xx_clkdm_operations = {
 	.clkdm_clk_enable	= omap4_clkdm_clk_enable,
 	.clkdm_clk_disable	= omap4_clkdm_clk_disable,
 };
+
+static struct cm_ll_data omap4xxx_cm_ll_data;
+
+int __init omap4_cm_init(void)
+{
+	return cm_register(&omap4xxx_cm_ll_data);
+}
+
+static void __exit omap4_cm_exit(void)
+{
+	cm_unregister(&omap4xxx_cm_ll_data);
+}
+__exitcall(omap4_cm_exit);
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 67a05f9..cc3c913 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -38,5 +38,6 @@ extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
 					   u32 mask);
 
 extern void omap_cm_base_init(void);
+int omap4_cm_init(void);
 
 #endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5c2c71a..26055d9 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -45,6 +45,7 @@
 #include "sram.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
+#include "cm33xx.h"
 #include "prm.h"
 #include "cm.h"
 #include "prcm_mpu44xx.h"
@@ -582,6 +583,7 @@ void __init am33xx_init_early(void)
 	omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
 	omap3xxx_check_revision();
 	am33xx_check_features();
+	am33xx_cm_init();
 	am33xx_powerdomains_init();
 	am33xx_clockdomains_init();
 	am33xx_hwmod_init();
@@ -609,6 +611,7 @@ void __init am43xx_init_early(void)
 	omap3xxx_check_revision();
 	am33xx_check_features();
 	omap44xx_prm_init();
+	omap4_cm_init();
 	am43xx_powerdomains_init();
 	am43xx_clockdomains_init();
 	am43xx_hwmod_init();
@@ -638,6 +641,7 @@ void __init omap4430_init_early(void)
 	omap_cm_base_init();
 	omap4xxx_check_revision();
 	omap4xxx_check_features();
+	omap4_cm_init();
 	omap4_pm_init_early();
 	omap44xx_prm_init();
 	omap44xx_voltagedomains_init();
@@ -672,6 +676,7 @@ void __init omap5_init_early(void)
 	omap_cm_base_init();
 	omap44xx_prm_init();
 	omap5xxx_check_revision();
+	omap4_cm_init();
 	omap54xx_voltagedomains_init();
 	omap54xx_powerdomains_init();
 	omap54xx_clockdomains_init();
@@ -700,6 +705,7 @@ void __init dra7xx_init_early(void)
 	omap_cm_base_init();
 	omap44xx_prm_init();
 	dra7xxx_check_revision();
+	omap4_cm_init();
 	dra7xx_powerdomains_init();
 	dra7xx_clockdomains_init();
 	dra7xx_hwmod_init();
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 06/26] ARM: OMAP2+: CM: add common API for cm_wait_module_ready
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

This patch consolidates the parameters provided for the SoC specific
cm_*_wait_module_ready calls, adds the missing cm_ll_data function
pointers and uses the now generic call from the mach-omap2 board code.
SoC specific *_wait_module_ready calls are also made static so they
can only be accessed through the generic CM driver API only.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/clock.c      |    2 +-
 arch/arm/mach-omap2/cm.h         |    6 ++++--
 arch/arm/mach-omap2/cm2xxx.c     |    6 ++++--
 arch/arm/mach-omap2/cm2xxx.h     |    4 ++--
 arch/arm/mach-omap2/cm33xx.c     |    9 +++++++--
 arch/arm/mach-omap2/cm33xx.h     |    6 ------
 arch/arm/mach-omap2/cm3xxx.c     |    4 +++-
 arch/arm/mach-omap2/cm3xxx.h     |    2 --
 arch/arm/mach-omap2/cm_common.c  |    8 +++++---
 arch/arm/mach-omap2/cminst44xx.c |    8 ++++++--
 arch/arm/mach-omap2/cminst44xx.h |    1 -
 arch/arm/mach-omap2/omap_hwmod.c |   16 ++++++++--------
 12 files changed, 40 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d..9425230 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -171,7 +171,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
 		_wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit),
 				     idlest_val, __clk_get_name(clk->hw.clk));
 	} else {
-		cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
+		cm_wait_module_ready(0, prcm_mod, idlest_reg_id, idlest_bit);
 	};
 }
 
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 93473f9..c845bf9 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -49,12 +49,14 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
 struct cm_ll_data {
 	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
 				u8 *idlest_reg_id);
-	int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
+				 u8 idlest_shift);
 };
 
 extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 			       u8 *idlest_reg_id);
-extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
+			 u8 idlest_shift);
 
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 8be6ea5..f913efb 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -150,7 +150,7 @@ static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
 	v |= m;
 	omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
 
-	omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
+	omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit);
 
 	/*
 	 * REVISIT: Should we return an error code if
@@ -238,6 +238,7 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 
 /**
  * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP2
  * @prcm_mod: PRCM module offset
  * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
  * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -246,7 +247,8 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
  * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
  * success or -EBUSY if the module doesn't enable in time.
  */
-int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+				  u8 idlest_shift)
 {
 	int ena = 0, i = 0;
 	u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 891d81c..2526a8f 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -58,8 +58,8 @@ extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
 extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 
 extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
-					 u8 idlest_shift);
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+				  u8 idlest_shift);
 extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
 					s16 *prcm_inst, u8 *idlest_reg_id);
 extern int omap2xxx_cm_fclks_active(void);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e02988f..e022a8d 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -226,15 +226,18 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
 
 /**
  * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
+ * @part: PRCM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for AM33xx
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
  * the non functional state (trans, idle or disabled), module and thus the
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
+static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
+				       u8 bit_shift)
 {
 	int i = 0;
 
@@ -359,7 +362,9 @@ struct clkdm_ops am33xx_clkdm_operations = {
 	.clkdm_clk_disable	= am33xx_clkdm_clk_disable,
 };
 
-static struct cm_ll_data am33xx_cm_ll_data;
+static struct cm_ll_data am33xx_cm_ll_data = {
+	.wait_module_ready	= &am33xx_cm_wait_module_ready,
+};
 
 int __init am33xx_cm_init(void)
 {
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 1d3cde7..fbbedf2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -387,7 +387,6 @@ extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
-int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs);
 #else
 static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
 {
@@ -401,11 +400,6 @@ static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs)
 {
 }
-
-static inline int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
-{
-	return 0;
-}
 #endif
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 129a4e7..4da3625 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -79,6 +79,7 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
 
 /**
  * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP3
  * @prcm_mod: PRCM module offset
  * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
  * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -87,7 +88,8 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
  * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
  * success or -EBUSY if the module doesn't enable in time.
  */
-int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+static int omap3xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+				  u8 idlest_shift)
 {
 	int ena = 0, i = 0;
 	u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 7a16b55..55faf0e 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -74,8 +74,6 @@ extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
 extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
 
 extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
-					 u8 idlest_shift);
 
 extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
 					s16 *prcm_inst, u8 *idlest_reg_id);
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 8f6c471..db2bb6c 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -73,8 +73,9 @@ int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 
 /**
  * cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition
  * @prcm_mod: PRCM module offset
- * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_reg: CM_IDLESTx register
  * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
  *
  * Wait for the PRCM to indicate that the module identified by
@@ -83,7 +84,7 @@ int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
  * no per-SoC wait_module_ready() function pointer has been registered
  * or if the idlest register is unknown on the SoC.
  */
-int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
 {
 	if (!cm_ll_data->wait_module_ready) {
 		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
@@ -91,7 +92,8 @@ int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
 		return -EINVAL;
 	}
 
-	return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift);
+	return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
+					     idlest_shift);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 695e71e..c4f42de 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -266,13 +266,15 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for OMAP4+
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
  * the non functional state (trans, idle or disabled), module and thus the
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
+static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
+					  u8 bit_shift)
 {
 	int i = 0;
 
@@ -506,7 +508,9 @@ struct clkdm_ops am43xx_clkdm_operations = {
 	.clkdm_clk_disable	= omap4_clkdm_clk_disable,
 };
 
-static struct cm_ll_data omap4xxx_cm_ll_data;
+static struct cm_ll_data omap4xxx_cm_ll_data = {
+	.wait_module_ready	= &omap4_cminst_wait_module_ready,
+};
 
 int __init omap4_cm_init(void)
 {
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index cc3c913..fad0a97 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,7 +16,6 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs);
 int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b531be8..9b1ba12 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2942,9 +2942,9 @@ static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
 
 	/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
 
-	return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
-					     oh->prcm.omap2.idlest_reg_id,
-					     oh->prcm.omap2.idlest_idle_bit);
+	return cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
+				    oh->prcm.omap2.idlest_reg_id,
+				    oh->prcm.omap2.idlest_idle_bit);
 }
 
 /**
@@ -2969,9 +2969,9 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 
 	/* XXX check module SIDLEMODE, hardreset status */
 
-	return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
-					      oh->clkdm->cm_inst,
-					      oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_ready(oh->clkdm->prcm_partition,
+				    oh->clkdm->cm_inst,
+				    oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
@@ -2996,8 +2996,8 @@ static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
 
 	/* XXX check module SIDLEMODE, hardreset status */
 
-	return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
-					      oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_ready(0, oh->clkdm->cm_inst,
+				    oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 06/26] ARM: OMAP2+: CM: add common API for cm_wait_module_ready
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

This patch consolidates the parameters provided for the SoC specific
cm_*_wait_module_ready calls, adds the missing cm_ll_data function
pointers and uses the now generic call from the mach-omap2 board code.
SoC specific *_wait_module_ready calls are also made static so they
can only be accessed through the generic CM driver API only.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/clock.c      |    2 +-
 arch/arm/mach-omap2/cm.h         |    6 ++++--
 arch/arm/mach-omap2/cm2xxx.c     |    6 ++++--
 arch/arm/mach-omap2/cm2xxx.h     |    4 ++--
 arch/arm/mach-omap2/cm33xx.c     |    9 +++++++--
 arch/arm/mach-omap2/cm33xx.h     |    6 ------
 arch/arm/mach-omap2/cm3xxx.c     |    4 +++-
 arch/arm/mach-omap2/cm3xxx.h     |    2 --
 arch/arm/mach-omap2/cm_common.c  |    8 +++++---
 arch/arm/mach-omap2/cminst44xx.c |    8 ++++++--
 arch/arm/mach-omap2/cminst44xx.h |    1 -
 arch/arm/mach-omap2/omap_hwmod.c |   16 ++++++++--------
 12 files changed, 40 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d..9425230 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -171,7 +171,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
 		_wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit),
 				     idlest_val, __clk_get_name(clk->hw.clk));
 	} else {
-		cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
+		cm_wait_module_ready(0, prcm_mod, idlest_reg_id, idlest_bit);
 	};
 }
 
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 93473f9..c845bf9 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -49,12 +49,14 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
 struct cm_ll_data {
 	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
 				u8 *idlest_reg_id);
-	int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
+				 u8 idlest_shift);
 };
 
 extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 			       u8 *idlest_reg_id);
-extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
+			 u8 idlest_shift);
 
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 8be6ea5..f913efb 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -150,7 +150,7 @@ static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
 	v |= m;
 	omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
 
-	omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
+	omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit);
 
 	/*
 	 * REVISIT: Should we return an error code if
@@ -238,6 +238,7 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 
 /**
  * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP2
  * @prcm_mod: PRCM module offset
  * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
  * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -246,7 +247,8 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
  * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
  * success or -EBUSY if the module doesn't enable in time.
  */
-int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+				  u8 idlest_shift)
 {
 	int ena = 0, i = 0;
 	u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 891d81c..2526a8f 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -58,8 +58,8 @@ extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
 extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 
 extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
-					 u8 idlest_shift);
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+				  u8 idlest_shift);
 extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
 					s16 *prcm_inst, u8 *idlest_reg_id);
 extern int omap2xxx_cm_fclks_active(void);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e02988f..e022a8d 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -226,15 +226,18 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
 
 /**
  * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
+ * @part: PRCM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for AM33xx
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
  * the non functional state (trans, idle or disabled), module and thus the
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
+static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
+				       u8 bit_shift)
 {
 	int i = 0;
 
@@ -359,7 +362,9 @@ struct clkdm_ops am33xx_clkdm_operations = {
 	.clkdm_clk_disable	= am33xx_clkdm_clk_disable,
 };
 
-static struct cm_ll_data am33xx_cm_ll_data;
+static struct cm_ll_data am33xx_cm_ll_data = {
+	.wait_module_ready	= &am33xx_cm_wait_module_ready,
+};
 
 int __init am33xx_cm_init(void)
 {
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 1d3cde7..fbbedf2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -387,7 +387,6 @@ extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
-int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs);
 #else
 static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
 {
@@ -401,11 +400,6 @@ static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs)
 {
 }
-
-static inline int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
-{
-	return 0;
-}
 #endif
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 129a4e7..4da3625 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -79,6 +79,7 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
 
 /**
  * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP3
  * @prcm_mod: PRCM module offset
  * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
  * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -87,7 +88,8 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
  * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
  * success or -EBUSY if the module doesn't enable in time.
  */
-int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+static int omap3xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+				  u8 idlest_shift)
 {
 	int ena = 0, i = 0;
 	u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 7a16b55..55faf0e 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -74,8 +74,6 @@ extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
 extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
 
 extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
-					 u8 idlest_shift);
 
 extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
 					s16 *prcm_inst, u8 *idlest_reg_id);
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 8f6c471..db2bb6c 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -73,8 +73,9 @@ int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 
 /**
  * cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition
  * @prcm_mod: PRCM module offset
- * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_reg: CM_IDLESTx register
  * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
  *
  * Wait for the PRCM to indicate that the module identified by
@@ -83,7 +84,7 @@ int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
  * no per-SoC wait_module_ready() function pointer has been registered
  * or if the idlest register is unknown on the SoC.
  */
-int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
 {
 	if (!cm_ll_data->wait_module_ready) {
 		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
@@ -91,7 +92,8 @@ int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
 		return -EINVAL;
 	}
 
-	return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift);
+	return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
+					     idlest_shift);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 695e71e..c4f42de 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -266,13 +266,15 @@ void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for OMAP4+
  *
  * Wait for the module IDLEST to be functional. If the idle state is in any
  * the non functional state (trans, idle or disabled), module and thus the
  * sysconfig cannot be accessed and will probably lead to an "imprecise
  * external abort"
  */
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
+static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
+					  u8 bit_shift)
 {
 	int i = 0;
 
@@ -506,7 +508,9 @@ struct clkdm_ops am43xx_clkdm_operations = {
 	.clkdm_clk_disable	= omap4_clkdm_clk_disable,
 };
 
-static struct cm_ll_data omap4xxx_cm_ll_data;
+static struct cm_ll_data omap4xxx_cm_ll_data = {
+	.wait_module_ready	= &omap4_cminst_wait_module_ready,
+};
 
 int __init omap4_cm_init(void)
 {
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index cc3c913..fad0a97 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,7 +16,6 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs);
 int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b531be8..9b1ba12 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2942,9 +2942,9 @@ static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
 
 	/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
 
-	return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
-					     oh->prcm.omap2.idlest_reg_id,
-					     oh->prcm.omap2.idlest_idle_bit);
+	return cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
+				    oh->prcm.omap2.idlest_reg_id,
+				    oh->prcm.omap2.idlest_idle_bit);
 }
 
 /**
@@ -2969,9 +2969,9 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 
 	/* XXX check module SIDLEMODE, hardreset status */
 
-	return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
-					      oh->clkdm->cm_inst,
-					      oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_ready(oh->clkdm->prcm_partition,
+				    oh->clkdm->cm_inst,
+				    oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
@@ -2996,8 +2996,8 @@ static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
 
 	/* XXX check module SIDLEMODE, hardreset status */
 
-	return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
-					      oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_ready(0, oh->clkdm->cm_inst,
+				    oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 07/26] ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

Adds a generic CM driver API for waiting module to enter idle / standby.
The SoC specific implementations are registered through cm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm.h         |    4 ++++
 arch/arm/mach-omap2/cm33xx.c     |    6 +++++-
 arch/arm/mach-omap2/cm33xx.h     |    5 -----
 arch/arm/mach-omap2/cm_common.c  |   25 +++++++++++++++++++++++++
 arch/arm/mach-omap2/cminst44xx.c |    5 ++++-
 arch/arm/mach-omap2/cminst44xx.h |    1 -
 arch/arm/mach-omap2/omap_hwmod.c |   10 +++++-----
 7 files changed, 43 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index c845bf9..fb7da5f 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -45,18 +45,22 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
  * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
  * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
  * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
+ * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
  */
 struct cm_ll_data {
 	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
 				u8 *idlest_reg_id);
 	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
 				 u8 idlest_shift);
+	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
+				u8 idlest_shift);
 };
 
 extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 			       u8 *idlest_reg_id);
 int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
 			 u8 idlest_shift);
+int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift);
 
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e022a8d..d57fa5f 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -250,14 +250,17 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
 /**
  * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
  * state
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for AM33xx
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
+static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
+				      u8 bit_shift)
 {
 	int i = 0;
 
@@ -364,6 +367,7 @@ struct clkdm_ops am33xx_clkdm_operations = {
 
 static struct cm_ll_data am33xx_cm_ll_data = {
 	.wait_module_ready	= &am33xx_cm_wait_module_ready,
+	.wait_module_idle	= &am33xx_cm_wait_module_idle,
 };
 
 int __init am33xx_cm_init(void)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index fbbedf2..a0daea8 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -382,16 +382,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
 int am33xx_cm_init(void);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
 extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 #else
-static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
-{
-	return 0;
-}
 static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs)
 {
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index db2bb6c..6dbbe54 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -96,6 +96,31 @@ int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
 					     idlest_shift);
 }
 
+/*
+ * cm_wait_module_idle - wait for a module to enter idle or standby
+ * @part: PRCM partition
+ * @prcm_mod: PRCM module offset
+ * @idlest_reg: CM_IDLESTx register
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked.  Return
+ * 0 upon success, -EBUSY if the module doesn't enable in time, or
+ * -EINVAL if no per-SoC wait_module_idle() function pointer has been
+ * registered or if the idlest register is unknown on the SoC.
+ */
+int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
+{
+	if (!cm_ll_data->wait_module_idle) {
+		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
+					    idlest_shift);
+}
+
 /**
  * cm_register - register per-SoC low-level data with the CM
  * @cld: low-level per-SoC OMAP CM data & function pointers to register
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index c4f42de..7ae1cc2 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -293,12 +293,14 @@ static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: Bit shift for the register, ignored for OMAP4+
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs)
+static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
+					 u8 bit_shift)
 {
 	int i = 0;
 
@@ -510,6 +512,7 @@ struct clkdm_ops am43xx_clkdm_operations = {
 
 static struct cm_ll_data omap4xxx_cm_ll_data = {
 	.wait_module_ready	= &omap4_cminst_wait_module_ready,
+	.wait_module_idle	= &omap4_cminst_wait_module_idle,
 };
 
 int __init omap4_cm_init(void)
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index fad0a97..9a223dd 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,7 +16,6 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9b1ba12..daaff7a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1026,9 +1026,9 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 	if (oh->flags & HWMOD_NO_IDLEST)
 		return 0;
 
-	return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
-					     oh->clkdm->cm_inst,
-					     oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_idle(oh->clkdm->prcm_partition,
+				   oh->clkdm->cm_inst,
+				   oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
@@ -1051,8 +1051,8 @@ static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
 	if (oh->flags & HWMOD_NO_IDLEST)
 		return 0;
 
-	return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
-					     oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_idle(0, oh->clkdm->cm_inst,
+				   oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 07/26] ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

Adds a generic CM driver API for waiting module to enter idle / standby.
The SoC specific implementations are registered through cm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm.h         |    4 ++++
 arch/arm/mach-omap2/cm33xx.c     |    6 +++++-
 arch/arm/mach-omap2/cm33xx.h     |    5 -----
 arch/arm/mach-omap2/cm_common.c  |   25 +++++++++++++++++++++++++
 arch/arm/mach-omap2/cminst44xx.c |    5 ++++-
 arch/arm/mach-omap2/cminst44xx.h |    1 -
 arch/arm/mach-omap2/omap_hwmod.c |   10 +++++-----
 7 files changed, 43 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index c845bf9..fb7da5f 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -45,18 +45,22 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
  * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
  * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
  * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
+ * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
  */
 struct cm_ll_data {
 	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
 				u8 *idlest_reg_id);
 	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
 				 u8 idlest_shift);
+	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
+				u8 idlest_shift);
 };
 
 extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 			       u8 *idlest_reg_id);
 int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
 			 u8 idlest_shift);
+int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift);
 
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e022a8d..d57fa5f 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -250,14 +250,17 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
 /**
  * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
  * state
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for AM33xx
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
+static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
+				      u8 bit_shift)
 {
 	int i = 0;
 
@@ -364,6 +367,7 @@ struct clkdm_ops am33xx_clkdm_operations = {
 
 static struct cm_ll_data am33xx_cm_ll_data = {
 	.wait_module_ready	= &am33xx_cm_wait_module_ready,
+	.wait_module_idle	= &am33xx_cm_wait_module_idle,
 };
 
 int __init am33xx_cm_init(void)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index fbbedf2..a0daea8 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -382,16 +382,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
 int am33xx_cm_init(void);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
 extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
 					u16 clkctrl_offs);
 #else
-static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
-{
-	return 0;
-}
 static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
 					u16 clkctrl_offs)
 {
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index db2bb6c..6dbbe54 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -96,6 +96,31 @@ int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
 					     idlest_shift);
 }
 
+/*
+ * cm_wait_module_idle - wait for a module to enter idle or standby
+ * @part: PRCM partition
+ * @prcm_mod: PRCM module offset
+ * @idlest_reg: CM_IDLESTx register
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked.  Return
+ * 0 upon success, -EBUSY if the module doesn't enable in time, or
+ * -EINVAL if no per-SoC wait_module_idle() function pointer has been
+ * registered or if the idlest register is unknown on the SoC.
+ */
+int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
+{
+	if (!cm_ll_data->wait_module_idle) {
+		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
+					    idlest_shift);
+}
+
 /**
  * cm_register - register per-SoC low-level data with the CM
  * @cld: low-level per-SoC OMAP CM data & function pointers to register
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index c4f42de..7ae1cc2 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -293,12 +293,14 @@ static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: Bit shift for the register, ignored for OMAP4+
  *
  * Wait for the module IDLEST to be disabled. Some PRCM transition,
  * like reset assertion or parent clock de-activation must wait the
  * module to be fully disabled.
  */
-int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs)
+static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
+					 u8 bit_shift)
 {
 	int i = 0;
 
@@ -510,6 +512,7 @@ struct clkdm_ops am43xx_clkdm_operations = {
 
 static struct cm_ll_data omap4xxx_cm_ll_data = {
 	.wait_module_ready	= &omap4_cminst_wait_module_ready,
+	.wait_module_idle	= &omap4_cminst_wait_module_idle,
 };
 
 int __init omap4_cm_init(void)
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index fad0a97..9a223dd 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -16,7 +16,6 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
 void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9b1ba12..daaff7a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1026,9 +1026,9 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 	if (oh->flags & HWMOD_NO_IDLEST)
 		return 0;
 
-	return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
-					     oh->clkdm->cm_inst,
-					     oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_idle(oh->clkdm->prcm_partition,
+				   oh->clkdm->cm_inst,
+				   oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
@@ -1051,8 +1051,8 @@ static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
 	if (oh->flags & HWMOD_NO_IDLEST)
 		return 0;
 
-	return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
-					     oh->prcm.omap4.clkctrl_offs);
+	return cm_wait_module_idle(0, oh->clkdm->cm_inst,
+				   oh->prcm.omap4.clkctrl_offs, 0);
 }
 
 /**
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 08/26] ARM: OMAP2+: CM: make clkdm_hwsup operations static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These are not accessed outside the cm*.c files themselves, so make them
static.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm2xxx.c     |    6 +++---
 arch/arm/mach-omap2/cm2xxx.h     |    4 ----
 arch/arm/mach-omap2/cm33xx.c     |   10 +++++-----
 arch/arm/mach-omap2/cm33xx.h     |    5 -----
 arch/arm/mach-omap2/cm3xxx.c     |   10 +++++-----
 arch/arm/mach-omap2/cm3xxx.h     |    7 -------
 arch/arm/mach-omap2/cminst44xx.c |   10 +++++-----
 arch/arm/mach-omap2/cminst44xx.h |    5 -----
 8 files changed, 18 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index f913efb..365df9e 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -53,7 +53,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
 	omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
 }
 
-bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+static bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 {
 	u32 v;
 
@@ -64,12 +64,12 @@ bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 	return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
 }
 
-void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+static void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
 }
 
-void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+static void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
 }
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 2526a8f..a14094b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -46,9 +46,6 @@
 
 #ifndef __ASSEMBLER__
 
-extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
-
 extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
 extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
 
@@ -57,7 +54,6 @@ extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
 extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
 extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 
-extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
 int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
 				  u8 idlest_shift);
 extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index d57fa5f..ffdcb7a 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -156,7 +156,7 @@ static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)
  * Returns true if the clockdomain referred to by (@inst, @cdoffs)
  * is in hardware-supervised idle mode, or 0 otherwise.
  */
-bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
+static bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
 {
 	u32 v;
 
@@ -175,7 +175,7 @@ bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
  * Put a clockdomain referred to by (@inst, @cdoffs) into
  * hardware-supervised idle mode.  No return value.
  */
-void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
 }
@@ -189,7 +189,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
  * software-supervised idle mode, i.e., controlled manually by the
  * Linux OMAP clockdomain code.  No return value.
  */
-void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
 }
@@ -202,7 +202,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
  * Put a clockdomain referred to by (@inst, @cdoffs) into idle
  * No return value.
  */
-void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
 }
@@ -215,7 +215,7 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
  * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
  * waking it up.  No return value.
  */
-void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
 }
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index a0daea8..78a61e5 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -374,11 +374,6 @@
 
 
 #ifndef __ASSEMBLER__
-bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
 int am33xx_cm_init(void);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 4da3625..a29c2bf 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -42,7 +42,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
 	omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
 }
 
-bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+static bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 {
 	u32 v;
 
@@ -53,22 +53,22 @@ bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 	return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
 }
 
-void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
 }
 
-void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
 }
 
-void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask);
 }
 
-void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask);
 }
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 55faf0e..33491c7 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -68,13 +68,6 @@
 
 #ifndef __ASSEMBLER__
 
-extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
-
-extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-
 extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
 					s16 *prcm_inst, u8 *idlest_reg_id);
 
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 7ae1cc2..b189a2b 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -198,7 +198,7 @@ static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs)
  * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
  * is in hardware-supervised idle mode, or 0 otherwise.
  */
-bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
+static bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
 {
 	u32 v;
 
@@ -218,7 +218,7 @@ bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
  * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
  * hardware-supervised idle mode.  No return value.
  */
-void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
 }
@@ -233,7 +233,7 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
  * software-supervised idle mode, i.e., controlled manually by the
  * Linux OMAP clockdomain code.  No return value.
  */
-void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
 }
@@ -247,7 +247,7 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
  * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
  * waking it up.  No return value.
  */
-void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
 }
@@ -256,7 +256,7 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
  *
  */
 
-void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
 }
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 9a223dd..d6634fa 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -11,11 +11,6 @@
 #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 
-bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 08/26] ARM: OMAP2+: CM: make clkdm_hwsup operations static
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

These are not accessed outside the cm*.c files themselves, so make them
static.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm2xxx.c     |    6 +++---
 arch/arm/mach-omap2/cm2xxx.h     |    4 ----
 arch/arm/mach-omap2/cm33xx.c     |   10 +++++-----
 arch/arm/mach-omap2/cm33xx.h     |    5 -----
 arch/arm/mach-omap2/cm3xxx.c     |   10 +++++-----
 arch/arm/mach-omap2/cm3xxx.h     |    7 -------
 arch/arm/mach-omap2/cminst44xx.c |   10 +++++-----
 arch/arm/mach-omap2/cminst44xx.h |    5 -----
 8 files changed, 18 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index f913efb..365df9e 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -53,7 +53,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
 	omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
 }
 
-bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+static bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 {
 	u32 v;
 
@@ -64,12 +64,12 @@ bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 	return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
 }
 
-void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+static void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
 }
 
-void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+static void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
 }
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 2526a8f..a14094b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -46,9 +46,6 @@
 
 #ifndef __ASSEMBLER__
 
-extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
-
 extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
 extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
 
@@ -57,7 +54,6 @@ extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
 extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
 extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 
-extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
 int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
 				  u8 idlest_shift);
 extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index d57fa5f..ffdcb7a 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -156,7 +156,7 @@ static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)
  * Returns true if the clockdomain referred to by (@inst, @cdoffs)
  * is in hardware-supervised idle mode, or 0 otherwise.
  */
-bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
+static bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
 {
 	u32 v;
 
@@ -175,7 +175,7 @@ bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
  * Put a clockdomain referred to by (@inst, @cdoffs) into
  * hardware-supervised idle mode.  No return value.
  */
-void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
 }
@@ -189,7 +189,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
  * software-supervised idle mode, i.e., controlled manually by the
  * Linux OMAP clockdomain code.  No return value.
  */
-void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
 }
@@ -202,7 +202,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
  * Put a clockdomain referred to by (@inst, @cdoffs) into idle
  * No return value.
  */
-void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
 }
@@ -215,7 +215,7 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
  * Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
  * waking it up.  No return value.
  */
-void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
 }
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index a0daea8..78a61e5 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -374,11 +374,6 @@
 
 
 #ifndef __ASSEMBLER__
-bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
 int am33xx_cm_init(void);
 
 #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 4da3625..a29c2bf 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -42,7 +42,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
 	omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
 }
 
-bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+static bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 {
 	u32 v;
 
@@ -53,22 +53,22 @@ bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 	return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
 }
 
-void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
 }
 
-void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
 }
 
-void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask);
 }
 
-void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
+static void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
 {
 	_write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask);
 }
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 55faf0e..33491c7 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -68,13 +68,6 @@
 
 #ifndef __ASSEMBLER__
 
-extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
-
-extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-
 extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
 					s16 *prcm_inst, u8 *idlest_reg_id);
 
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 7ae1cc2..b189a2b 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -198,7 +198,7 @@ static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs)
  * Returns true if the clockdomain referred to by (@part, @inst, @cdoffs)
  * is in hardware-supervised idle mode, or 0 otherwise.
  */
-bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
+static bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
 {
 	u32 v;
 
@@ -218,7 +218,7 @@ bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs)
  * Put a clockdomain referred to by (@part, @inst, @cdoffs) into
  * hardware-supervised idle mode.  No return value.
  */
-void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, part, inst, cdoffs);
 }
@@ -233,7 +233,7 @@ void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs)
  * software-supervised idle mode, i.e., controlled manually by the
  * Linux OMAP clockdomain code.  No return value.
  */
-void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
 }
@@ -247,7 +247,7 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs)
  * Take a clockdomain referred to by (@part, @inst, @cdoffs) out of idle,
  * waking it up.  No return value.
  */
-void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, part, inst, cdoffs);
 }
@@ -256,7 +256,7 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs)
  *
  */
 
-void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
+static void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs)
 {
 	_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
 }
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 9a223dd..d6634fa 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -11,11 +11,6 @@
 #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 
-bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_enable_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
-void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
 				       u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 09/26] ARM: OMAP2+: CM: add common APIs for cm_module_enable/disable
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

Adds a generic CM driver API for enabling/disabling modules.
The SoC specific implementations are registered through cm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm.h         |    6 ++++++
 arch/arm/mach-omap2/cm33xx.c     |   11 +++++++----
 arch/arm/mach-omap2/cm33xx.h     |   17 -----------------
 arch/arm/mach-omap2/cm_common.c  |   24 ++++++++++++++++++++++++
 arch/arm/mach-omap2/cminst44xx.c |   11 +++++------
 arch/arm/mach-omap2/cminst44xx.h |    4 ----
 arch/arm/mach-omap2/omap_hwmod.c |   21 +++++++--------------
 7 files changed, 49 insertions(+), 45 deletions(-)

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index fb7da5f..2eb21c5 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -46,6 +46,8 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
  * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
  * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
  * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
+ * @module_enable: ptr to the SoC CM-specific module_enable impl
+ * @module_disable: ptr to the SoC CM-specific module_disable impl
  */
 struct cm_ll_data {
 	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
@@ -54,6 +56,8 @@ struct cm_ll_data {
 				 u8 idlest_shift);
 	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
 				u8 idlest_shift);
+	void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
+	void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
 };
 
 extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
@@ -61,6 +65,8 @@ extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
 			 u8 idlest_shift);
 int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift);
+int cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
+int cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
 
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index ffdcb7a..b9ad463 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -277,13 +277,14 @@ static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
 /**
  * am33xx_cm_module_enable - Enable the modulemode inside CLKCTRL
  * @mode: Module mode (SW or HW)
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static void am33xx_cm_module_enable(u8 mode, u8 part, u16 inst,
+				    u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -295,13 +296,13 @@ void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs)
 
 /**
  * am33xx_cm_module_disable - Disable the module inside CLKCTRL
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static void am33xx_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -368,6 +369,8 @@ struct clkdm_ops am33xx_clkdm_operations = {
 static struct cm_ll_data am33xx_cm_ll_data = {
 	.wait_module_ready	= &am33xx_cm_wait_module_ready,
 	.wait_module_idle	= &am33xx_cm_wait_module_idle,
+	.module_enable		= &am33xx_cm_module_enable,
+	.module_disable		= &am33xx_cm_module_disable,
 };
 
 int __init am33xx_cm_init(void)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 78a61e5..046b4b2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -375,22 +375,5 @@
 
 #ifndef __ASSEMBLER__
 int am33xx_cm_init(void);
-
-#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-#else
-static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-}
-static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-}
-#endif
-
 #endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 6dbbe54..7a6d9eb 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -121,6 +121,30 @@ int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
 					    idlest_shift);
 }
 
+int cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
+{
+	if (!cm_ll_data->module_enable) {
+		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
+	return 0;
+}
+
+int cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
+{
+	if (!cm_ll_data->module_disable) {
+		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	cm_ll_data->module_disable(part, inst, clkctrl_offs);
+	return 0;
+}
+
 /**
  * cm_register - register per-SoC low-level data with the CM
  * @cld: low-level per-SoC OMAP CM data & function pointers to register
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index b189a2b..ac03410 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -319,13 +319,12 @@ static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
  * @mode: Module mode (SW or HW)
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
-			    u16 clkctrl_offs)
+static void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
+				       u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -339,13 +338,11 @@ void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
  * omap4_cminst_module_disable - Disable the module inside CLKCTRL
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-			     u16 clkctrl_offs)
+static void omap4_cminst_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -513,6 +510,8 @@ struct clkdm_ops am43xx_clkdm_operations = {
 static struct cm_ll_data omap4xxx_cm_ll_data = {
 	.wait_module_ready	= &omap4_cminst_wait_module_ready,
 	.wait_module_idle	= &omap4_cminst_wait_module_idle,
+	.module_enable		= &omap4_cminst_module_enable,
+	.module_disable		= &omap4_cminst_module_disable,
 };
 
 int __init omap4_cm_init(void)
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index d6634fa..ffbd721 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -11,10 +11,6 @@
 #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 
-extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
-				       u16 clkctrl_offs);
-extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
 /*
  * In an ideal world, we would not export these low-level functions,
  * but this will probably take some time to fix properly
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index daaff7a..a47cd17 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -979,11 +979,8 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
 	pr_debug("omap_hwmod: %s: %s: %d\n",
 		 oh->name, __func__, oh->prcm.omap4.modulemode);
 
-	omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
-				   oh->clkdm->prcm_partition,
-				   oh->clkdm->cm_inst,
-				   oh->clkdm->clkdm_offs,
-				   oh->prcm.omap4.clkctrl_offs);
+	cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->prcm_partition,
+			 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
 }
 
 /**
@@ -1001,9 +998,8 @@ static void _am33xx_enable_module(struct omap_hwmod *oh)
 	pr_debug("omap_hwmod: %s: %s: %d\n",
 		 oh->name, __func__, oh->prcm.omap4.modulemode);
 
-	am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
-				oh->clkdm->clkdm_offs,
-				oh->prcm.omap4.clkctrl_offs);
+	cm_module_enable(oh->prcm.omap4.modulemode, 0, oh->clkdm->cm_inst,
+			 oh->prcm.omap4.clkctrl_offs);
 }
 
 /**
@@ -1857,10 +1853,8 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
 
 	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
 
-	omap4_cminst_module_disable(oh->clkdm->prcm_partition,
-				    oh->clkdm->cm_inst,
-				    oh->clkdm->clkdm_offs,
-				    oh->prcm.omap4.clkctrl_offs);
+	cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
+			  oh->prcm.omap4.clkctrl_offs);
 
 	v = _omap4_wait_target_disable(oh);
 	if (v)
@@ -1889,8 +1883,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
 	if (_are_any_hardreset_lines_asserted(oh))
 		return 0;
 
-	am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
-				 oh->prcm.omap4.clkctrl_offs);
+	cm_module_disable(0, oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
 
 	v = _am33xx_wait_target_disable(oh);
 	if (v)
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 09/26] ARM: OMAP2+: CM: add common APIs for cm_module_enable/disable
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

Adds a generic CM driver API for enabling/disabling modules.
The SoC specific implementations are registered through cm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm.h         |    6 ++++++
 arch/arm/mach-omap2/cm33xx.c     |   11 +++++++----
 arch/arm/mach-omap2/cm33xx.h     |   17 -----------------
 arch/arm/mach-omap2/cm_common.c  |   24 ++++++++++++++++++++++++
 arch/arm/mach-omap2/cminst44xx.c |   11 +++++------
 arch/arm/mach-omap2/cminst44xx.h |    4 ----
 arch/arm/mach-omap2/omap_hwmod.c |   21 +++++++--------------
 7 files changed, 49 insertions(+), 45 deletions(-)

diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index fb7da5f..2eb21c5 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -46,6 +46,8 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
  * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
  * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
  * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
+ * @module_enable: ptr to the SoC CM-specific module_enable impl
+ * @module_disable: ptr to the SoC CM-specific module_disable impl
  */
 struct cm_ll_data {
 	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
@@ -54,6 +56,8 @@ struct cm_ll_data {
 				 u8 idlest_shift);
 	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
 				u8 idlest_shift);
+	void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
+	void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
 };
 
 extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
@@ -61,6 +65,8 @@ extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
 int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
 			 u8 idlest_shift);
 int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift);
+int cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
+int cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
 
 extern int cm_register(struct cm_ll_data *cld);
 extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index ffdcb7a..b9ad463 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -277,13 +277,14 @@ static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
 /**
  * am33xx_cm_module_enable - Enable the modulemode inside CLKCTRL
  * @mode: Module mode (SW or HW)
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static void am33xx_cm_module_enable(u8 mode, u8 part, u16 inst,
+				    u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -295,13 +296,13 @@ void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs)
 
 /**
  * am33xx_cm_module_disable - Disable the module inside CLKCTRL
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static void am33xx_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -368,6 +369,8 @@ struct clkdm_ops am33xx_clkdm_operations = {
 static struct cm_ll_data am33xx_cm_ll_data = {
 	.wait_module_ready	= &am33xx_cm_wait_module_ready,
 	.wait_module_idle	= &am33xx_cm_wait_module_idle,
+	.module_enable		= &am33xx_cm_module_enable,
+	.module_disable		= &am33xx_cm_module_disable,
 };
 
 int __init am33xx_cm_init(void)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 78a61e5..046b4b2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -375,22 +375,5 @@
 
 #ifndef __ASSEMBLER__
 int am33xx_cm_init(void);
-
-#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
-#else
-static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-}
-static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
-					u16 clkctrl_offs)
-{
-}
-#endif
-
 #endif /* ASSEMBLER */
 #endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index 6dbbe54..7a6d9eb 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -121,6 +121,30 @@ int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8 idlest_shift)
 					    idlest_shift);
 }
 
+int cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
+{
+	if (!cm_ll_data->module_enable) {
+		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
+	return 0;
+}
+
+int cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
+{
+	if (!cm_ll_data->module_disable) {
+		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	cm_ll_data->module_disable(part, inst, clkctrl_offs);
+	return 0;
+}
+
 /**
  * cm_register - register per-SoC low-level data with the CM
  * @cld: low-level per-SoC OMAP CM data & function pointers to register
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index b189a2b..ac03410 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -319,13 +319,12 @@ static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
  * @mode: Module mode (SW or HW)
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
-			    u16 clkctrl_offs)
+static void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
+				       u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -339,13 +338,11 @@ void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
  * omap4_cminst_module_disable - Disable the module inside CLKCTRL
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
  * @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
  * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
  *
  * No return value.
  */
-void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-			     u16 clkctrl_offs)
+static void omap4_cminst_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
 {
 	u32 v;
 
@@ -513,6 +510,8 @@ struct clkdm_ops am43xx_clkdm_operations = {
 static struct cm_ll_data omap4xxx_cm_ll_data = {
 	.wait_module_ready	= &omap4_cminst_wait_module_ready,
 	.wait_module_idle	= &omap4_cminst_wait_module_idle,
+	.module_enable		= &omap4_cminst_module_enable,
+	.module_disable		= &omap4_cminst_module_disable,
 };
 
 int __init omap4_cm_init(void)
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index d6634fa..ffbd721 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -11,10 +11,6 @@
 #ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 #define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
 
-extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
-				       u16 clkctrl_offs);
-extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-					u16 clkctrl_offs);
 /*
  * In an ideal world, we would not export these low-level functions,
  * but this will probably take some time to fix properly
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index daaff7a..a47cd17 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -979,11 +979,8 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
 	pr_debug("omap_hwmod: %s: %s: %d\n",
 		 oh->name, __func__, oh->prcm.omap4.modulemode);
 
-	omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
-				   oh->clkdm->prcm_partition,
-				   oh->clkdm->cm_inst,
-				   oh->clkdm->clkdm_offs,
-				   oh->prcm.omap4.clkctrl_offs);
+	cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->prcm_partition,
+			 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
 }
 
 /**
@@ -1001,9 +998,8 @@ static void _am33xx_enable_module(struct omap_hwmod *oh)
 	pr_debug("omap_hwmod: %s: %s: %d\n",
 		 oh->name, __func__, oh->prcm.omap4.modulemode);
 
-	am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
-				oh->clkdm->clkdm_offs,
-				oh->prcm.omap4.clkctrl_offs);
+	cm_module_enable(oh->prcm.omap4.modulemode, 0, oh->clkdm->cm_inst,
+			 oh->prcm.omap4.clkctrl_offs);
 }
 
 /**
@@ -1857,10 +1853,8 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
 
 	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
 
-	omap4_cminst_module_disable(oh->clkdm->prcm_partition,
-				    oh->clkdm->cm_inst,
-				    oh->clkdm->clkdm_offs,
-				    oh->prcm.omap4.clkctrl_offs);
+	cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
+			  oh->prcm.omap4.clkctrl_offs);
 
 	v = _omap4_wait_target_disable(oh);
 	if (v)
@@ -1889,8 +1883,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
 	if (_are_any_hardreset_lines_asserted(oh))
 		return 0;
 
-	am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
-				 oh->prcm.omap4.clkctrl_offs);
+	cm_module_disable(0, oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
 
 	v = _am33xx_wait_target_disable(oh);
 	if (v)
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 10/26] ARM: OMAP2/3: CM: make cm_split_idlest_reg SoC calls static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:08   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

CM driver has a generic API which calls the SoC specific split function
through cm_ll_data, so there is no need for the SoC specific functions to
be publicly available.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm2xxx.c |    5 +++--
 arch/arm/mach-omap2/cm2xxx.h |    2 --
 arch/arm/mach-omap2/cm3xxx.c |    5 +++--
 arch/arm/mach-omap2/cm3xxx.h |    3 ---
 4 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 365df9e..a96d901 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -204,8 +204,9 @@ void omap2xxx_cm_apll96_disable(void)
  * XXX This function is only needed until absolute register addresses are
  * removed from the OMAP struct clk records.
  */
-int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
-				 u8 *idlest_reg_id)
+static int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+					s16 *prcm_inst,
+					u8 *idlest_reg_id)
 {
 	unsigned long offs;
 	u8 idlest_offs;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index a14094b..c89502b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -56,8 +56,6 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 
 int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
 				  u8 idlest_shift);
-extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
-					s16 *prcm_inst, u8 *idlest_reg_id);
 extern int omap2xxx_cm_fclks_active(void);
 extern int omap2xxx_cm_mpu_retention_allowed(void);
 extern u32 omap2xxx_cm_get_core_clk_src(void);
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index a29c2bf..c6622b7 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -118,8 +118,9 @@ static int omap3xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
  * XXX This function is only needed until absolute register addresses are
  * removed from the OMAP struct clk records.
  */
-int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
-				 u8 *idlest_reg_id)
+static int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+					s16 *prcm_inst,
+					u8 *idlest_reg_id)
 {
 	unsigned long offs;
 	u8 idlest_offs;
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 33491c7..734a858 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -68,9 +68,6 @@
 
 #ifndef __ASSEMBLER__
 
-extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
-					s16 *prcm_inst, u8 *idlest_reg_id);
-
 extern void omap3_cm_save_context(void);
 extern void omap3_cm_restore_context(void);
 extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 10/26] ARM: OMAP2/3: CM: make cm_split_idlest_reg SoC calls static
@ 2014-09-01 18:08   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:08 UTC (permalink / raw)
  To: linux-arm-kernel

CM driver has a generic API which calls the SoC specific split function
through cm_ll_data, so there is no need for the SoC specific functions to
be publicly available.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm2xxx.c |    5 +++--
 arch/arm/mach-omap2/cm2xxx.h |    2 --
 arch/arm/mach-omap2/cm3xxx.c |    5 +++--
 arch/arm/mach-omap2/cm3xxx.h |    3 ---
 4 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 365df9e..a96d901 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -204,8 +204,9 @@ void omap2xxx_cm_apll96_disable(void)
  * XXX This function is only needed until absolute register addresses are
  * removed from the OMAP struct clk records.
  */
-int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
-				 u8 *idlest_reg_id)
+static int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+					s16 *prcm_inst,
+					u8 *idlest_reg_id)
 {
 	unsigned long offs;
 	u8 idlest_offs;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index a14094b..c89502b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -56,8 +56,6 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 
 int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
 				  u8 idlest_shift);
-extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
-					s16 *prcm_inst, u8 *idlest_reg_id);
 extern int omap2xxx_cm_fclks_active(void);
 extern int omap2xxx_cm_mpu_retention_allowed(void);
 extern u32 omap2xxx_cm_get_core_clk_src(void);
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index a29c2bf..c6622b7 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -118,8 +118,9 @@ static int omap3xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
  * XXX This function is only needed until absolute register addresses are
  * removed from the OMAP struct clk records.
  */
-int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
-				 u8 *idlest_reg_id)
+static int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+					s16 *prcm_inst,
+					u8 *idlest_reg_id)
 {
 	unsigned long offs;
 	u8 idlest_offs;
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 33491c7..734a858 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -68,9 +68,6 @@
 
 #ifndef __ASSEMBLER__
 
-extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
-					s16 *prcm_inst, u8 *idlest_reg_id);
-
 extern void omap3_cm_save_context(void);
 extern void omap3_cm_restore_context(void);
 extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 11/26] ARM: AM33xx: hwmod: remove am33xx specific module SoC opts
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These are now identical with the OMAP4 implementations, so use the OMAP4
versions and remove the AM33xx ones.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c |  104 ++------------------------------------
 1 file changed, 3 insertions(+), 101 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index a47cd17..0267af5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -984,25 +984,6 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Enables the PRCM module mode related to the hwmod @oh.
- * No return value.
- */
-static void _am33xx_enable_module(struct omap_hwmod *oh)
-{
-	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
-		return;
-
-	pr_debug("omap_hwmod: %s: %s: %d\n",
-		 oh->name, __func__, oh->prcm.omap4.modulemode);
-
-	cm_module_enable(oh->prcm.omap4.modulemode, 0, oh->clkdm->cm_inst,
-			 oh->prcm.omap4.clkctrl_offs);
-}
-
-/**
  * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  * @oh: struct omap_hwmod *
  *
@@ -1028,30 +1009,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to enter slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully enters
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_idle() function.
- */
-static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
-{
-	if (!oh)
-		return -EINVAL;
-
-	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
-		return 0;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	return cm_wait_module_idle(0, oh->clkdm->cm_inst,
-				   oh->prcm.omap4.clkctrl_offs, 0);
-}
-
-/**
  * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  * @oh: struct omap_hwmod *oh
  *
@@ -1865,35 +1822,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Disable the PRCM module mode related to the hwmod @oh.
- * Return EINVAL if the modulemode is not supported and 0 in case of success.
- */
-static int _am33xx_disable_module(struct omap_hwmod *oh)
-{
-	int v;
-
-	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
-		return -EINVAL;
-
-	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
-
-	if (_are_any_hardreset_lines_asserted(oh))
-		return 0;
-
-	cm_module_disable(0, oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
-
-	v = _am33xx_wait_target_disable(oh);
-	if (v)
-		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
-			oh->name);
-
-	return 0;
-}
-
-/**
  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  * @oh: struct omap_hwmod *
  *
@@ -2968,32 +2896,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
-{
-	if (!oh || !oh->clkdm)
-		return -EINVAL;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	if (!_find_mpu_rt_port(oh))
-		return 0;
-
-	/* XXX check module SIDLEMODE, hardreset status */
-
-	return cm_wait_module_ready(0, oh->clkdm->cm_inst,
-				    oh->prcm.omap4.clkctrl_offs, 0);
-}
-
-/**
  * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  * @oh: struct omap_hwmod * to assert hardreset
  * @ohri: hardreset line data
@@ -4218,9 +4120,9 @@ void __init omap_hwmod_init(void)
 		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 	} else if (soc_is_am33xx()) {
-		soc_ops.enable_module = _am33xx_enable_module;
-		soc_ops.disable_module = _am33xx_disable_module;
-		soc_ops.wait_target_ready = _am33xx_wait_target_ready;
+		soc_ops.enable_module = _omap4_enable_module;
+		soc_ops.disable_module = _omap4_disable_module;
+		soc_ops.wait_target_ready = _omap4_wait_target_ready;
 		soc_ops.assert_hardreset = _am33xx_assert_hardreset;
 		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 11/26] ARM: AM33xx: hwmod: remove am33xx specific module SoC opts
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These are now identical with the OMAP4 implementations, so use the OMAP4
versions and remove the AM33xx ones.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c |  104 ++------------------------------------
 1 file changed, 3 insertions(+), 101 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index a47cd17..0267af5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -984,25 +984,6 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Enables the PRCM module mode related to the hwmod @oh.
- * No return value.
- */
-static void _am33xx_enable_module(struct omap_hwmod *oh)
-{
-	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
-		return;
-
-	pr_debug("omap_hwmod: %s: %s: %d\n",
-		 oh->name, __func__, oh->prcm.omap4.modulemode);
-
-	cm_module_enable(oh->prcm.omap4.modulemode, 0, oh->clkdm->cm_inst,
-			 oh->prcm.omap4.clkctrl_offs);
-}
-
-/**
  * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  * @oh: struct omap_hwmod *
  *
@@ -1028,30 +1009,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to enter slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully enters
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_idle() function.
- */
-static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
-{
-	if (!oh)
-		return -EINVAL;
-
-	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
-		return 0;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	return cm_wait_module_idle(0, oh->clkdm->cm_inst,
-				   oh->prcm.omap4.clkctrl_offs, 0);
-}
-
-/**
  * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  * @oh: struct omap_hwmod *oh
  *
@@ -1865,35 +1822,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Disable the PRCM module mode related to the hwmod @oh.
- * Return EINVAL if the modulemode is not supported and 0 in case of success.
- */
-static int _am33xx_disable_module(struct omap_hwmod *oh)
-{
-	int v;
-
-	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
-		return -EINVAL;
-
-	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
-
-	if (_are_any_hardreset_lines_asserted(oh))
-		return 0;
-
-	cm_module_disable(0, oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
-
-	v = _am33xx_wait_target_disable(oh);
-	if (v)
-		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
-			oh->name);
-
-	return 0;
-}
-
-/**
  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  * @oh: struct omap_hwmod *
  *
@@ -2968,32 +2896,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 }
 
 /**
- * _am33xx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle.  Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
-{
-	if (!oh || !oh->clkdm)
-		return -EINVAL;
-
-	if (oh->flags & HWMOD_NO_IDLEST)
-		return 0;
-
-	if (!_find_mpu_rt_port(oh))
-		return 0;
-
-	/* XXX check module SIDLEMODE, hardreset status */
-
-	return cm_wait_module_ready(0, oh->clkdm->cm_inst,
-				    oh->prcm.omap4.clkctrl_offs, 0);
-}
-
-/**
  * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  * @oh: struct omap_hwmod * to assert hardreset
  * @ohri: hardreset line data
@@ -4218,9 +4120,9 @@ void __init omap_hwmod_init(void)
 		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 	} else if (soc_is_am33xx()) {
-		soc_ops.enable_module = _am33xx_enable_module;
-		soc_ops.disable_module = _am33xx_disable_module;
-		soc_ops.wait_target_ready = _am33xx_wait_target_ready;
+		soc_ops.enable_module = _omap4_enable_module;
+		soc_ops.disable_module = _omap4_disable_module;
+		soc_ops.wait_target_ready = _omap4_wait_target_ready;
 		soc_ops.assert_hardreset = _am33xx_assert_hardreset;
 		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
 		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 12/26] ARM: AM43xx: hwmod: use OMAP4 hardreset ops instead of the AM33xx version
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

AM43xx is using OMAP4+ PRM driver, so it should be using the corresponding
hardreset ops from the hwmod also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 0267af5..c52dc4c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4115,9 +4115,9 @@ void __init omap_hwmod_init(void)
 		soc_ops.enable_module = _omap4_enable_module;
 		soc_ops.disable_module = _omap4_disable_module;
 		soc_ops.wait_target_ready = _omap4_wait_target_ready;
-		soc_ops.assert_hardreset = _am33xx_assert_hardreset;
-		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
-		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
+		soc_ops.assert_hardreset = _omap4_assert_hardreset;
+		soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
+		soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 	} else if (soc_is_am33xx()) {
 		soc_ops.enable_module = _omap4_enable_module;
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 12/26] ARM: AM43xx: hwmod: use OMAP4 hardreset ops instead of the AM33xx version
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

AM43xx is using OMAP4+ PRM driver, so it should be using the corresponding
hardreset ops from the hwmod also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 0267af5..c52dc4c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4115,9 +4115,9 @@ void __init omap_hwmod_init(void)
 		soc_ops.enable_module = _omap4_enable_module;
 		soc_ops.disable_module = _omap4_disable_module;
 		soc_ops.wait_target_ready = _omap4_wait_target_ready;
-		soc_ops.assert_hardreset = _am33xx_assert_hardreset;
-		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
-		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
+		soc_ops.assert_hardreset = _omap4_assert_hardreset;
+		soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
+		soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
 		soc_ops.init_clkdm = _init_clkdm;
 	} else if (soc_is_am33xx()) {
 		soc_ops.enable_module = _omap4_enable_module;
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 13/26] ARM: AM33xx: PRM: add support for prm_init
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

Added support for prm_init for AM33xx SoC. This is needed to register
SoC specific prm_ll_data for these devices.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/io.c      |    2 ++
 arch/arm/mach-omap2/prm33xx.c |   13 +++++++++++++
 arch/arm/mach-omap2/prm33xx.h |    2 ++
 3 files changed, 17 insertions(+)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 26055d9..f1db801 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -53,6 +53,7 @@
 #include "cminst44xx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
+#include "prm33xx.h"
 #include "prm44xx.h"
 #include "opp2xxx.h"
 
@@ -583,6 +584,7 @@ void __init am33xx_init_early(void)
 	omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
 	omap3xxx_check_revision();
 	am33xx_check_features();
+	am33xx_prm_init();
 	am33xx_cm_init();
 	am33xx_powerdomains_init();
 	am33xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 62709cd..f149e7c 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -342,3 +342,16 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_wait_transition		= am33xx_pwrdm_wait_transition,
 	.pwrdm_has_voltdm		= am33xx_check_vcvp,
 };
+
+static struct prm_ll_data am33xx_prm_ll_data;
+
+int __init am33xx_prm_init(void)
+{
+	return prm_register(&am33xx_prm_ll_data);
+}
+
+static void __exit am33xx_prm_exit(void)
+{
+	prm_unregister(&am33xx_prm_ll_data);
+}
+__exitcall(am33xx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 9b9918d..5cdfdc0 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -127,5 +127,7 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
 extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
 extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
 		u16 rstctrl_offs, u16 rstst_offs);
+int am33xx_prm_init(void);
+
 #endif /* ASSEMBLER */
 #endif
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 13/26] ARM: AM33xx: PRM: add support for prm_init
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

Added support for prm_init for AM33xx SoC. This is needed to register
SoC specific prm_ll_data for these devices.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/io.c      |    2 ++
 arch/arm/mach-omap2/prm33xx.c |   13 +++++++++++++
 arch/arm/mach-omap2/prm33xx.h |    2 ++
 3 files changed, 17 insertions(+)

diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 26055d9..f1db801 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -53,6 +53,7 @@
 #include "cminst44xx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
+#include "prm33xx.h"
 #include "prm44xx.h"
 #include "opp2xxx.h"
 
@@ -583,6 +584,7 @@ void __init am33xx_init_early(void)
 	omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
 	omap3xxx_check_revision();
 	am33xx_check_features();
+	am33xx_prm_init();
 	am33xx_cm_init();
 	am33xx_powerdomains_init();
 	am33xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 62709cd..f149e7c 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -342,3 +342,16 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_wait_transition		= am33xx_pwrdm_wait_transition,
 	.pwrdm_has_voltdm		= am33xx_check_vcvp,
 };
+
+static struct prm_ll_data am33xx_prm_ll_data;
+
+int __init am33xx_prm_init(void)
+{
+	return prm_register(&am33xx_prm_ll_data);
+}
+
+static void __exit am33xx_prm_exit(void)
+{
+	prm_unregister(&am33xx_prm_ll_data);
+}
+__exitcall(am33xx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 9b9918d..5cdfdc0 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -127,5 +127,7 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
 extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
 extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
 		u16 rstctrl_offs, u16 rstst_offs);
+int am33xx_prm_init(void);
+
 #endif /* ASSEMBLER */
 #endif
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 14/26] ARM: OMAP2+: PRM: add generic API for asserting hardware reset
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

PRM driver now has a generic API for asserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |   18 +++++++++---------
 arch/arm/mach-omap2/prm.h          |    3 +++
 arch/arm/mach-omap2/prm2xxx.c      |    1 +
 arch/arm/mach-omap2/prm2xxx_3xxx.c |    6 ++++--
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    3 ++-
 arch/arm/mach-omap2/prm33xx.c      |    8 ++++++--
 arch/arm/mach-omap2/prm33xx.h      |    1 -
 arch/arm/mach-omap2/prm3xxx.c      |    1 +
 arch/arm/mach-omap2/prm44xx.c      |    1 +
 arch/arm/mach-omap2/prm_common.c   |   20 ++++++++++++++++++++
 10 files changed, 47 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index c52dc4c..9044ec2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2909,8 +2909,8 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
 				   struct omap_hwmod_rst_info *ohri)
 {
-	return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
-					  ohri->rst_shift);
+	return prm_assert_hardreset(ohri->rst_shift, 0,
+				    oh->prcm.omap2.module_offs, 0);
 }
 
 /**
@@ -2969,10 +2969,10 @@ static int _omap4_assert_hardreset(struct omap_hwmod *oh,
 	if (!oh->clkdm)
 		return -EINVAL;
 
-	return omap4_prminst_assert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_partition,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_assert_hardreset(ohri->rst_shift,
+				    oh->clkdm->pwrdm.ptr->prcm_partition,
+				    oh->clkdm->pwrdm.ptr->prcm_offs,
+				    oh->prcm.omap4.rstctrl_offs);
 }
 
 /**
@@ -3042,9 +3042,9 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
 				   struct omap_hwmod_rst_info *ohri)
 
 {
-	return am33xx_prm_assert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_assert_hardreset(ohri->rst_shift, 0,
+				    oh->clkdm->pwrdm.ptr->prcm_offs,
+				    oh->prcm.omap4.rstctrl_offs);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 9f4d747..6eea160 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -128,6 +128,7 @@ struct prm_reset_src_map {
  * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
  * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
  * @late_init: ptr to the late init function
+ * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
  *
  * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
  * deprecated.
@@ -137,11 +138,13 @@ struct prm_ll_data {
 	bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
 	void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
 	int (*late_init)(void);
+	int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
 extern int prm_unregister(struct prm_ll_data *pld);
 
+int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 8695805..fa4448b 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -212,6 +212,7 @@ struct pwrdm_ops omap2_pwrdm_operations = {
 
 static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.read_reset_sources = &omap2xxx_prm_read_reset_sources,
+	.assert_hardreset = &omap2_prm_assert_hardreset,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index c13b4e2..8758cd6 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -39,8 +39,10 @@ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
 
 /**
  * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
- * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  * @shift: register bit shift corresponding to the reset line to assert
+ * @part: PRM partition, ignored for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @offset: register offset, ignored for OMAP2
  *
  * Some IPs like dsp or iva contain processors that require an HW
  * reset line to be asserted / deasserted in order to fully enable the
@@ -49,7 +51,7 @@ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
  * place the submodule into reset.  Returns 0 upon success or -EINVAL
  * upon an argument error.
  */
-int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
+int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
 {
 	u32 mask;
 
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 1a3a963..9674962 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -101,7 +101,8 @@ static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 
 /* These omap2_ PRM functions apply to both OMAP2 and 3 */
 extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
-extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
+int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
+			       u16 offset);
 extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 
 extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index f149e7c..992a40e 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -73,6 +73,7 @@ int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
 /**
  * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule
  * @shift: register bit shift corresponding to the reset line to assert
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @rstctrl_reg: RM_RSTCTRL register address for this module
  *
@@ -83,7 +84,8 @@ int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
  * place the submodule into reset.  Returns 0 upon success or -EINVAL
  * upon an argument error.
  */
-int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)
+static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
+				       u16 rstctrl_offs)
 {
 	u32 mask = 1 << shift;
 
@@ -343,7 +345,9 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_has_voltdm		= am33xx_check_vcvp,
 };
 
-static struct prm_ll_data am33xx_prm_ll_data;
+static struct prm_ll_data am33xx_prm_ll_data = {
+	.assert_hardreset		= am33xx_prm_assert_hardreset,
+};
 
 int __init am33xx_prm_init(void)
 {
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 5cdfdc0..1d9aad8 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -124,7 +124,6 @@ extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
 extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
 		u16 rstctrl_offs);
-extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
 extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
 		u16 rstctrl_offs, u16 rstst_offs);
 int am33xx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index e0088e0..fc01e52 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -640,6 +640,7 @@ static int omap3xxx_prm_late_init(void);
 static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.read_reset_sources = &omap3xxx_prm_read_reset_sources,
 	.late_init = &omap3xxx_prm_late_init,
+	.assert_hardreset = &omap2_prm_assert_hardreset,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 76e75aa..1c86270 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -688,6 +688,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
 	.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
 	.late_init = &omap44xx_prm_late_init,
+	.assert_hardreset	= omap4_prminst_assert_hardreset,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 76ca320..c5c4414 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -423,6 +423,26 @@ void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
 }
 
 /**
+ * prm_assert_hardreset - assert hardreset for an IP block
+ * @shift: register bit shift corresponding to the reset line
+ * @part: PRM partition
+ * @prm_mod: PRM submodule base or instance offset
+ * @offset: register offset
+ *
+ * Asserts a hardware reset line for an IP block.
+ */
+int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
+{
+	if (!prm_ll_data->assert_hardreset) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 14/26] ARM: OMAP2+: PRM: add generic API for asserting hardware reset
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

PRM driver now has a generic API for asserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |   18 +++++++++---------
 arch/arm/mach-omap2/prm.h          |    3 +++
 arch/arm/mach-omap2/prm2xxx.c      |    1 +
 arch/arm/mach-omap2/prm2xxx_3xxx.c |    6 ++++--
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    3 ++-
 arch/arm/mach-omap2/prm33xx.c      |    8 ++++++--
 arch/arm/mach-omap2/prm33xx.h      |    1 -
 arch/arm/mach-omap2/prm3xxx.c      |    1 +
 arch/arm/mach-omap2/prm44xx.c      |    1 +
 arch/arm/mach-omap2/prm_common.c   |   20 ++++++++++++++++++++
 10 files changed, 47 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index c52dc4c..9044ec2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2909,8 +2909,8 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
 				   struct omap_hwmod_rst_info *ohri)
 {
-	return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
-					  ohri->rst_shift);
+	return prm_assert_hardreset(ohri->rst_shift, 0,
+				    oh->prcm.omap2.module_offs, 0);
 }
 
 /**
@@ -2969,10 +2969,10 @@ static int _omap4_assert_hardreset(struct omap_hwmod *oh,
 	if (!oh->clkdm)
 		return -EINVAL;
 
-	return omap4_prminst_assert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_partition,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_assert_hardreset(ohri->rst_shift,
+				    oh->clkdm->pwrdm.ptr->prcm_partition,
+				    oh->clkdm->pwrdm.ptr->prcm_offs,
+				    oh->prcm.omap4.rstctrl_offs);
 }
 
 /**
@@ -3042,9 +3042,9 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
 				   struct omap_hwmod_rst_info *ohri)
 
 {
-	return am33xx_prm_assert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_assert_hardreset(ohri->rst_shift, 0,
+				    oh->clkdm->pwrdm.ptr->prcm_offs,
+				    oh->prcm.omap4.rstctrl_offs);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 9f4d747..6eea160 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -128,6 +128,7 @@ struct prm_reset_src_map {
  * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
  * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
  * @late_init: ptr to the late init function
+ * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
  *
  * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
  * deprecated.
@@ -137,11 +138,13 @@ struct prm_ll_data {
 	bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
 	void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
 	int (*late_init)(void);
+	int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
 extern int prm_unregister(struct prm_ll_data *pld);
 
+int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 8695805..fa4448b 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -212,6 +212,7 @@ struct pwrdm_ops omap2_pwrdm_operations = {
 
 static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.read_reset_sources = &omap2xxx_prm_read_reset_sources,
+	.assert_hardreset = &omap2_prm_assert_hardreset,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index c13b4e2..8758cd6 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -39,8 +39,10 @@ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
 
 /**
  * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
- * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  * @shift: register bit shift corresponding to the reset line to assert
+ * @part: PRM partition, ignored for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @offset: register offset, ignored for OMAP2
  *
  * Some IPs like dsp or iva contain processors that require an HW
  * reset line to be asserted / deasserted in order to fully enable the
@@ -49,7 +51,7 @@ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
  * place the submodule into reset.  Returns 0 upon success or -EINVAL
  * upon an argument error.
  */
-int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
+int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
 {
 	u32 mask;
 
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 1a3a963..9674962 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -101,7 +101,8 @@ static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 
 /* These omap2_ PRM functions apply to both OMAP2 and 3 */
 extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
-extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
+int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
+			       u16 offset);
 extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 
 extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index f149e7c..992a40e 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -73,6 +73,7 @@ int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
 /**
  * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule
  * @shift: register bit shift corresponding to the reset line to assert
+ * @part: CM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @rstctrl_reg: RM_RSTCTRL register address for this module
  *
@@ -83,7 +84,8 @@ int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
  * place the submodule into reset.  Returns 0 upon success or -EINVAL
  * upon an argument error.
  */
-int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs)
+static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
+				       u16 rstctrl_offs)
 {
 	u32 mask = 1 << shift;
 
@@ -343,7 +345,9 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_has_voltdm		= am33xx_check_vcvp,
 };
 
-static struct prm_ll_data am33xx_prm_ll_data;
+static struct prm_ll_data am33xx_prm_ll_data = {
+	.assert_hardreset		= am33xx_prm_assert_hardreset,
+};
 
 int __init am33xx_prm_init(void)
 {
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 5cdfdc0..1d9aad8 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -124,7 +124,6 @@ extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
 extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
 		u16 rstctrl_offs);
-extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
 extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
 		u16 rstctrl_offs, u16 rstst_offs);
 int am33xx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index e0088e0..fc01e52 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -640,6 +640,7 @@ static int omap3xxx_prm_late_init(void);
 static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.read_reset_sources = &omap3xxx_prm_read_reset_sources,
 	.late_init = &omap3xxx_prm_late_init,
+	.assert_hardreset = &omap2_prm_assert_hardreset,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 76e75aa..1c86270 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -688,6 +688,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
 	.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
 	.late_init = &omap44xx_prm_late_init,
+	.assert_hardreset	= omap4_prminst_assert_hardreset,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 76ca320..c5c4414 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -423,6 +423,26 @@ void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx)
 }
 
 /**
+ * prm_assert_hardreset - assert hardreset for an IP block
+ * @shift: register bit shift corresponding to the reset line
+ * @part: PRM partition
+ * @prm_mod: PRM submodule base or instance offset
+ * @offset: register offset
+ *
+ * Asserts a hardware reset line for an IP block.
+ */
+int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
+{
+	if (!prm_ll_data->assert_hardreset) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return prm_ll_data->assert_hardreset(shift, part, prm_mod, offset);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 15/26] ARM: OMAP2+: PRM: add generic API for deasserting hardware reset
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

PRM driver now has a generic API for deasserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |   22 ++++++++++------------
 arch/arm/mach-omap2/prm.h          |    5 +++++
 arch/arm/mach-omap2/prm2xxx.c      |    1 +
 arch/arm/mach-omap2/prm2xxx_3xxx.c |    7 ++++++-
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    4 +++-
 arch/arm/mach-omap2/prm33xx.c      |    8 ++++++--
 arch/arm/mach-omap2/prm33xx.h      |    2 --
 arch/arm/mach-omap2/prm3xxx.c      |    1 +
 arch/arm/mach-omap2/prm44xx.c      |    1 +
 arch/arm/mach-omap2/prm_common.c   |   24 ++++++++++++++++++++++++
 arch/arm/mach-omap2/prminst44xx.c  |   10 +++++++---
 arch/arm/mach-omap2/prminst44xx.h  |    5 +++--
 12 files changed, 67 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9044ec2..57ff628 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2927,9 +2927,8 @@ static int _omap2_assert_hardreset(struct omap_hwmod *oh,
 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
 				     struct omap_hwmod_rst_info *ohri)
 {
-	return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
-					    ohri->rst_shift,
-					    ohri->st_shift);
+	return prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
+				      oh->prcm.omap2.module_offs, 0, 0);
 }
 
 /**
@@ -2996,10 +2995,10 @@ static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
 	if (ohri->st_shift)
 		pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
 		       oh->name, ohri->name);
-	return omap4_prminst_deassert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_partition,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_deassert_hardreset(ohri->rst_shift, 0,
+				      oh->clkdm->pwrdm.ptr->prcm_partition,
+				      oh->clkdm->pwrdm.ptr->prcm_offs,
+				      oh->prcm.omap4.rstctrl_offs, 0);
 }
 
 /**
@@ -3062,11 +3061,10 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
 				     struct omap_hwmod_rst_info *ohri)
 {
-	return am33xx_prm_deassert_hardreset(ohri->rst_shift,
-				ohri->st_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs,
-				oh->prcm.omap4.rstst_offs);
+	return prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
+				      oh->clkdm->pwrdm.ptr->prcm_offs,
+				      oh->prcm.omap4.rstctrl_offs,
+				      oh->prcm.omap4.rstst_offs);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 6eea160..790bb22 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -129,6 +129,7 @@ struct prm_reset_src_map {
  * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
  * @late_init: ptr to the late init function
  * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
+ * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl
  *
  * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
  * deprecated.
@@ -139,12 +140,16 @@ struct prm_ll_data {
 	void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
 	int (*late_init)(void);
 	int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
+	int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+				  u16 offset, u16 st_offset);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
 extern int prm_unregister(struct prm_ll_data *pld);
 
 int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
+int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+			   u16 offset, u16 st_offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index fa4448b..343fc73 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -213,6 +213,7 @@ struct pwrdm_ops omap2_pwrdm_operations = {
 static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.read_reset_sources = &omap2xxx_prm_read_reset_sources,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
+	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 8758cd6..9466b1e 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -66,6 +66,10 @@ int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
  * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  * @rst_shift: register bit shift corresponding to the reset line to deassert
  * @st_shift: register bit shift for the status of the deasserted submodule
+ * @part: PRM partition, not used for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @rst_offset: reset register offset, not used for OMAP2
+ * @st_offset: reset status register offset, not used for OMAP2
  *
  * Some IPs like dsp or iva contain processors that require an HW
  * reset line to be asserted / deasserted in order to fully enable the
@@ -76,7 +80,8 @@ int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
+int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
+				 s16 prm_mod, u16 rst_offset, u16 st_offset)
 {
 	u32 rst, st;
 	int c;
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 9674962..253d414 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -103,7 +103,9 @@ static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
 int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
 			       u16 offset);
-extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
+int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
+				 s16 prm_mod, u16 reset_offset,
+				 u16 st_offset);
 
 extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
 extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 992a40e..ea0fea6 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -98,6 +98,8 @@ static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
  * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and
  * wait
  * @shift: register bit shift corresponding to the reset line to deassert
+ * @st_shift: reset status register bit shift corresponding to the reset line
+ * @part: PRM partition, not used for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @rstctrl_reg: RM_RSTCTRL register address for this module
  * @rstst_reg: RM_RSTST register address for this module
@@ -111,8 +113,9 @@ static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
-		u16 rstctrl_offs, u16 rstst_offs)
+static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
+					 s16 inst, u16 rstctrl_offs,
+					 u16 rstst_offs)
 {
 	int c;
 	u32 mask = 1 << st_shift;
@@ -347,6 +350,7 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 
 static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
+	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
 };
 
 int __init am33xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 1d9aad8..6d483e0 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -124,8 +124,6 @@ extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
 extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
 		u16 rstctrl_offs);
-extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
-		u16 rstctrl_offs, u16 rstst_offs);
 int am33xx_prm_init(void);
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index fc01e52..e954195 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -641,6 +641,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.read_reset_sources = &omap3xxx_prm_read_reset_sources,
 	.late_init = &omap3xxx_prm_late_init,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
+	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 1c86270..0da2ba8 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -689,6 +689,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
 	.late_init = &omap44xx_prm_late_init,
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
+	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index c5c4414..f5fa06e 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -443,6 +443,30 @@ int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
 }
 
 /**
+ * prm_deassert_hardreset - deassert hardreset for an IP block
+ * @shift: register bit shift corresponding to the reset line
+ * @st_shift: reset status bit shift corresponding to the reset line
+ * @part: PRM partition
+ * @prm_mod: PRM submodule base or instance offset
+ * @offset: register offset
+ * @st_offset: status register offset
+ *
+ * Deasserts a hardware reset line for an IP block.
+ */
+int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+			   u16 offset, u16 st_offset)
+{
+	if (!prm_ll_data->deassert_hardreset) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,
+					       offset, st_offset);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 225e025..8adf7b1 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -148,8 +148,12 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
 /**
  * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and
  * wait
- * @rstctrl_reg: RM_RSTCTRL register address for this module
  * @shift: register bit shift corresponding to the reset line to deassert
+ * @st_shift: status bit offset, not used for OMAP4+
+ * @part: PRM partition
+ * @inst: PRM instance offset
+ * @rstctrl_offs: reset register offset
+ * @st_offs: reset status register offset, not used for OMAP4+
  *
  * Some IPs like dsp, ipu or iva contain processors that require an HW
  * reset line to be asserted / deasserted in order to fully enable the
@@ -160,8 +164,8 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
-				     u16 rstctrl_offs)
+int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,
+				     u16 rstctrl_offs, u16 st_offs)
 {
 	int c;
 	u32 mask = 1 << shift;
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index 583aa37..fb1c9d7 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -30,8 +30,9 @@ extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
 					       u16 rstctrl_offs);
 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
 					  u16 rstctrl_offs);
-extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
-					    u16 rstctrl_offs);
+int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
+				     s16 inst, u16 rstctrl_offs,
+				     u16 rstst_offs);
 
 extern void omap_prm_base_init(void);
 
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 15/26] ARM: OMAP2+: PRM: add generic API for deasserting hardware reset
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

PRM driver now has a generic API for deasserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |   22 ++++++++++------------
 arch/arm/mach-omap2/prm.h          |    5 +++++
 arch/arm/mach-omap2/prm2xxx.c      |    1 +
 arch/arm/mach-omap2/prm2xxx_3xxx.c |    7 ++++++-
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    4 +++-
 arch/arm/mach-omap2/prm33xx.c      |    8 ++++++--
 arch/arm/mach-omap2/prm33xx.h      |    2 --
 arch/arm/mach-omap2/prm3xxx.c      |    1 +
 arch/arm/mach-omap2/prm44xx.c      |    1 +
 arch/arm/mach-omap2/prm_common.c   |   24 ++++++++++++++++++++++++
 arch/arm/mach-omap2/prminst44xx.c  |   10 +++++++---
 arch/arm/mach-omap2/prminst44xx.h  |    5 +++--
 12 files changed, 67 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9044ec2..57ff628 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2927,9 +2927,8 @@ static int _omap2_assert_hardreset(struct omap_hwmod *oh,
 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
 				     struct omap_hwmod_rst_info *ohri)
 {
-	return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
-					    ohri->rst_shift,
-					    ohri->st_shift);
+	return prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
+				      oh->prcm.omap2.module_offs, 0, 0);
 }
 
 /**
@@ -2996,10 +2995,10 @@ static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
 	if (ohri->st_shift)
 		pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
 		       oh->name, ohri->name);
-	return omap4_prminst_deassert_hardreset(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_partition,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_deassert_hardreset(ohri->rst_shift, 0,
+				      oh->clkdm->pwrdm.ptr->prcm_partition,
+				      oh->clkdm->pwrdm.ptr->prcm_offs,
+				      oh->prcm.omap4.rstctrl_offs, 0);
 }
 
 /**
@@ -3062,11 +3061,10 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
 				     struct omap_hwmod_rst_info *ohri)
 {
-	return am33xx_prm_deassert_hardreset(ohri->rst_shift,
-				ohri->st_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs,
-				oh->prcm.omap4.rstst_offs);
+	return prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
+				      oh->clkdm->pwrdm.ptr->prcm_offs,
+				      oh->prcm.omap4.rstctrl_offs,
+				      oh->prcm.omap4.rstst_offs);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 6eea160..790bb22 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -129,6 +129,7 @@ struct prm_reset_src_map {
  * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
  * @late_init: ptr to the late init function
  * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
+ * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl
  *
  * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
  * deprecated.
@@ -139,12 +140,16 @@ struct prm_ll_data {
 	void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
 	int (*late_init)(void);
 	int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
+	int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+				  u16 offset, u16 st_offset);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
 extern int prm_unregister(struct prm_ll_data *pld);
 
 int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
+int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+			   u16 offset, u16 st_offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index fa4448b..343fc73 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -213,6 +213,7 @@ struct pwrdm_ops omap2_pwrdm_operations = {
 static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.read_reset_sources = &omap2xxx_prm_read_reset_sources,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
+	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 8758cd6..9466b1e 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -66,6 +66,10 @@ int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
  * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  * @rst_shift: register bit shift corresponding to the reset line to deassert
  * @st_shift: register bit shift for the status of the deasserted submodule
+ * @part: PRM partition, not used for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @rst_offset: reset register offset, not used for OMAP2
+ * @st_offset: reset status register offset, not used for OMAP2
  *
  * Some IPs like dsp or iva contain processors that require an HW
  * reset line to be asserted / deasserted in order to fully enable the
@@ -76,7 +80,8 @@ int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
+int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
+				 s16 prm_mod, u16 rst_offset, u16 st_offset)
 {
 	u32 rst, st;
 	int c;
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 9674962..253d414 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -103,7 +103,9 @@ static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
 int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
 			       u16 offset);
-extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
+int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
+				 s16 prm_mod, u16 reset_offset,
+				 u16 st_offset);
 
 extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
 extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 992a40e..ea0fea6 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -98,6 +98,8 @@ static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
  * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and
  * wait
  * @shift: register bit shift corresponding to the reset line to deassert
+ * @st_shift: reset status register bit shift corresponding to the reset line
+ * @part: PRM partition, not used for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @rstctrl_reg: RM_RSTCTRL register address for this module
  * @rstst_reg: RM_RSTST register address for this module
@@ -111,8 +113,9 @@ static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst,
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
-		u16 rstctrl_offs, u16 rstst_offs)
+static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
+					 s16 inst, u16 rstctrl_offs,
+					 u16 rstst_offs)
 {
 	int c;
 	u32 mask = 1 << st_shift;
@@ -347,6 +350,7 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 
 static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
+	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
 };
 
 int __init am33xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 1d9aad8..6d483e0 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -124,8 +124,6 @@ extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
 extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
 		u16 rstctrl_offs);
-extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
-		u16 rstctrl_offs, u16 rstst_offs);
 int am33xx_prm_init(void);
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index fc01e52..e954195 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -641,6 +641,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.read_reset_sources = &omap3xxx_prm_read_reset_sources,
 	.late_init = &omap3xxx_prm_late_init,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
+	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 1c86270..0da2ba8 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -689,6 +689,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
 	.late_init = &omap44xx_prm_late_init,
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
+	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index c5c4414..f5fa06e 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -443,6 +443,30 @@ int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset)
 }
 
 /**
+ * prm_deassert_hardreset - deassert hardreset for an IP block
+ * @shift: register bit shift corresponding to the reset line
+ * @st_shift: reset status bit shift corresponding to the reset line
+ * @part: PRM partition
+ * @prm_mod: PRM submodule base or instance offset
+ * @offset: register offset
+ * @st_offset: status register offset
+ *
+ * Deasserts a hardware reset line for an IP block.
+ */
+int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+			   u16 offset, u16 st_offset)
+{
+	if (!prm_ll_data->deassert_hardreset) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return prm_ll_data->deassert_hardreset(shift, st_shift, part, prm_mod,
+					       offset, st_offset);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c
index 225e025..8adf7b1 100644
--- a/arch/arm/mach-omap2/prminst44xx.c
+++ b/arch/arm/mach-omap2/prminst44xx.c
@@ -148,8 +148,12 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
 /**
  * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and
  * wait
- * @rstctrl_reg: RM_RSTCTRL register address for this module
  * @shift: register bit shift corresponding to the reset line to deassert
+ * @st_shift: status bit offset, not used for OMAP4+
+ * @part: PRM partition
+ * @inst: PRM instance offset
+ * @rstctrl_offs: reset register offset
+ * @st_offs: reset status register offset, not used for OMAP4+
  *
  * Some IPs like dsp, ipu or iva contain processors that require an HW
  * reset line to be asserted / deasserted in order to fully enable the
@@ -160,8 +164,8 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
  * -EINVAL upon an argument error, -EEXIST if the submodule was already out
  * of reset, or -EBUSY if the submodule did not exit reset promptly.
  */
-int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
-				     u16 rstctrl_offs)
+int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,
+				     u16 rstctrl_offs, u16 st_offs)
 {
 	int c;
 	u32 mask = 1 << shift;
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index 583aa37..fb1c9d7 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -30,8 +30,9 @@ extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
 					       u16 rstctrl_offs);
 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
 					  u16 rstctrl_offs);
-extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
-					    u16 rstctrl_offs);
+int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
+				     s16 inst, u16 rstctrl_offs,
+				     u16 rstst_offs);
 
 extern void omap_prm_base_init(void);
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 16/26] ARM: OMAP2+: PRM: add generic API for checking hardreset status
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

PRM driver now has a generic API for checking hardreset status. SoC
specific support functions are registered through the prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |   18 +++++++++---------
 arch/arm/mach-omap2/prm.h          |    3 +++
 arch/arm/mach-omap2/prm2xxx.c      |    1 +
 arch/arm/mach-omap2/prm2xxx_3xxx.c |    6 ++++--
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    2 +-
 arch/arm/mach-omap2/prm33xx.c      |    9 ++++++---
 arch/arm/mach-omap2/prm33xx.h      |    2 --
 arch/arm/mach-omap2/prm3xxx.c      |    1 +
 arch/arm/mach-omap2/prm44xx.c      |    1 +
 arch/arm/mach-omap2/prm_common.c   |   20 ++++++++++++++++++++
 10 files changed, 46 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 57ff628..24d9599 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2946,8 +2946,8 @@ static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
 					struct omap_hwmod_rst_info *ohri)
 {
-	return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
-					       ohri->st_shift);
+	return prm_is_hardreset_asserted(ohri->st_shift, 0,
+					 oh->prcm.omap2.module_offs, 0);
 }
 
 /**
@@ -3019,10 +3019,10 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
 	if (!oh->clkdm)
 		return -EINVAL;
 
-	return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_partition,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_is_hardreset_asserted(ohri->rst_shift,
+					 oh->clkdm->pwrdm.ptr->prcm_partition,
+					 oh->clkdm->pwrdm.ptr->prcm_offs,
+					 oh->prcm.omap4.rstctrl_offs);
 }
 
 /**
@@ -3082,9 +3082,9 @@ static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
 static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
 					struct omap_hwmod_rst_info *ohri)
 {
-	return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_is_hardreset_asserted(ohri->rst_shift, 0,
+					 oh->clkdm->pwrdm.ptr->prcm_offs,
+					 oh->prcm.omap4.rstctrl_offs);
 }
 
 /* Public functions */
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 790bb22..0dd8d83 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -142,6 +142,8 @@ struct prm_ll_data {
 	int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
 	int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 				  u16 offset, u16 st_offset);
+	int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
+				     u16 offset);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
@@ -150,6 +152,7 @@ extern int prm_unregister(struct prm_ll_data *pld);
 int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
 int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 			   u16 offset, u16 st_offset);
+int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 343fc73..54ae555 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -214,6 +214,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.read_reset_sources = &omap2xxx_prm_read_reset_sources,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
+	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9466b1e..cc3341f 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -24,14 +24,16 @@
 /**
  * omap2_prm_is_hardreset_asserted - read the HW reset line state of
  * submodules contained in the hwmod module
- * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  * @shift: register bit shift corresponding to the reset line to check
+ * @part: PRM partition, ignored for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @offset: register offset, ignored for OMAP2
  *
  * Returns 1 if the (sub)module hardreset line is currently asserted,
  * 0 if the (sub)module hardreset line is not currently asserted, or
  * -EINVAL if called while running on a non-OMAP2/3 chip.
  */
-int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
+int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
 {
 	return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
 				       (1 << shift));
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 253d414..f57e29b 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -100,7 +100,7 @@ static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 }
 
 /* These omap2_ PRM functions apply to both OMAP2 and 3 */
-extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
+int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
 int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
 			       u16 offset);
 int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index ea0fea6..3cbfb78 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -52,6 +52,7 @@ u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
  * am33xx_prm_is_hardreset_asserted - read the HW reset line state of
  * submodules contained in the hwmod module
  * @shift: register bit shift corresponding to the reset line to check
+ * @part: PRM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @rstctrl_offs: RM_RSTCTRL register address offset for this module
  *
@@ -59,7 +60,8 @@ u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
  * 0 if the (sub)module hardreset line is not currently asserted, or
  * -EINVAL upon parameter error.
  */
-int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
+static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
+					    u16 rstctrl_offs)
 {
 	u32 v;
 
@@ -121,7 +123,7 @@ static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
 	u32 mask = 1 << st_shift;
 
 	/* Check the current status to avoid  de-asserting the line twice */
-	if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
+	if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0)
 		return -EEXIST;
 
 	/* Clear the reset status by writing 1 to the status bit */
@@ -133,7 +135,7 @@ static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
 	am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
 
 	/* wait the status to be set */
-	omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst,
+	omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, 0, inst,
 							   rstst_offs),
 			  MAX_MODULE_HARDRESET_WAIT, c);
 
@@ -351,6 +353,7 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
 	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
+	.is_hardreset_asserted		= am33xx_prm_is_hardreset_asserted,
 };
 
 int __init am33xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 6d483e0..49ad5b8 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -122,8 +122,6 @@ extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
 extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
 extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
-extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
-		u16 rstctrl_offs);
 int am33xx_prm_init(void);
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index e954195..5c1bb25 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -642,6 +642,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.late_init = &omap3xxx_prm_late_init,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
+	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0da2ba8..d357ca9 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -690,6 +690,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.late_init = &omap44xx_prm_late_init,
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
 	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
+	.is_hardreset_asserted	= omap4_prminst_is_hardreset_asserted,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index f5fa06e..f246bb4 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -467,6 +467,26 @@ int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 }
 
 /**
+ * prm_is_hardreset_asserted - check the hardreset status for an IP block
+ * @shift: register bit shift corresponding to the reset line
+ * @part: PRM partition
+ * @prm_mod: PRM submodule base or instance offset
+ * @offset: register offset
+ *
+ * Checks if a hardware reset line for an IP block is enabled or not.
+ */
+int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
+{
+	if (!prm_ll_data->is_hardreset_asserted) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 16/26] ARM: OMAP2+: PRM: add generic API for checking hardreset status
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

PRM driver now has a generic API for checking hardreset status. SoC
specific support functions are registered through the prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |   18 +++++++++---------
 arch/arm/mach-omap2/prm.h          |    3 +++
 arch/arm/mach-omap2/prm2xxx.c      |    1 +
 arch/arm/mach-omap2/prm2xxx_3xxx.c |    6 ++++--
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    2 +-
 arch/arm/mach-omap2/prm33xx.c      |    9 ++++++---
 arch/arm/mach-omap2/prm33xx.h      |    2 --
 arch/arm/mach-omap2/prm3xxx.c      |    1 +
 arch/arm/mach-omap2/prm44xx.c      |    1 +
 arch/arm/mach-omap2/prm_common.c   |   20 ++++++++++++++++++++
 10 files changed, 46 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 57ff628..24d9599 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2946,8 +2946,8 @@ static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
 					struct omap_hwmod_rst_info *ohri)
 {
-	return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
-					       ohri->st_shift);
+	return prm_is_hardreset_asserted(ohri->st_shift, 0,
+					 oh->prcm.omap2.module_offs, 0);
 }
 
 /**
@@ -3019,10 +3019,10 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
 	if (!oh->clkdm)
 		return -EINVAL;
 
-	return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_partition,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_is_hardreset_asserted(ohri->rst_shift,
+					 oh->clkdm->pwrdm.ptr->prcm_partition,
+					 oh->clkdm->pwrdm.ptr->prcm_offs,
+					 oh->prcm.omap4.rstctrl_offs);
 }
 
 /**
@@ -3082,9 +3082,9 @@ static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
 static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
 					struct omap_hwmod_rst_info *ohri)
 {
-	return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
-				oh->clkdm->pwrdm.ptr->prcm_offs,
-				oh->prcm.omap4.rstctrl_offs);
+	return prm_is_hardreset_asserted(ohri->rst_shift, 0,
+					 oh->clkdm->pwrdm.ptr->prcm_offs,
+					 oh->prcm.omap4.rstctrl_offs);
 }
 
 /* Public functions */
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 790bb22..0dd8d83 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -142,6 +142,8 @@ struct prm_ll_data {
 	int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
 	int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 				  u16 offset, u16 st_offset);
+	int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
+				     u16 offset);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
@@ -150,6 +152,7 @@ extern int prm_unregister(struct prm_ll_data *pld);
 int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
 int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 			   u16 offset, u16 st_offset);
+int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 343fc73..54ae555 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -214,6 +214,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.read_reset_sources = &omap2xxx_prm_read_reset_sources,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
+	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9466b1e..cc3341f 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -24,14 +24,16 @@
 /**
  * omap2_prm_is_hardreset_asserted - read the HW reset line state of
  * submodules contained in the hwmod module
- * @prm_mod: PRM submodule base (e.g. CORE_MOD)
  * @shift: register bit shift corresponding to the reset line to check
+ * @part: PRM partition, ignored for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @offset: register offset, ignored for OMAP2
  *
  * Returns 1 if the (sub)module hardreset line is currently asserted,
  * 0 if the (sub)module hardreset line is not currently asserted, or
  * -EINVAL if called while running on a non-OMAP2/3 chip.
  */
-int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
+int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
 {
 	return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
 				       (1 << shift));
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 253d414..f57e29b 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -100,7 +100,7 @@ static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
 }
 
 /* These omap2_ PRM functions apply to both OMAP2 and 3 */
-extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
+int omap2_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
 int omap2_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod,
 			       u16 offset);
 int omap2_prm_deassert_hardreset(u8 rst_shift, u8 st_shift, u8 part,
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index ea0fea6..3cbfb78 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -52,6 +52,7 @@ u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
  * am33xx_prm_is_hardreset_asserted - read the HW reset line state of
  * submodules contained in the hwmod module
  * @shift: register bit shift corresponding to the reset line to check
+ * @part: PRM partition, ignored for AM33xx
  * @inst: CM instance register offset (*_INST macro)
  * @rstctrl_offs: RM_RSTCTRL register address offset for this module
  *
@@ -59,7 +60,8 @@ u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
  * 0 if the (sub)module hardreset line is not currently asserted, or
  * -EINVAL upon parameter error.
  */
-int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs)
+static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
+					    u16 rstctrl_offs)
 {
 	u32 v;
 
@@ -121,7 +123,7 @@ static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
 	u32 mask = 1 << st_shift;
 
 	/* Check the current status to avoid  de-asserting the line twice */
-	if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0)
+	if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0)
 		return -EEXIST;
 
 	/* Clear the reset status by writing 1 to the status bit */
@@ -133,7 +135,7 @@ static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
 	am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs);
 
 	/* wait the status to be set */
-	omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, inst,
+	omap_test_timeout(am33xx_prm_is_hardreset_asserted(st_shift, 0, inst,
 							   rstst_offs),
 			  MAX_MODULE_HARDRESET_WAIT, c);
 
@@ -351,6 +353,7 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
 static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
 	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
+	.is_hardreset_asserted		= am33xx_prm_is_hardreset_asserted,
 };
 
 int __init am33xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 6d483e0..49ad5b8 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -122,8 +122,6 @@ extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
 extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
 extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
-extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst,
-		u16 rstctrl_offs);
 int am33xx_prm_init(void);
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index e954195..5c1bb25 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -642,6 +642,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.late_init = &omap3xxx_prm_late_init,
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
+	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0da2ba8..d357ca9 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -690,6 +690,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.late_init = &omap44xx_prm_late_init,
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
 	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
+	.is_hardreset_asserted	= omap4_prminst_is_hardreset_asserted,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index f5fa06e..f246bb4 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -467,6 +467,26 @@ int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
 }
 
 /**
+ * prm_is_hardreset_asserted - check the hardreset status for an IP block
+ * @shift: register bit shift corresponding to the reset line
+ * @part: PRM partition
+ * @prm_mod: PRM submodule base or instance offset
+ * @offset: register offset
+ *
+ * Checks if a hardware reset line for an IP block is enabled or not.
+ */
+int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
+{
+	if (!prm_ll_data->is_hardreset_asserted) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return -EINVAL;
+	}
+
+	return prm_ll_data->is_hardreset_asserted(shift, part, prm_mod, offset);
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 17/26] ARM: OMAP4: CM: move public definitions from cminst44xx.h to cm44xx.h
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

cminst44xx.h will be removed, thus move the public APIs to cm44xx.h header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm44xx.h     |    3 +++
 arch/arm/mach-omap2/cminst44xx.h |    3 ---
 arch/arm/mach-omap2/io.c         |    2 +-
 arch/arm/mach-omap2/omap_hwmod.c |    1 -
 4 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index 3380bee..728d06a 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -23,4 +23,7 @@
 #define OMAP4_CM_CLKSTCTRL				0x0000
 #define OMAP4_CM_STATICDEP				0x0004
 
+void omap_cm_base_init(void);
+int omap4_cm_init(void);
+
 #endif
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index ffbd721..3ef3bf6 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -26,7 +26,4 @@ u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
 extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
 					   u32 mask);
 
-extern void omap_cm_base_init(void);
-int omap4_cm_init(void);
-
 #endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index f1db801..cdbf337 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -46,11 +46,11 @@
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "cm33xx.h"
+#include "cm44xx.h"
 #include "prm.h"
 #include "cm.h"
 #include "prcm_mpu44xx.h"
 #include "prminst44xx.h"
-#include "cminst44xx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
 #include "prm33xx.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 24d9599..1de87a7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -153,7 +153,6 @@
 #include "powerdomain.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
-#include "cminst44xx.h"
 #include "cm33xx.h"
 #include "prm.h"
 #include "prm3xxx.h"
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 17/26] ARM: OMAP4: CM: move public definitions from cminst44xx.h to cm44xx.h
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

cminst44xx.h will be removed, thus move the public APIs to cm44xx.h header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cm44xx.h     |    3 +++
 arch/arm/mach-omap2/cminst44xx.h |    3 ---
 arch/arm/mach-omap2/io.c         |    2 +-
 arch/arm/mach-omap2/omap_hwmod.c |    1 -
 4 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h
index 3380bee..728d06a 100644
--- a/arch/arm/mach-omap2/cm44xx.h
+++ b/arch/arm/mach-omap2/cm44xx.h
@@ -23,4 +23,7 @@
 #define OMAP4_CM_CLKSTCTRL				0x0000
 #define OMAP4_CM_STATICDEP				0x0004
 
+void omap_cm_base_init(void);
+int omap4_cm_init(void);
+
 #endif
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index ffbd721..3ef3bf6 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -26,7 +26,4 @@ u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
 extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
 					   u32 mask);
 
-extern void omap_cm_base_init(void);
-int omap4_cm_init(void);
-
 #endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index f1db801..cdbf337 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -46,11 +46,11 @@
 #include "cm2xxx.h"
 #include "cm3xxx.h"
 #include "cm33xx.h"
+#include "cm44xx.h"
 #include "prm.h"
 #include "cm.h"
 #include "prcm_mpu44xx.h"
 #include "prminst44xx.h"
-#include "cminst44xx.h"
 #include "prm2xxx.h"
 #include "prm3xxx.h"
 #include "prm33xx.h"
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 24d9599..1de87a7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -153,7 +153,6 @@
 #include "powerdomain.h"
 #include "cm2xxx.h"
 #include "cm3xxx.h"
-#include "cminst44xx.h"
 #include "cm33xx.h"
 #include "prm.h"
 #include "prm3xxx.h"
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 18/26] ARM: OMAP4: CM: make cminst direct register access functions static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These shall not be accessed outside the CM driver. This also removes the
need for the cminst44xx.h header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cminst44xx.c |   20 ++++++++++----------
 arch/arm/mach-omap2/cminst44xx.h |   29 -----------------------------
 2 files changed, 10 insertions(+), 39 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/cminst44xx.h

diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index ac03410..95a8cff 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -26,7 +26,6 @@
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 #include "cm44xx.h"
-#include "cminst44xx.h"
 #include "cm-regbits-34xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
@@ -74,6 +73,8 @@ void omap_cm_base_init(void)
 
 /* Private functions */
 
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
+
 /**
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
@@ -110,10 +111,8 @@ static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
 }
 
-/* Public functions */
-
 /* Read a register in a CM instance */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
 {
 	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
 	       part == OMAP4430_INVALID_PRCM_PARTITION ||
@@ -122,7 +121,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
 }
 
 /* Write into a register in a CM instance */
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
+static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
 {
 	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
 	       part == OMAP4430_INVALID_PRCM_PARTITION ||
@@ -131,8 +130,8 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
 }
 
 /* Read-modify-write a register in CM1. Caller must lock */
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
-				   s16 idx)
+static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
+					  s16 idx)
 {
 	u32 v;
 
@@ -144,17 +143,18 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
 	return v;
 }
 
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
 {
 	return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
 }
 
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
+					    s16 idx)
 {
 	return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
 }
 
-u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
+static u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
 {
 	u32 v;
 
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
deleted file mode 100644
index 3ef3bf6..0000000
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * OMAP4 Clock Management (CM) function prototypes
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-
-/*
- * In an ideal world, we would not export these low-level functions,
- * but this will probably take some time to fix properly
- */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx);
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
-				   u16 inst, s16 idx);
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst,
-				   s16 idx);
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
-				     s16 idx);
-extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
-					   u32 mask);
-
-#endif
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 18/26] ARM: OMAP4: CM: make cminst direct register access functions static
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These shall not be accessed outside the CM driver. This also removes the
need for the cminst44xx.h header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/cminst44xx.c |   20 ++++++++++----------
 arch/arm/mach-omap2/cminst44xx.h |   29 -----------------------------
 2 files changed, 10 insertions(+), 39 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/cminst44xx.h

diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index ac03410..95a8cff 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -26,7 +26,6 @@
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 #include "cm44xx.h"
-#include "cminst44xx.h"
 #include "cm-regbits-34xx.h"
 #include "prcm44xx.h"
 #include "prm44xx.h"
@@ -74,6 +73,8 @@ void omap_cm_base_init(void)
 
 /* Private functions */
 
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
+
 /**
  * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
  * @part: PRCM partition ID that the CM_CLKCTRL register exists in
@@ -110,10 +111,8 @@ static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
 		v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
 }
 
-/* Public functions */
-
 /* Read a register in a CM instance */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
 {
 	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
 	       part == OMAP4430_INVALID_PRCM_PARTITION ||
@@ -122,7 +121,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
 }
 
 /* Write into a register in a CM instance */
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
+static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
 {
 	BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
 	       part == OMAP4430_INVALID_PRCM_PARTITION ||
@@ -131,8 +130,8 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
 }
 
 /* Read-modify-write a register in CM1. Caller must lock */
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
-				   s16 idx)
+static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
+					  s16 idx)
 {
 	u32 v;
 
@@ -144,17 +143,18 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
 	return v;
 }
 
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
 {
 	return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
 }
 
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
+					    s16 idx)
 {
 	return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
 }
 
-u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
+static u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
 {
 	u32 v;
 
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
deleted file mode 100644
index 3ef3bf6..0000000
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * OMAP4 Clock Management (CM) function prototypes
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-
-/*
- * In an ideal world, we would not export these low-level functions,
- * but this will probably take some time to fix properly
- */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx);
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
-				   u16 inst, s16 idx);
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst,
-				   s16 idx);
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
-				     s16 idx);
-extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
-					   u32 mask);
-
-#endif
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 19/26] ARM: OMAP4+: CM: remove omap4_cm1/cm2_* functions
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These are not used for anything, so remove both the implementations and
header file references.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/Makefile       |    2 +-
 arch/arm/mach-omap2/cm1_44xx.h     |    2 --
 arch/arm/mach-omap2/cm1_54xx.h     |    2 --
 arch/arm/mach-omap2/cm1_7xx.h      |    2 --
 arch/arm/mach-omap2/cm2_44xx.h     |    2 --
 arch/arm/mach-omap2/cm2_54xx.h     |    2 --
 arch/arm/mach-omap2/cm2_7xx.h      |    2 --
 arch/arm/mach-omap2/cm44xx.c       |   49 ------------------------------------
 arch/arm/mach-omap2/cm_44xx_54xx.h |   36 --------------------------
 9 files changed, 1 insertion(+), 98 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/cm44xx.c
 delete mode 100644 arch/arm/mach-omap2/cm_44xx_54xx.h

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69bbcba..759da02 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,7 +110,7 @@ obj-y					+= prm_common.o cm_common.o
 obj-$(CONFIG_ARCH_OMAP2)		+= prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o
-omap-prcm-4-5-common			=  cminst44xx.o cm44xx.o prm44xx.o \
+omap-prcm-4-5-common			=  cminst44xx.o prm44xx.o \
 					   prcm_mpu44xx.o prminst44xx.o \
 					   vc44xx_data.o vp44xx_data.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-prcm-4-5-common)
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index 5ae8fe3..a594992 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -25,8 +25,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define OMAP4430_CM1_BASE		0x4a004000
 
diff --git a/arch/arm/mach-omap2/cm1_54xx.h b/arch/arm/mach-omap2/cm1_54xx.h
index 90b3348..fd245df 100644
--- a/arch/arm/mach-omap2/cm1_54xx.h
+++ b/arch/arm/mach-omap2/cm1_54xx.h
@@ -22,8 +22,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define OMAP54XX_CM_CORE_AON_BASE		0x4a004000
 
diff --git a/arch/arm/mach-omap2/cm1_7xx.h b/arch/arm/mach-omap2/cm1_7xx.h
index ca6fa1f..2f1c09e 100644
--- a/arch/arm/mach-omap2/cm1_7xx.h
+++ b/arch/arm/mach-omap2/cm1_7xx.h
@@ -23,8 +23,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define DRA7XX_CM_CORE_AON_BASE		0x4a005000
 
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index ee5136d..7521abf 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -25,8 +25,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define OMAP4430_CM2_BASE		0x4a008000
 
diff --git a/arch/arm/mach-omap2/cm2_54xx.h b/arch/arm/mach-omap2/cm2_54xx.h
index 2683231..ff4040c 100644
--- a/arch/arm/mach-omap2/cm2_54xx.h
+++ b/arch/arm/mach-omap2/cm2_54xx.h
@@ -21,8 +21,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define OMAP54XX_CM_CORE_BASE		0x4a008000
 
diff --git a/arch/arm/mach-omap2/cm2_7xx.h b/arch/arm/mach-omap2/cm2_7xx.h
index e966e3a..ce63fdb 100644
--- a/arch/arm/mach-omap2/cm2_7xx.h
+++ b/arch/arm/mach-omap2/cm2_7xx.h
@@ -22,8 +22,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define DRA7XX_CM_CORE_BASE		0x4a008000
 
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
deleted file mode 100644
index fe5cc7b..0000000
--- a/arch/arm/mach-omap2/cm44xx.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * OMAP4 CM1, CM2 module low-level functions
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * These functions are intended to be used only by the cminst44xx.c file.
- * XXX Perhaps we should just move them there and make them static.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include "cm.h"
-#include "cm1_44xx.h"
-#include "cm2_44xx.h"
-
-/* CM1 hardware module low-level functions */
-
-/* Read a register in CM1 */
-u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
-{
-	return readl_relaxed(cm_base + inst + reg);
-}
-
-/* Write into a register in CM1 */
-void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
-{
-	writel_relaxed(val, cm_base + inst + reg);
-}
-
-/* Read a register in CM2 */
-u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
-{
-	return readl_relaxed(cm2_base + inst + reg);
-}
-
-/* Write into a register in CM2 */
-void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
-{
-	writel_relaxed(val, cm2_base + inst + reg);
-}
diff --git a/arch/arm/mach-omap2/cm_44xx_54xx.h b/arch/arm/mach-omap2/cm_44xx_54xx.h
deleted file mode 100644
index cbb2116..0000000
--- a/arch/arm/mach-omap2/cm_44xx_54xx.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * OMAP44xx and OMAP54xx CM1/CM2 function prototypes
- *
- * Copyright (C) 2009-2013 Texas Instruments, Inc.
- * Copyright (C) 2009-2010 Nokia Corporation
- *
- * Paul Walmsley (paul@pwsan.com)
- * Rajendra Nayak (rnayak@ti.com)
- * Benoit Cousson (b-cousson@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CM_44XX_54XX_H
-#define __ARCH_ARM_MACH_OMAP2_CM_44XX_55XX_H
-
-/* CM1 Function prototypes */
-extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
-/* CM2 Function prototypes */
-extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
-#endif
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 19/26] ARM: OMAP4+: CM: remove omap4_cm1/cm2_* functions
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These are not used for anything, so remove both the implementations and
header file references.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/Makefile       |    2 +-
 arch/arm/mach-omap2/cm1_44xx.h     |    2 --
 arch/arm/mach-omap2/cm1_54xx.h     |    2 --
 arch/arm/mach-omap2/cm1_7xx.h      |    2 --
 arch/arm/mach-omap2/cm2_44xx.h     |    2 --
 arch/arm/mach-omap2/cm2_54xx.h     |    2 --
 arch/arm/mach-omap2/cm2_7xx.h      |    2 --
 arch/arm/mach-omap2/cm44xx.c       |   49 ------------------------------------
 arch/arm/mach-omap2/cm_44xx_54xx.h |   36 --------------------------
 9 files changed, 1 insertion(+), 98 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/cm44xx.c
 delete mode 100644 arch/arm/mach-omap2/cm_44xx_54xx.h

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69bbcba..759da02 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,7 +110,7 @@ obj-y					+= prm_common.o cm_common.o
 obj-$(CONFIG_ARCH_OMAP2)		+= prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o
-omap-prcm-4-5-common			=  cminst44xx.o cm44xx.o prm44xx.o \
+omap-prcm-4-5-common			=  cminst44xx.o prm44xx.o \
 					   prcm_mpu44xx.o prminst44xx.o \
 					   vc44xx_data.o vp44xx_data.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-prcm-4-5-common)
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index 5ae8fe3..a594992 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -25,8 +25,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define OMAP4430_CM1_BASE		0x4a004000
 
diff --git a/arch/arm/mach-omap2/cm1_54xx.h b/arch/arm/mach-omap2/cm1_54xx.h
index 90b3348..fd245df 100644
--- a/arch/arm/mach-omap2/cm1_54xx.h
+++ b/arch/arm/mach-omap2/cm1_54xx.h
@@ -22,8 +22,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define OMAP54XX_CM_CORE_AON_BASE		0x4a004000
 
diff --git a/arch/arm/mach-omap2/cm1_7xx.h b/arch/arm/mach-omap2/cm1_7xx.h
index ca6fa1f..2f1c09e 100644
--- a/arch/arm/mach-omap2/cm1_7xx.h
+++ b/arch/arm/mach-omap2/cm1_7xx.h
@@ -23,8 +23,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM1 base address */
 #define DRA7XX_CM_CORE_AON_BASE		0x4a005000
 
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index ee5136d..7521abf 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -25,8 +25,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define OMAP4430_CM2_BASE		0x4a008000
 
diff --git a/arch/arm/mach-omap2/cm2_54xx.h b/arch/arm/mach-omap2/cm2_54xx.h
index 2683231..ff4040c 100644
--- a/arch/arm/mach-omap2/cm2_54xx.h
+++ b/arch/arm/mach-omap2/cm2_54xx.h
@@ -21,8 +21,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define OMAP54XX_CM_CORE_BASE		0x4a008000
 
diff --git a/arch/arm/mach-omap2/cm2_7xx.h b/arch/arm/mach-omap2/cm2_7xx.h
index e966e3a..ce63fdb 100644
--- a/arch/arm/mach-omap2/cm2_7xx.h
+++ b/arch/arm/mach-omap2/cm2_7xx.h
@@ -22,8 +22,6 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
 #define __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
 
-#include "cm_44xx_54xx.h"
-
 /* CM2 base address */
 #define DRA7XX_CM_CORE_BASE		0x4a008000
 
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
deleted file mode 100644
index fe5cc7b..0000000
--- a/arch/arm/mach-omap2/cm44xx.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * OMAP4 CM1, CM2 module low-level functions
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * These functions are intended to be used only by the cminst44xx.c file.
- * XXX Perhaps we should just move them there and make them static.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include "cm.h"
-#include "cm1_44xx.h"
-#include "cm2_44xx.h"
-
-/* CM1 hardware module low-level functions */
-
-/* Read a register in CM1 */
-u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
-{
-	return readl_relaxed(cm_base + inst + reg);
-}
-
-/* Write into a register in CM1 */
-void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
-{
-	writel_relaxed(val, cm_base + inst + reg);
-}
-
-/* Read a register in CM2 */
-u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
-{
-	return readl_relaxed(cm2_base + inst + reg);
-}
-
-/* Write into a register in CM2 */
-void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
-{
-	writel_relaxed(val, cm2_base + inst + reg);
-}
diff --git a/arch/arm/mach-omap2/cm_44xx_54xx.h b/arch/arm/mach-omap2/cm_44xx_54xx.h
deleted file mode 100644
index cbb2116..0000000
--- a/arch/arm/mach-omap2/cm_44xx_54xx.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * OMAP44xx and OMAP54xx CM1/CM2 function prototypes
- *
- * Copyright (C) 2009-2013 Texas Instruments, Inc.
- * Copyright (C) 2009-2010 Nokia Corporation
- *
- * Paul Walmsley (paul at pwsan.com)
- * Rajendra Nayak (rnayak at ti.com)
- * Benoit Cousson (b-cousson at ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap at vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CM_44XX_54XX_H
-#define __ARCH_ARM_MACH_OMAP2_CM_44XX_55XX_H
-
-/* CM1 Function prototypes */
-extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_cm1_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
-/* CM2 Function prototypes */
-extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_cm2_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
-#endif
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 20/26] ARM: AM33xx: PRM: move global warm reset implementation to driver
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

Moved the implementation from am33xx-restart.c to the prm33xx.c file to
isolate the PRM register accesses to be private for PRM driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/am33xx-restart.c |    9 +--------
 arch/arm/mach-omap2/prm33xx.c        |   21 +++++++++++++++++++++
 2 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
index c88d8df7..7286389 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -24,12 +24,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* TODO: Handle mode and cmd if necessary */
 
-	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_PRM_DEVICE_MOD,
-				AM33XX_PRM_RSTCTRL_OFFSET);
-
-	/* OCP barrier */
-	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
-				  AM33XX_PRM_RSTCTRL_OFFSET);
+	am33xx_prm_global_warm_sw_reset();
 }
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 3cbfb78..03960bc 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -23,6 +23,10 @@
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"
 
+#define AM33XX_PRM_RSTCTRL_OFFSET		0x0000
+
+#define AM33XX_RST_GLOBAL_WARM_SW_MASK		(1 << 0)
+
 /* Read a register in a PRM instance */
 u32 am33xx_prm_read_reg(s16 inst, u16 idx)
 {
@@ -332,6 +336,23 @@ static int am33xx_check_vcvp(void)
 	return 0;
 }
 
+/**
+ * am33xx_prm_global_warm_sw_reset - reboot the device via warm reset
+ *
+ * Immediately reboots the device through warm reset.
+ */
+void am33xx_prm_global_warm_sw_reset(void)
+{
+	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
+				AM33XX_RST_GLOBAL_WARM_SW_MASK,
+				AM33XX_PRM_DEVICE_MOD,
+				AM33XX_PRM_RSTCTRL_OFFSET);
+
+	/* OCP barrier */
+	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+				  AM33XX_PRM_RSTCTRL_OFFSET);
+}
+
 struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_set_next_pwrst		= am33xx_pwrdm_set_next_pwrst,
 	.pwrdm_read_next_pwrst		= am33xx_pwrdm_read_next_pwrst,
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 20/26] ARM: AM33xx: PRM: move global warm reset implementation to driver
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

Moved the implementation from am33xx-restart.c to the prm33xx.c file to
isolate the PRM register accesses to be private for PRM driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/am33xx-restart.c |    9 +--------
 arch/arm/mach-omap2/prm33xx.c        |   21 +++++++++++++++++++++
 2 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
index c88d8df7..7286389 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -24,12 +24,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* TODO: Handle mode and cmd if necessary */
 
-	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_RST_GLOBAL_WARM_SW_MASK,
-				AM33XX_PRM_DEVICE_MOD,
-				AM33XX_PRM_RSTCTRL_OFFSET);
-
-	/* OCP barrier */
-	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
-				  AM33XX_PRM_RSTCTRL_OFFSET);
+	am33xx_prm_global_warm_sw_reset();
 }
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 3cbfb78..03960bc 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -23,6 +23,10 @@
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"
 
+#define AM33XX_PRM_RSTCTRL_OFFSET		0x0000
+
+#define AM33XX_RST_GLOBAL_WARM_SW_MASK		(1 << 0)
+
 /* Read a register in a PRM instance */
 u32 am33xx_prm_read_reg(s16 inst, u16 idx)
 {
@@ -332,6 +336,23 @@ static int am33xx_check_vcvp(void)
 	return 0;
 }
 
+/**
+ * am33xx_prm_global_warm_sw_reset - reboot the device via warm reset
+ *
+ * Immediately reboots the device through warm reset.
+ */
+void am33xx_prm_global_warm_sw_reset(void)
+{
+	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
+				AM33XX_RST_GLOBAL_WARM_SW_MASK,
+				AM33XX_PRM_DEVICE_MOD,
+				AM33XX_PRM_RSTCTRL_OFFSET);
+
+	/* OCP barrier */
+	(void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+				  AM33XX_PRM_RSTCTRL_OFFSET);
+}
+
 struct pwrdm_ops am33xx_pwrdm_operations = {
 	.pwrdm_set_next_pwrst		= am33xx_pwrdm_set_next_pwrst,
 	.pwrdm_read_next_pwrst		= am33xx_pwrdm_read_next_pwrst,
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 21/26] ARM: AM33xx: PRM: make direct register access functions static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These should not be accessed outside driver, thus removed the APIs
from the header file and made the implementation static.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm33xx.c |    6 +++---
 arch/arm/mach-omap2/prm33xx.h |    3 ---
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 03960bc..4a843f7 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -28,19 +28,19 @@
 #define AM33XX_RST_GLOBAL_WARM_SW_MASK		(1 << 0)
 
 /* Read a register in a PRM instance */
-u32 am33xx_prm_read_reg(s16 inst, u16 idx)
+static u32 am33xx_prm_read_reg(s16 inst, u16 idx)
 {
 	return readl_relaxed(prm_base + inst + idx);
 }
 
 /* Write into a register in a PRM instance */
-void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
+static void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
 {
 	writel_relaxed(val, prm_base + inst + idx);
 }
 
 /* Read-modify-write a register in PRM. Caller must lock */
-u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
+static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
 {
 	u32 v;
 
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 49ad5b8..937d56e 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -118,9 +118,6 @@
 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
 
 #ifndef __ASSEMBLER__
-extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
-extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
-extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
 int am33xx_prm_init(void);
 
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 21/26] ARM: AM33xx: PRM: make direct register access functions static
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These should not be accessed outside driver, thus removed the APIs
from the header file and made the implementation static.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm33xx.c |    6 +++---
 arch/arm/mach-omap2/prm33xx.h |    3 ---
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 03960bc..4a843f7 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -28,19 +28,19 @@
 #define AM33XX_RST_GLOBAL_WARM_SW_MASK		(1 << 0)
 
 /* Read a register in a PRM instance */
-u32 am33xx_prm_read_reg(s16 inst, u16 idx)
+static u32 am33xx_prm_read_reg(s16 inst, u16 idx)
 {
 	return readl_relaxed(prm_base + inst + idx);
 }
 
 /* Write into a register in a PRM instance */
-void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
+static void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
 {
 	writel_relaxed(val, prm_base + inst + idx);
 }
 
 /* Read-modify-write a register in PRM. Caller must lock */
-u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
+static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
 {
 	u32 v;
 
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 49ad5b8..937d56e 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -118,9 +118,6 @@
 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
 
 #ifndef __ASSEMBLER__
-extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
-extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
-extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
 extern void am33xx_prm_global_warm_sw_reset(void);
 int am33xx_prm_init(void);
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 22/26] ARM: OMAP4: PRM: make omap4_prm_read/write_inst_reg calls static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These are not (and should not be) used by anybody outside the PRM
driver itself.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c      |    6 +++---
 arch/arm/mach-omap2/prm44xx_54xx.h |    4 ----
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index d357ca9..15b4646 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -80,19 +80,19 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
 /* PRM low-level functions */
 
 /* Read a register in a CM/PRM instance in the PRM module */
-u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
+static u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
 {
 	return readl_relaxed(prm_base + inst + reg);
 }
 
 /* Write into a register in a CM/PRM instance in the PRM module */
-void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
+static void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
 	writel_relaxed(val, prm_base + inst + reg);
 }
 
 /* Read-modify-write a register in a PRM module. Caller must lock */
-u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+static u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
 {
 	u32 v;
 
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index 8d95aa5..96477e7 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -26,10 +26,6 @@
 /* Function prototypes */
 #ifndef __ASSEMBLER__
 
-extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
 /* OMAP4/OMAP5-specific VP functions */
 u32 omap4_prm_vp_check_txdone(u8 vp_id);
 void omap4_prm_vp_clear_txdone(u8 vp_id);
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 22/26] ARM: OMAP4: PRM: make omap4_prm_read/write_inst_reg calls static
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These are not (and should not be) used by anybody outside the PRM
driver itself.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c      |    6 +++---
 arch/arm/mach-omap2/prm44xx_54xx.h |    4 ----
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index d357ca9..15b4646 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -80,19 +80,19 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
 /* PRM low-level functions */
 
 /* Read a register in a CM/PRM instance in the PRM module */
-u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
+static u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
 {
 	return readl_relaxed(prm_base + inst + reg);
 }
 
 /* Write into a register in a CM/PRM instance in the PRM module */
-void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
+static void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
 	writel_relaxed(val, prm_base + inst + reg);
 }
 
 /* Read-modify-write a register in a PRM module. Caller must lock */
-u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+static u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
 {
 	u32 v;
 
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index 8d95aa5..96477e7 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -26,10 +26,6 @@
 /* Function prototypes */
 #ifndef __ASSEMBLER__
 
-extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
 /* OMAP4/OMAP5-specific VP functions */
 u32 omap4_prm_vp_check_txdone(u8 vp_id);
 void omap4_prm_vp_clear_txdone(u8 vp_id);
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 23/26] ARM: OMAP3: PRM: make PRCM interrupt handler related functions static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm3xxx.c |   13 +++++++++----
 arch/arm/mach-omap2/prm3xxx.h |    6 ------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 5c1bb25..f21fd76 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -30,6 +30,11 @@
 #include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+static void omap3xxx_prm_ocp_barrier(void);
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+
 static const struct omap_prcm_irq omap3_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",	0,	0),
 	OMAP_PRCM_IRQ("io",	9,	1),
@@ -147,7 +152,7 @@ void omap3xxx_prm_dpll3_reset(void)
  * MPU IRQs, and store the result into the u32 pointed to by @events.
  * No return value.
  */
-void omap3xxx_prm_read_pending_irqs(unsigned long *events)
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events)
 {
 	u32 mask, st;
 
@@ -166,7 +171,7 @@ void omap3xxx_prm_read_pending_irqs(unsigned long *events)
  * block, to avoid race conditions after acknowledging or clearing IRQ
  * bits.  No return value.
  */
-void omap3xxx_prm_ocp_barrier(void)
+static void omap3xxx_prm_ocp_barrier(void)
 {
 	omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
 }
@@ -182,7 +187,7 @@ void omap3xxx_prm_ocp_barrier(void)
  * returning; otherwise, spurious interrupts might occur.  No return
  * value.
  */
-void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
 	saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
 					       OMAP3_PRM_IRQENABLE_MPU_OFFSET);
@@ -202,7 +207,7 @@ void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
  * barrier should be needed here; any pending PRM interrupts will fire
  * once the writes reach the PRM.  No return value.
  */
-void omap3xxx_prm_restore_irqen(u32 *saved_mask)
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
 {
 	omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
 				OMAP3_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index bc37d42..5d993d2 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -152,12 +152,6 @@ static inline void omap3xxx_prm_reconfigure_io_chain(void)
 }
 #endif
 
-/* PRM interrupt-related functions */
-extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
-extern void omap3xxx_prm_ocp_barrier(void);
-extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
-
 extern void omap3xxx_prm_dpll3_reset(void);
 
 extern int __init omap3xxx_prm_init(void);
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 23/26] ARM: OMAP3: PRM: make PRCM interrupt handler related functions static
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm3xxx.c |   13 +++++++++----
 arch/arm/mach-omap2/prm3xxx.h |    6 ------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 5c1bb25..f21fd76 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -30,6 +30,11 @@
 #include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+static void omap3xxx_prm_ocp_barrier(void);
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+
 static const struct omap_prcm_irq omap3_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",	0,	0),
 	OMAP_PRCM_IRQ("io",	9,	1),
@@ -147,7 +152,7 @@ void omap3xxx_prm_dpll3_reset(void)
  * MPU IRQs, and store the result into the u32 pointed to by @events.
  * No return value.
  */
-void omap3xxx_prm_read_pending_irqs(unsigned long *events)
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events)
 {
 	u32 mask, st;
 
@@ -166,7 +171,7 @@ void omap3xxx_prm_read_pending_irqs(unsigned long *events)
  * block, to avoid race conditions after acknowledging or clearing IRQ
  * bits.  No return value.
  */
-void omap3xxx_prm_ocp_barrier(void)
+static void omap3xxx_prm_ocp_barrier(void)
 {
 	omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
 }
@@ -182,7 +187,7 @@ void omap3xxx_prm_ocp_barrier(void)
  * returning; otherwise, spurious interrupts might occur.  No return
  * value.
  */
-void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
 	saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
 					       OMAP3_PRM_IRQENABLE_MPU_OFFSET);
@@ -202,7 +207,7 @@ void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
  * barrier should be needed here; any pending PRM interrupts will fire
  * once the writes reach the PRM.  No return value.
  */
-void omap3xxx_prm_restore_irqen(u32 *saved_mask)
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
 {
 	omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
 				OMAP3_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index bc37d42..5d993d2 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -152,12 +152,6 @@ static inline void omap3xxx_prm_reconfigure_io_chain(void)
 }
 #endif
 
-/* PRM interrupt-related functions */
-extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
-extern void omap3xxx_prm_ocp_barrier(void);
-extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
-
 extern void omap3xxx_prm_dpll3_reset(void);
 
 extern int __init omap3xxx_prm_init(void);
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 24/26] ARM: OMAP4: PRM: make PRCM interrupt handler related functions static
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c      |   13 +++++++++----
 arch/arm/mach-omap2/prm44xx_54xx.h |    6 ------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 15b4646..bfcc356 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -32,6 +32,11 @@
 
 /* Static data */
 
+static void omap44xx_prm_read_pending_irqs(unsigned long *events);
+static void omap44xx_prm_ocp_barrier(void);
+static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap44xx_prm_restore_irqen(u32 *saved_mask);
+
 static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("io",     9,      1),
 };
@@ -207,7 +212,7 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
  * MPU IRQs, and store the result into the two u32s pointed to by @events.
  * No return value.
  */
-void omap44xx_prm_read_pending_irqs(unsigned long *events)
+static void omap44xx_prm_read_pending_irqs(unsigned long *events)
 {
 	events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
 					  OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
@@ -224,7 +229,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
  * block, to avoid race conditions after acknowledging or clearing IRQ
  * bits.  No return value.
  */
-void omap44xx_prm_ocp_barrier(void)
+static void omap44xx_prm_ocp_barrier(void)
 {
 	omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
 				OMAP4_REVISION_PRM_OFFSET);
@@ -241,7 +246,7 @@ void omap44xx_prm_ocp_barrier(void)
  * interrupts reaches the PRM before returning; otherwise, spurious
  * interrupts might occur.  No return value.
  */
-void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
 	saved_mask[0] =
 		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
@@ -270,7 +275,7 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
  * No OCP barrier should be needed here; any pending PRM interrupts will fire
  * once the writes reach the PRM.  No return value.
  */
-void omap44xx_prm_restore_irqen(u32 *saved_mask)
+static void omap44xx_prm_restore_irqen(u32 *saved_mask)
 {
 	omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
 				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index 96477e7..faa7411 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -47,12 +47,6 @@ static inline void omap44xx_prm_reconfigure_io_chain(void)
 }
 #endif
 
-/* PRM interrupt-related functions */
-extern void omap44xx_prm_read_pending_irqs(unsigned long *events);
-extern void omap44xx_prm_ocp_barrier(void);
-extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
-
 extern int __init omap44xx_prm_init(void);
 extern u32 omap44xx_prm_get_reset_sources(void);
 
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 24/26] ARM: OMAP4: PRM: make PRCM interrupt handler related functions static
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/prm44xx.c      |   13 +++++++++----
 arch/arm/mach-omap2/prm44xx_54xx.h |    6 ------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 15b4646..bfcc356 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -32,6 +32,11 @@
 
 /* Static data */
 
+static void omap44xx_prm_read_pending_irqs(unsigned long *events);
+static void omap44xx_prm_ocp_barrier(void);
+static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap44xx_prm_restore_irqen(u32 *saved_mask);
+
 static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("io",     9,      1),
 };
@@ -207,7 +212,7 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
  * MPU IRQs, and store the result into the two u32s pointed to by @events.
  * No return value.
  */
-void omap44xx_prm_read_pending_irqs(unsigned long *events)
+static void omap44xx_prm_read_pending_irqs(unsigned long *events)
 {
 	events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
 					  OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
@@ -224,7 +229,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
  * block, to avoid race conditions after acknowledging or clearing IRQ
  * bits.  No return value.
  */
-void omap44xx_prm_ocp_barrier(void)
+static void omap44xx_prm_ocp_barrier(void)
 {
 	omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
 				OMAP4_REVISION_PRM_OFFSET);
@@ -241,7 +246,7 @@ void omap44xx_prm_ocp_barrier(void)
  * interrupts reaches the PRM before returning; otherwise, spurious
  * interrupts might occur.  No return value.
  */
-void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
 	saved_mask[0] =
 		omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
@@ -270,7 +275,7 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
  * No OCP barrier should be needed here; any pending PRM interrupts will fire
  * once the writes reach the PRM.  No return value.
  */
-void omap44xx_prm_restore_irqen(u32 *saved_mask)
+static void omap44xx_prm_restore_irqen(u32 *saved_mask)
 {
 	omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
 				 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index 96477e7..faa7411 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -47,12 +47,6 @@ static inline void omap44xx_prm_reconfigure_io_chain(void)
 }
 #endif
 
-/* PRM interrupt-related functions */
-extern void omap44xx_prm_read_pending_irqs(unsigned long *events);
-extern void omap44xx_prm_ocp_barrier(void);
-extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
-
 extern int __init omap44xx_prm_init(void);
 extern u32 omap44xx_prm_get_reset_sources(void);
 
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 25/26] ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

This adds a generic API for reconfiguring the I/O chain. The implementation
will call the SoC specific function registered during init time. The SoC
specific reconfigure functions are also made static, as they don't need
to be accessed outside the PRM driver itself.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |    5 +----
 arch/arm/mach-omap2/prm.h          |    2 ++
 arch/arm/mach-omap2/prm3xxx.c      |    3 ++-
 arch/arm/mach-omap2/prm3xxx.h      |    8 --------
 arch/arm/mach-omap2/prm44xx.c      |    3 ++-
 arch/arm/mach-omap2/prm44xx_54xx.h |    9 ---------
 arch/arm/mach-omap2/prm_common.c   |   16 ++++++++++++++++
 7 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1de87a7..1bfc504 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1983,10 +1983,7 @@ static void _reconfigure_io_chain(void)
 
 	spin_lock_irqsave(&io_chain_lock, flags);
 
-	if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
-		omap3xxx_prm_reconfigure_io_chain();
-	else if (cpu_is_omap44xx())
-		omap44xx_prm_reconfigure_io_chain();
+	prm_reconfigure_io_chain();
 
 	spin_unlock_irqrestore(&io_chain_lock, flags);
 }
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 0dd8d83..7efe14c 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -157,6 +157,8 @@ extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
 
+void prm_reconfigure_io_chain(void);
+
 #endif
 
 
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index f21fd76..1a739de 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -34,6 +34,7 @@ static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
 static void omap3xxx_prm_ocp_barrier(void);
 static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
 static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+static void omap3xxx_prm_reconfigure_io_chain(void);
 
 static const struct omap_prcm_irq omap3_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",	0,	0),
@@ -383,7 +384,7 @@ void __init omap3_prm_init_pm(bool has_uart4, bool has_iva)
  * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
  * return value.
  */
-void omap3xxx_prm_reconfigure_io_chain(void)
+static void omap3xxx_prm_reconfigure_io_chain(void)
 {
 	int i = 0;
 
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 5d993d2..321568b 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -144,14 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
 extern void omap3_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
-#ifdef CONFIG_ARCH_OMAP3
-void omap3xxx_prm_reconfigure_io_chain(void);
-#else
-static inline void omap3xxx_prm_reconfigure_io_chain(void)
-{
-}
-#endif
-
 extern void omap3xxx_prm_dpll3_reset(void);
 
 extern int __init omap3xxx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index bfcc356..e7ac7e2 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -36,6 +36,7 @@ static void omap44xx_prm_read_pending_irqs(unsigned long *events);
 static void omap44xx_prm_ocp_barrier(void);
 static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
 static void omap44xx_prm_restore_irqen(u32 *saved_mask);
+static void omap44xx_prm_reconfigure_io_chain(void);
 
 static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("io",     9,      1),
@@ -292,7 +293,7 @@ static void omap44xx_prm_restore_irqen(u32 *saved_mask)
  * deasserting WUCLKIN and waiting for WUCLKOUT to be deasserted.
  * No return value. XXX Are the final two steps necessary?
  */
-void omap44xx_prm_reconfigure_io_chain(void)
+static void omap44xx_prm_reconfigure_io_chain(void)
 {
 	int i = 0;
 	s32 inst = omap4_prmst_get_prm_dev_inst();
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index faa7411..f751251 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -38,15 +38,6 @@ extern u32 omap4_prm_vcvp_read(u8 offset);
 extern void omap4_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
-	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-void omap44xx_prm_reconfigure_io_chain(void);
-#else
-static inline void omap44xx_prm_reconfigure_io_chain(void)
-{
-}
-#endif
-
 extern int __init omap44xx_prm_init(void);
 extern u32 omap44xx_prm_get_reset_sources(void);
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index f246bb4..582ed6a 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -487,6 +487,22 @@ int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
 }
 
 /**
+ * prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
+ *
+ * Clear any previously-latched I/O wakeup events and ensure that the
+ * I/O wakeup gaes are aligned with the current mux settings.
+ * Calls SoC specific I/O chain reconfigure function if available,
+ * otherwise does nothing.
+ */
+void prm_reconfigure_io_chain(void)
+{
+	if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain)
+		return;
+
+	prcm_irq_setup->reconfigure_io_chain();
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 25/26] ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

This adds a generic API for reconfiguring the I/O chain. The implementation
will call the SoC specific function registered during init time. The SoC
specific reconfigure functions are also made static, as they don't need
to be accessed outside the PRM driver itself.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c   |    5 +----
 arch/arm/mach-omap2/prm.h          |    2 ++
 arch/arm/mach-omap2/prm3xxx.c      |    3 ++-
 arch/arm/mach-omap2/prm3xxx.h      |    8 --------
 arch/arm/mach-omap2/prm44xx.c      |    3 ++-
 arch/arm/mach-omap2/prm44xx_54xx.h |    9 ---------
 arch/arm/mach-omap2/prm_common.c   |   16 ++++++++++++++++
 7 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1de87a7..1bfc504 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1983,10 +1983,7 @@ static void _reconfigure_io_chain(void)
 
 	spin_lock_irqsave(&io_chain_lock, flags);
 
-	if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
-		omap3xxx_prm_reconfigure_io_chain();
-	else if (cpu_is_omap44xx())
-		omap44xx_prm_reconfigure_io_chain();
+	prm_reconfigure_io_chain();
 
 	spin_unlock_irqrestore(&io_chain_lock, flags);
 }
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 0dd8d83..7efe14c 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -157,6 +157,8 @@ extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
 
+void prm_reconfigure_io_chain(void);
+
 #endif
 
 
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index f21fd76..1a739de 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -34,6 +34,7 @@ static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
 static void omap3xxx_prm_ocp_barrier(void);
 static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
 static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+static void omap3xxx_prm_reconfigure_io_chain(void);
 
 static const struct omap_prcm_irq omap3_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("wkup",	0,	0),
@@ -383,7 +384,7 @@ void __init omap3_prm_init_pm(bool has_uart4, bool has_iva)
  * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
  * return value.
  */
-void omap3xxx_prm_reconfigure_io_chain(void)
+static void omap3xxx_prm_reconfigure_io_chain(void)
 {
 	int i = 0;
 
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 5d993d2..321568b 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -144,14 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
 extern void omap3_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
-#ifdef CONFIG_ARCH_OMAP3
-void omap3xxx_prm_reconfigure_io_chain(void);
-#else
-static inline void omap3xxx_prm_reconfigure_io_chain(void)
-{
-}
-#endif
-
 extern void omap3xxx_prm_dpll3_reset(void);
 
 extern int __init omap3xxx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index bfcc356..e7ac7e2 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -36,6 +36,7 @@ static void omap44xx_prm_read_pending_irqs(unsigned long *events);
 static void omap44xx_prm_ocp_barrier(void);
 static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
 static void omap44xx_prm_restore_irqen(u32 *saved_mask);
+static void omap44xx_prm_reconfigure_io_chain(void);
 
 static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 	OMAP_PRCM_IRQ("io",     9,      1),
@@ -292,7 +293,7 @@ static void omap44xx_prm_restore_irqen(u32 *saved_mask)
  * deasserting WUCLKIN and waiting for WUCLKOUT to be deasserted.
  * No return value. XXX Are the final two steps necessary?
  */
-void omap44xx_prm_reconfigure_io_chain(void)
+static void omap44xx_prm_reconfigure_io_chain(void)
 {
 	int i = 0;
 	s32 inst = omap4_prmst_get_prm_dev_inst();
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index faa7411..f751251 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -38,15 +38,6 @@ extern u32 omap4_prm_vcvp_read(u8 offset);
 extern void omap4_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
-	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-void omap44xx_prm_reconfigure_io_chain(void);
-#else
-static inline void omap44xx_prm_reconfigure_io_chain(void)
-{
-}
-#endif
-
 extern int __init omap44xx_prm_init(void);
 extern u32 omap44xx_prm_get_reset_sources(void);
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index f246bb4..582ed6a 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -487,6 +487,22 @@ int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset)
 }
 
 /**
+ * prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
+ *
+ * Clear any previously-latched I/O wakeup events and ensure that the
+ * I/O wakeup gaes are aligned with the current mux settings.
+ * Calls SoC specific I/O chain reconfigure function if available,
+ * otherwise does nothing.
+ */
+void prm_reconfigure_io_chain(void)
+{
+	if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain)
+		return;
+
+	prcm_irq_setup->reconfigure_io_chain();
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 26/26] ARM: OMAP2+: PRM: provide generic API for system reset
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-01 18:09   ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-omap, tony, paul; +Cc: linux-arm-kernel

This patch combines the various prm_warm_reset calls under a common
API prm_reset_system, and adds the SoC specific implementation under
prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/am33xx-restart.c |    5 ++---
 arch/arm/mach-omap2/omap2-restart.c  |    4 ++--
 arch/arm/mach-omap2/omap3-restart.c  |    6 ++----
 arch/arm/mach-omap2/omap4-restart.c  |    4 ++--
 arch/arm/mach-omap2/prm.h            |    2 ++
 arch/arm/mach-omap2/prm2xxx.c        |    3 ++-
 arch/arm/mach-omap2/prm2xxx.h        |    1 -
 arch/arm/mach-omap2/prm33xx.c        |    3 ++-
 arch/arm/mach-omap2/prm33xx.h        |    1 -
 arch/arm/mach-omap2/prm3xxx.c        |    3 ++-
 arch/arm/mach-omap2/prm3xxx.h        |    2 --
 arch/arm/mach-omap2/prm44xx.c        |    1 +
 arch/arm/mach-omap2/prm_common.c     |   16 ++++++++++++++++
 13 files changed, 33 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
index 7286389..89f14af 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -9,8 +9,7 @@
 #include <linux/reboot.h>
 
 #include "common.h"
-#include "prm-regbits-33xx.h"
-#include "prm33xx.h"
+#include "prm.h"
 
 /**
  * am3xx_restart - trigger a software restart of the SoC
@@ -24,5 +23,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* TODO: Handle mode and cmd if necessary */
 
-	am33xx_prm_global_warm_sw_reset();
+	prm_reset_system();
 }
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c
index 68423e2..4e4f48e 100644
--- a/arch/arm/mach-omap2/omap2-restart.c
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -15,7 +15,7 @@
 
 #include "soc.h"
 #include "common.h"
-#include "prm2xxx.h"
+#include "prm.h"
 
 /*
  * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
@@ -40,7 +40,7 @@ void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 
 	/* XXX Should save the cmd argument for use after the reboot */
 
-	omap2xxx_prm_dpll_reset(); /* never returns */
+	prm_reset_system();
 	while (1);
 }
 
diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c
index 5de2a0c..ce0afb6 100644
--- a/arch/arm/mach-omap2/omap3-restart.c
+++ b/arch/arm/mach-omap2/omap3-restart.c
@@ -14,10 +14,8 @@
 #include <linux/init.h>
 #include <linux/reboot.h>
 
-#include "iomap.h"
-#include "common.h"
 #include "control.h"
-#include "prm3xxx.h"
+#include "prm.h"
 
 /* Global address base setup code */
 
@@ -32,6 +30,6 @@
 void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 {
 	omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
-	omap3xxx_prm_dpll3_reset(); /* never returns */
+	prm_reset_system();
 	while (1);
 }
diff --git a/arch/arm/mach-omap2/omap4-restart.c b/arch/arm/mach-omap2/omap4-restart.c
index 41dfd7d..f19f9db 100644
--- a/arch/arm/mach-omap2/omap4-restart.c
+++ b/arch/arm/mach-omap2/omap4-restart.c
@@ -9,7 +9,7 @@
 
 #include <linux/types.h>
 #include <linux/reboot.h>
-#include "prminst44xx.h"
+#include "prm.h"
 
 /**
  * omap44xx_restart - trigger a software restart of the SoC
@@ -22,7 +22,7 @@
 void omap44xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* XXX Should save 'cmd' into scratchpad for use after reboot */
-	omap4_prminst_global_warm_sw_reset(); /* never returns */
+	prm_reset_system();
 	while (1)
 		;
 }
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 7efe14c..a0d36fd 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -144,6 +144,7 @@ struct prm_ll_data {
 				  u16 offset, u16 st_offset);
 	int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
 				     u16 offset);
+	void (*reset_system)(void);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
@@ -156,6 +157,7 @@ int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
+void prm_reset_system(void);
 
 void prm_reconfigure_io_chain(void);
 
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 54ae555..af0f152 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -106,7 +106,7 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
  * Set the DPLL reset bit, which should reboot the SoC.  This is the
  * recommended way to restart the SoC.  No return value.
  */
-void omap2xxx_prm_dpll_reset(void)
+static void omap2xxx_prm_dpll_reset(void)
 {
 	omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
 				   OMAP2_RM_RSTCTRL);
@@ -215,6 +215,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
+	.reset_system = &omap2xxx_prm_dpll_reset,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index d734141..1d51643 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -124,7 +124,6 @@
 extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
 extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
 
-extern void omap2xxx_prm_dpll_reset(void);
 void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
 
 extern int __init omap2xxx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 4a843f7..02f6286 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -341,7 +341,7 @@ static int am33xx_check_vcvp(void)
  *
  * Immediately reboots the device through warm reset.
  */
-void am33xx_prm_global_warm_sw_reset(void)
+static void am33xx_prm_global_warm_sw_reset(void)
 {
 	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
 				AM33XX_RST_GLOBAL_WARM_SW_MASK,
@@ -375,6 +375,7 @@ static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
 	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
 	.is_hardreset_asserted		= am33xx_prm_is_hardreset_asserted,
+	.reset_system			= am33xx_prm_global_warm_sw_reset,
 };
 
 int __init am33xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 937d56e..98ac41f 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -118,7 +118,6 @@
 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
 
 #ifndef __ASSEMBLER__
-extern void am33xx_prm_global_warm_sw_reset(void);
 int am33xx_prm_init(void);
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 1a739de..4de5de6 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -137,7 +137,7 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
  * recommended way to restart the SoC, considering Errata i520.  No
  * return value.
  */
-void omap3xxx_prm_dpll3_reset(void)
+static void omap3xxx_prm_dpll3_reset(void)
 {
 	omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
 				   OMAP2_RM_RSTCTRL);
@@ -649,6 +649,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
+	.reset_system = &omap3xxx_prm_dpll3_reset,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 321568b..cfde3f4 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -144,8 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
 extern void omap3_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
-extern void omap3xxx_prm_dpll3_reset(void);
-
 extern int __init omap3xxx_prm_init(void);
 extern u32 omap3xxx_prm_get_reset_sources(void);
 int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index e7ac7e2..cc170fb 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -697,6 +697,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
 	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
 	.is_hardreset_asserted	= omap4_prminst_is_hardreset_asserted,
+	.reset_system		= omap4_prminst_global_warm_sw_reset,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 582ed6a..60bce8f 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -503,6 +503,22 @@ void prm_reconfigure_io_chain(void)
 }
 
 /**
+ * prm_reset_system - trigger global SW reset
+ *
+ * Triggers SoC specific global warm reset to reboot the device.
+ */
+void prm_reset_system(void)
+{
+	if (!prm_ll_data->reset_system) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return;
+	}
+
+	prm_ll_data->reset_system();
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5


^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 26/26] ARM: OMAP2+: PRM: provide generic API for system reset
@ 2014-09-01 18:09   ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-01 18:09 UTC (permalink / raw)
  To: linux-arm-kernel

This patch combines the various prm_warm_reset calls under a common
API prm_reset_system, and adds the SoC specific implementation under
prm_ll_data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 arch/arm/mach-omap2/am33xx-restart.c |    5 ++---
 arch/arm/mach-omap2/omap2-restart.c  |    4 ++--
 arch/arm/mach-omap2/omap3-restart.c  |    6 ++----
 arch/arm/mach-omap2/omap4-restart.c  |    4 ++--
 arch/arm/mach-omap2/prm.h            |    2 ++
 arch/arm/mach-omap2/prm2xxx.c        |    3 ++-
 arch/arm/mach-omap2/prm2xxx.h        |    1 -
 arch/arm/mach-omap2/prm33xx.c        |    3 ++-
 arch/arm/mach-omap2/prm33xx.h        |    1 -
 arch/arm/mach-omap2/prm3xxx.c        |    3 ++-
 arch/arm/mach-omap2/prm3xxx.h        |    2 --
 arch/arm/mach-omap2/prm44xx.c        |    1 +
 arch/arm/mach-omap2/prm_common.c     |   16 ++++++++++++++++
 13 files changed, 33 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
index 7286389..89f14af 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -9,8 +9,7 @@
 #include <linux/reboot.h>
 
 #include "common.h"
-#include "prm-regbits-33xx.h"
-#include "prm33xx.h"
+#include "prm.h"
 
 /**
  * am3xx_restart - trigger a software restart of the SoC
@@ -24,5 +23,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* TODO: Handle mode and cmd if necessary */
 
-	am33xx_prm_global_warm_sw_reset();
+	prm_reset_system();
 }
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c
index 68423e2..4e4f48e 100644
--- a/arch/arm/mach-omap2/omap2-restart.c
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -15,7 +15,7 @@
 
 #include "soc.h"
 #include "common.h"
-#include "prm2xxx.h"
+#include "prm.h"
 
 /*
  * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
@@ -40,7 +40,7 @@ void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 
 	/* XXX Should save the cmd argument for use after the reboot */
 
-	omap2xxx_prm_dpll_reset(); /* never returns */
+	prm_reset_system();
 	while (1);
 }
 
diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c
index 5de2a0c..ce0afb6 100644
--- a/arch/arm/mach-omap2/omap3-restart.c
+++ b/arch/arm/mach-omap2/omap3-restart.c
@@ -14,10 +14,8 @@
 #include <linux/init.h>
 #include <linux/reboot.h>
 
-#include "iomap.h"
-#include "common.h"
 #include "control.h"
-#include "prm3xxx.h"
+#include "prm.h"
 
 /* Global address base setup code */
 
@@ -32,6 +30,6 @@
 void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 {
 	omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
-	omap3xxx_prm_dpll3_reset(); /* never returns */
+	prm_reset_system();
 	while (1);
 }
diff --git a/arch/arm/mach-omap2/omap4-restart.c b/arch/arm/mach-omap2/omap4-restart.c
index 41dfd7d..f19f9db 100644
--- a/arch/arm/mach-omap2/omap4-restart.c
+++ b/arch/arm/mach-omap2/omap4-restart.c
@@ -9,7 +9,7 @@
 
 #include <linux/types.h>
 #include <linux/reboot.h>
-#include "prminst44xx.h"
+#include "prm.h"
 
 /**
  * omap44xx_restart - trigger a software restart of the SoC
@@ -22,7 +22,7 @@
 void omap44xx_restart(enum reboot_mode mode, const char *cmd)
 {
 	/* XXX Should save 'cmd' into scratchpad for use after reboot */
-	omap4_prminst_global_warm_sw_reset(); /* never returns */
+	prm_reset_system();
 	while (1)
 		;
 }
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 7efe14c..a0d36fd 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -144,6 +144,7 @@ struct prm_ll_data {
 				  u16 offset, u16 st_offset);
 	int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
 				     u16 offset);
+	void (*reset_system)(void);
 };
 
 extern int prm_register(struct prm_ll_data *pld);
@@ -156,6 +157,7 @@ int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
 extern u32 prm_read_reset_sources(void);
 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
+void prm_reset_system(void);
 
 void prm_reconfigure_io_chain(void);
 
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 54ae555..af0f152 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -106,7 +106,7 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
  * Set the DPLL reset bit, which should reboot the SoC.  This is the
  * recommended way to restart the SoC.  No return value.
  */
-void omap2xxx_prm_dpll_reset(void)
+static void omap2xxx_prm_dpll_reset(void)
 {
 	omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
 				   OMAP2_RM_RSTCTRL);
@@ -215,6 +215,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
+	.reset_system = &omap2xxx_prm_dpll_reset,
 };
 
 int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index d734141..1d51643 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -124,7 +124,6 @@
 extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
 extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
 
-extern void omap2xxx_prm_dpll_reset(void);
 void omap2xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask);
 
 extern int __init omap2xxx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 4a843f7..02f6286 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -341,7 +341,7 @@ static int am33xx_check_vcvp(void)
  *
  * Immediately reboots the device through warm reset.
  */
-void am33xx_prm_global_warm_sw_reset(void)
+static void am33xx_prm_global_warm_sw_reset(void)
 {
 	am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
 				AM33XX_RST_GLOBAL_WARM_SW_MASK,
@@ -375,6 +375,7 @@ static struct prm_ll_data am33xx_prm_ll_data = {
 	.assert_hardreset		= am33xx_prm_assert_hardreset,
 	.deassert_hardreset		= am33xx_prm_deassert_hardreset,
 	.is_hardreset_asserted		= am33xx_prm_is_hardreset_asserted,
+	.reset_system			= am33xx_prm_global_warm_sw_reset,
 };
 
 int __init am33xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 937d56e..98ac41f 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -118,7 +118,6 @@
 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
 
 #ifndef __ASSEMBLER__
-extern void am33xx_prm_global_warm_sw_reset(void);
 int am33xx_prm_init(void);
 
 #endif /* ASSEMBLER */
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 1a739de..4de5de6 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -137,7 +137,7 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
  * recommended way to restart the SoC, considering Errata i520.  No
  * return value.
  */
-void omap3xxx_prm_dpll3_reset(void)
+static void omap3xxx_prm_dpll3_reset(void)
 {
 	omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
 				   OMAP2_RM_RSTCTRL);
@@ -649,6 +649,7 @@ static struct prm_ll_data omap3xxx_prm_ll_data = {
 	.assert_hardreset = &omap2_prm_assert_hardreset,
 	.deassert_hardreset = &omap2_prm_deassert_hardreset,
 	.is_hardreset_asserted = &omap2_prm_is_hardreset_asserted,
+	.reset_system = &omap3xxx_prm_dpll3_reset,
 };
 
 int __init omap3xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 321568b..cfde3f4 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -144,8 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
 extern void omap3_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
-extern void omap3xxx_prm_dpll3_reset(void);
-
 extern int __init omap3xxx_prm_init(void);
 extern u32 omap3xxx_prm_get_reset_sources(void);
 int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits);
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index e7ac7e2..cc170fb 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -697,6 +697,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 	.assert_hardreset	= omap4_prminst_assert_hardreset,
 	.deassert_hardreset	= omap4_prminst_deassert_hardreset,
 	.is_hardreset_asserted	= omap4_prminst_is_hardreset_asserted,
+	.reset_system		= omap4_prminst_global_warm_sw_reset,
 };
 
 int __init omap44xx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 582ed6a..60bce8f 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -503,6 +503,22 @@ void prm_reconfigure_io_chain(void)
 }
 
 /**
+ * prm_reset_system - trigger global SW reset
+ *
+ * Triggers SoC specific global warm reset to reboot the device.
+ */
+void prm_reset_system(void)
+{
+	if (!prm_ll_data->reset_system) {
+		WARN_ONCE(1, "prm: %s: no mapping function defined\n",
+			  __func__);
+		return;
+	}
+
+	prm_ll_data->reset_system();
+}
+
+/**
  * prm_register - register per-SoC low-level data with the PRM
  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
  *
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-01 18:08 ` Tero Kristo
@ 2014-09-18 17:16   ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-18 17:16 UTC (permalink / raw)
  To: Tero Kristo; +Cc: linux-omap, paul, linux-arm-kernel

* Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> Hi,
> 
> This set contains PRCM related cleanups meant for 3.18 merge window.
> These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> set is used as basis to avoid merge issues.
> 
> Purpose of this work is to eventually convert the PRCM code into a
> separate driver, but this is done in incremental parts as the amount
> of changes is substantial. Expected conclusion of this work is 3.19
> if everything goes fine.
> 
> This part of the work mostly moves some of the SoC specific PRCM driver
> calls under generic version of the same, and adds SoC-ops to support
> these on the driver level.
> 
> Working branch posted here:
> 
> tree: https://github.com/t-kristo/linux-pm.git
> branch: for-v3.18/prcm-cleanup

Paul, any comments on this series?

Regards,

Tony
 
> Testing done:
> am335x-evm: boot
> am335x-bone: boot
> am335x-boneblack: boot
> am3517-evm: boot
> am437x-gp-evm: boot
> omap3-beagle-xm: boot
> omap3-beagle: boot suspend/resume (ret/off)
> dra7-evm: boot (with additional clock patches to fix boot issues)
> omap3-n900: boot
> omap5-uevm: boot
> omap4-panda-es: boot suspend/resume (ret)
> omap2430-sdp: boot
> 
> -Tero
> 

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-18 17:16   ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-18 17:16 UTC (permalink / raw)
  To: linux-arm-kernel

* Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> Hi,
> 
> This set contains PRCM related cleanups meant for 3.18 merge window.
> These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> set is used as basis to avoid merge issues.
> 
> Purpose of this work is to eventually convert the PRCM code into a
> separate driver, but this is done in incremental parts as the amount
> of changes is substantial. Expected conclusion of this work is 3.19
> if everything goes fine.
> 
> This part of the work mostly moves some of the SoC specific PRCM driver
> calls under generic version of the same, and adds SoC-ops to support
> these on the driver level.
> 
> Working branch posted here:
> 
> tree: https://github.com/t-kristo/linux-pm.git
> branch: for-v3.18/prcm-cleanup

Paul, any comments on this series?

Regards,

Tony
 
> Testing done:
> am335x-evm: boot
> am335x-bone: boot
> am335x-boneblack: boot
> am3517-evm: boot
> am437x-gp-evm: boot
> omap3-beagle-xm: boot
> omap3-beagle: boot suspend/resume (ret/off)
> dra7-evm: boot (with additional clock patches to fix boot issues)
> omap3-n900: boot
> omap5-uevm: boot
> omap4-panda-es: boot suspend/resume (ret)
> omap2430-sdp: boot
> 
> -Tero
> 

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-18 17:16   ` Tony Lindgren
@ 2014-09-18 19:16     ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-18 19:16 UTC (permalink / raw)
  To: Tero Kristo; +Cc: linux-omap, paul, linux-arm-kernel, Nishanth Menon

* Tony Lindgren <tony@atomide.com> [140918 10:17]:
> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > Hi,
> > 
> > This set contains PRCM related cleanups meant for 3.18 merge window.
> > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > set is used as basis to avoid merge issues.
> > 
> > Purpose of this work is to eventually convert the PRCM code into a
> > separate driver, but this is done in incremental parts as the amount
> > of changes is substantial. Expected conclusion of this work is 3.19
> > if everything goes fine.
> > 
> > This part of the work mostly moves some of the SoC specific PRCM driver
> > calls under generic version of the same, and adds SoC-ops to support
> > these on the driver level.
> > 
> > Working branch posted here:
> > 
> > tree: https://github.com/t-kristo/linux-pm.git
> > branch: for-v3.18/prcm-cleanup
> 
> Paul, any comments on this series?

Just gave this branch a quick try, it seems to work with off-idle
for me when merged with current linux-omap master branch. The following
merge resolution is needed because of the recent pre es3.1 fix though.

I've pushed out this merged with all the other pending patches into
omap-for-v3.18/tmp-merge-2014-09-18.

Nishant, care to give it a try and check your recent PM related
changes work with it?

Regards,

Tony

--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@@ -30,6 -30,12 +30,11 @@@
  #include "cm3xxx.h"
  #include "cm-regbits-34xx.h"
  
+ static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+ static void omap3xxx_prm_ocp_barrier(void);
+ static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+ static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
 -static void omap3xxx_prm_reconfigure_io_chain(void);
+ 
  static const struct omap_prcm_irq omap3_prcm_irqs[] = {
  	OMAP_PRCM_IRQ("wkup",	0,	0),
  	OMAP_PRCM_IRQ("io",	9,	1),
@@@ -391,9 -382,9 +396,9 @@@ void omap3430_pre_es3_1_reconfigure_io_
   * I/O wakeup gates are aligned with the current mux settings.  Works
   * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
   * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
 - * return value.
 + * return value. These registers are only available in 3430 es3.1 and later.
   */
- void omap3_prm_reconfigure_io_chain(void)
 -static void omap3xxx_prm_reconfigure_io_chain(void)
++static void omap3_prm_reconfigure_io_chain(void)
  {
  	int i = 0;
  

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-18 19:16     ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-18 19:16 UTC (permalink / raw)
  To: linux-arm-kernel

* Tony Lindgren <tony@atomide.com> [140918 10:17]:
> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > Hi,
> > 
> > This set contains PRCM related cleanups meant for 3.18 merge window.
> > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > set is used as basis to avoid merge issues.
> > 
> > Purpose of this work is to eventually convert the PRCM code into a
> > separate driver, but this is done in incremental parts as the amount
> > of changes is substantial. Expected conclusion of this work is 3.19
> > if everything goes fine.
> > 
> > This part of the work mostly moves some of the SoC specific PRCM driver
> > calls under generic version of the same, and adds SoC-ops to support
> > these on the driver level.
> > 
> > Working branch posted here:
> > 
> > tree: https://github.com/t-kristo/linux-pm.git
> > branch: for-v3.18/prcm-cleanup
> 
> Paul, any comments on this series?

Just gave this branch a quick try, it seems to work with off-idle
for me when merged with current linux-omap master branch. The following
merge resolution is needed because of the recent pre es3.1 fix though.

I've pushed out this merged with all the other pending patches into
omap-for-v3.18/tmp-merge-2014-09-18.

Nishant, care to give it a try and check your recent PM related
changes work with it?

Regards,

Tony

--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@@ -30,6 -30,12 +30,11 @@@
  #include "cm3xxx.h"
  #include "cm-regbits-34xx.h"
  
+ static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+ static void omap3xxx_prm_ocp_barrier(void);
+ static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+ static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
 -static void omap3xxx_prm_reconfigure_io_chain(void);
+ 
  static const struct omap_prcm_irq omap3_prcm_irqs[] = {
  	OMAP_PRCM_IRQ("wkup",	0,	0),
  	OMAP_PRCM_IRQ("io",	9,	1),
@@@ -391,9 -382,9 +396,9 @@@ void omap3430_pre_es3_1_reconfigure_io_
   * I/O wakeup gates are aligned with the current mux settings.  Works
   * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
   * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
 - * return value.
 + * return value. These registers are only available in 3430 es3.1 and later.
   */
- void omap3_prm_reconfigure_io_chain(void)
 -static void omap3xxx_prm_reconfigure_io_chain(void)
++static void omap3_prm_reconfigure_io_chain(void)
  {
  	int i = 0;
  

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-18 17:16   ` Tony Lindgren
@ 2014-09-19 15:47     ` Paul Walmsley
  -1 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 15:47 UTC (permalink / raw)
  To: Tony Lindgren; +Cc: Tero Kristo, linux-omap, linux-arm-kernel

On Thu, 18 Sep 2014, Tony Lindgren wrote:

> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > Hi,
> > 
> > This set contains PRCM related cleanups meant for 3.18 merge window.
> > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > set is used as basis to avoid merge issues.
> > 
> > Purpose of this work is to eventually convert the PRCM code into a
> > separate driver, but this is done in incremental parts as the amount
> > of changes is substantial. Expected conclusion of this work is 3.19
> > if everything goes fine.
> > 
> > This part of the work mostly moves some of the SoC specific PRCM driver
> > calls under generic version of the same, and adds SoC-ops to support
> > these on the driver level.
> > 
> > Working branch posted here:
> > 
> > tree: https://github.com/t-kristo/linux-pm.git
> > branch: for-v3.18/prcm-cleanup
> 
> Paul, any comments on this series?

Yeah, I'll send a few comments today.


- Paul

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-19 15:47     ` Paul Walmsley
  0 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 15:47 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, 18 Sep 2014, Tony Lindgren wrote:

> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > Hi,
> > 
> > This set contains PRCM related cleanups meant for 3.18 merge window.
> > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > set is used as basis to avoid merge issues.
> > 
> > Purpose of this work is to eventually convert the PRCM code into a
> > separate driver, but this is done in incremental parts as the amount
> > of changes is substantial. Expected conclusion of this work is 3.19
> > if everything goes fine.
> > 
> > This part of the work mostly moves some of the SoC specific PRCM driver
> > calls under generic version of the same, and adds SoC-ops to support
> > these on the driver level.
> > 
> > Working branch posted here:
> > 
> > tree: https://github.com/t-kristo/linux-pm.git
> > branch: for-v3.18/prcm-cleanup
> 
> Paul, any comments on this series?

Yeah, I'll send a few comments today.


- Paul

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-18 17:16   ` Tony Lindgren
@ 2014-09-19 16:30     ` Paul Walmsley
  -1 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 16:30 UTC (permalink / raw)
  To: Tony Lindgren, Tero Kristo; +Cc: linux-omap, linux-arm-kernel

On Thu, 18 Sep 2014, Tony Lindgren wrote:

> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > Hi,
> > 
> > This set contains PRCM related cleanups meant for 3.18 merge window.
> > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > set is used as basis to avoid merge issues.
> > 
> > Purpose of this work is to eventually convert the PRCM code into a
> > separate driver, but this is done in incremental parts as the amount
> > of changes is substantial. Expected conclusion of this work is 3.19
> > if everything goes fine.
> > 
> > This part of the work mostly moves some of the SoC specific PRCM driver
> > calls under generic version of the same, and adds SoC-ops to support
> > these on the driver level.
> > 
> > Working branch posted here:
> > 
> > tree: https://github.com/t-kristo/linux-pm.git
> > branch: for-v3.18/prcm-cleanup
> 
> Paul, any comments on this series?

Patches 1, 3, 5, 8, 10, 13, 17, 18, 20, 21, 22, 23, 24 are:

Acked-by: Paul Walmsley <paul@pwsan.com>

Here are some specific comments on a few other patches:

Regarding patch 7:  The kerneldoc-nano function comments are good, but 
should begin with "/**" rather than "/*".  When that's fixed, it can be 
considered acked by me.

Regarding patches 14, 15, 16: Non-static prm_* functions really should 
start with omap*_ to avoid potential naming conflicts with other drivers 
when these are moved to drivers/.  (Obviously the same would apply for any 
CM function names in other, future patches.)  When that's fixed, it can be 
considered acked by me.

Regarding patch 25: What are "I/O wakeup gaes" -- gates?  When that's 
fixed, an acked-by for me can be added.

Regarding patch 26: It seems wise to ensure that omap_prm_reset_system() 
ends with a 'while(1) { cpu_relax(); }' or something similar, to ensure 
that execution flow does not proceed past that point. At that point, it 
should be possible to remove the "while(1) {}"s from omap44xx_restart(), 
omap2xxx_restart(), etc.  When that's fixed, an acked-by for me can be 
added.

...

And some general comments: none of which should probably block this 
series, but seemed worth noting:

Regarding patches 6 and 19: Tero, could you please share the DT node data 
that you're planning to submit for the PRM, CM1, and CM2 on the OMAP4* 
platforms? According to the TRM, these are separate IP blocks, with 
separate OCP header register areas.  So these should probably have 
separate DT nodes, regs, etc. if the DTS files are to match the hardware.  
The planned DTS data may impact the way these patches are written, at 
least, if more patches are to be avoided later.

As far as patches 2, 4, 9, 11, and 12 go, I'll let those go without 
comment.

- Paul

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-19 16:30     ` Paul Walmsley
  0 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 16:30 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, 18 Sep 2014, Tony Lindgren wrote:

> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > Hi,
> > 
> > This set contains PRCM related cleanups meant for 3.18 merge window.
> > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > set is used as basis to avoid merge issues.
> > 
> > Purpose of this work is to eventually convert the PRCM code into a
> > separate driver, but this is done in incremental parts as the amount
> > of changes is substantial. Expected conclusion of this work is 3.19
> > if everything goes fine.
> > 
> > This part of the work mostly moves some of the SoC specific PRCM driver
> > calls under generic version of the same, and adds SoC-ops to support
> > these on the driver level.
> > 
> > Working branch posted here:
> > 
> > tree: https://github.com/t-kristo/linux-pm.git
> > branch: for-v3.18/prcm-cleanup
> 
> Paul, any comments on this series?

Patches 1, 3, 5, 8, 10, 13, 17, 18, 20, 21, 22, 23, 24 are:

Acked-by: Paul Walmsley <paul@pwsan.com>

Here are some specific comments on a few other patches:

Regarding patch 7:  The kerneldoc-nano function comments are good, but 
should begin with "/**" rather than "/*".  When that's fixed, it can be 
considered acked by me.

Regarding patches 14, 15, 16: Non-static prm_* functions really should 
start with omap*_ to avoid potential naming conflicts with other drivers 
when these are moved to drivers/.  (Obviously the same would apply for any 
CM function names in other, future patches.)  When that's fixed, it can be 
considered acked by me.

Regarding patch 25: What are "I/O wakeup gaes" -- gates?  When that's 
fixed, an acked-by for me can be added.

Regarding patch 26: It seems wise to ensure that omap_prm_reset_system() 
ends with a 'while(1) { cpu_relax(); }' or something similar, to ensure 
that execution flow does not proceed past that point. At that point, it 
should be possible to remove the "while(1) {}"s from omap44xx_restart(), 
omap2xxx_restart(), etc.  When that's fixed, an acked-by for me can be 
added.

...

And some general comments: none of which should probably block this 
series, but seemed worth noting:

Regarding patches 6 and 19: Tero, could you please share the DT node data 
that you're planning to submit for the PRM, CM1, and CM2 on the OMAP4* 
platforms? According to the TRM, these are separate IP blocks, with 
separate OCP header register areas.  So these should probably have 
separate DT nodes, regs, etc. if the DTS files are to match the hardware.  
The planned DTS data may impact the way these patches are written, at 
least, if more patches are to be avoided later.

As far as patches 2, 4, 9, 11, and 12 go, I'll let those go without 
comment.

- Paul

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-18 19:16     ` Tony Lindgren
@ 2014-09-19 16:38       ` Paul Walmsley
  -1 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 16:38 UTC (permalink / raw)
  To: Tony Lindgren; +Cc: Tero Kristo, linux-omap, linux-arm-kernel, Nishanth Menon

[-- Attachment #1: Type: TEXT/PLAIN, Size: 24286 bytes --]

On Thu, 18 Sep 2014, Tony Lindgren wrote:

> * Tony Lindgren <tony@atomide.com> [140918 10:17]:
> > * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > > Hi,
> > > 
> > > This set contains PRCM related cleanups meant for 3.18 merge window.
> > > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > > set is used as basis to avoid merge issues.
> > > 
> > > Purpose of this work is to eventually convert the PRCM code into a
> > > separate driver, but this is done in incremental parts as the amount
> > > of changes is substantial. Expected conclusion of this work is 3.19
> > > if everything goes fine.
> > > 
> > > This part of the work mostly moves some of the SoC specific PRCM driver
> > > calls under generic version of the same, and adds SoC-ops to support
> > > these on the driver level.
> > > 
> > > Working branch posted here:
> > > 
> > > tree: https://github.com/t-kristo/linux-pm.git
> > > branch: for-v3.18/prcm-cleanup
> > 
> > Paul, any comments on this series?
> 
> Just gave this branch a quick try, it seems to work with off-idle
> for me when merged with current linux-omap master branch. The following
> merge resolution is needed because of the recent pre es3.1 fix though.
> 
> I've pushed out this merged with all the other pending patches into
> omap-for-v3.18/tmp-merge-2014-09-18.

Ran the tests here, they seemed to pass:

http://www.pwsan.com/omap/testlogs/tmp-merge-2014-09-18/20140918132302/

However, I saw the following crash at boot on 37xxevm during one of
the boot test.  Ran thirty more boot tests afterwards on that board
and it did not recur.  It seems unlikely that the problem is related
to this series, but looks like we may have some intermittent boot
failure or race on 37xx :-(


- Paul


Texas Instruments X-Loader 1.47 (Jan 14 2011 - 15:43:28)
Starting X-loader on MMC
Reading boot sector

212836 Bytes Read from MMC
Starting OS Bootloader from MMC...
Starting OS Bootloader...


U-Boot 2010.06 (Jan 14 2011 - 15:43:45)

OMAP34xx/35xx-GP ES2.1, CPU-OPP2 L3-165MHz
OMAP3 EVM board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiBhelp |230400 8N1 | NOR | script /home/p | VT102 |      Offline                                     
In:    serial
Out:   serial
Err:   serial
Read back SMSC id 0x92200000
Die ID #368000229ff80000016071640902c013
Net:   smc911x-0
Hit any key to stop autoboot:  0 
OMAP3_EVM # 
OMAP3_EVM # 
OMAP3_EVM # dhcp
smc911x: detected LAN9220 controller
smc911x: phy initialized
smc911x: MAC 00:50:c2:7e:99:42
BOOTP broadcast 1
DHCP client bound to address 192.168.57.131
Using smc911x-0 device
TFTP from server 192.168.57.1; our IP address is 192.168.57.131
Filename 'uImage-dtb.omap3-evm-37xx'.
Load address: 0x82000000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #########################
done
Bytes transferred = 4452813 (43f1cd hex)
OMAP3_EVM # setenv bootargs console=ttyO0,115200n8 ignore_loglevel earlyprintk root=/dev/nfs nfsroot=192.168.57.1:/srv/nfs4/rootfs2 nfsrootdebug ip=dhcp init=/bin/sh
OMAP3_EVM # 
OMAP3_EVM # bootm
## Booting kernel from Legacy Image at 82000000 ...
   Image Name:   Linux-
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    4452749 Bytes = 4.2 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 3.17.0-rc5-12866-g0164b2d (paul@nozomi) (gcc version 4.7.2 (Debian 4.7.2-5) ) #1 SMP 
Thu Sep 18 13:29:12 MDT 2014
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine model: TI OMAP37XX EVM (TMDSEVM3730)
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] cma: Reserved 16 MiB at 8e800000
[    0.000000] Memory policy: Data cache writeback
[    0.000000] On node 0 totalpages: 65280
[    0.000000] free_area_init_node: node 0, pgdat c08c5480, node_mem_map cfcf1000
[    0.000000]   Normal zone: 512 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 65280 pages, LIFO batch:15
[    0.000000]   HighMem zone: 1048574 pages exceeds freesize 0
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] OMAP3630 ES1.2 (l2cache iva sgx neon isp 192mhz_clk )
[    0.000000] PERCPU: Embedded 9 pages/cpu @cfc7d000 s14336 r8192 d14336 u36864
[    0.000000] pcpu-alloc: s14336 r8192 d14336 u36864 alloc=9*4096
[    0.000000] pcpu-alloc: [0] 0 
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 64768
[    0.000000] Kernel command line: console=ttyO0,115200n8 ignore_loglevel earlyprintk root=/dev/nfs nfsroot=192.168.57.1:/srv/nfs4/rootfs2 nfsrootdebug ip=dhcp init=/bin/sh
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 224708K/261120K available (5700K kernel code, 643K rwdata, 2212K rodata, 406K init, 8211K bss, 36412K reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xffe00000   (2048 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff000000   ( 744 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc07c239c   (7913 kB)
[    0.000000]       .init : 0xc07c3000 - 0xc0828800   ( 406 kB)
[    0.000000]       .data : 0xc082a000 - 0xc08caf08   ( 644 kB)
[    0.000000]        .bss : 0xc08caf08 - 0xc10cfba0   (8212 kB)
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
[    0.000000] Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz
[    0.000000] OMAP clockevent source: timer1 at 32768 Hz
[    0.000030] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65536000000000ns
[    0.000061] OMAP clocksource: 32k_counter at 32768 Hz
[    0.001068] Console: colour dummy device 80x30
[    0.001159] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[    0.001159] ... MAX_LOCKDEP_SUBCLASSES:  8
[    0.001190] ... MAX_LOCK_DEPTH:          48
[    0.001190] ... MAX_LOCKDEP_KEYS:        8191
[    0.001190] ... CLASSHASH_SIZE:          4096
[    0.001220] ... MAX_LOCKDEP_ENTRIES:     32768
[    0.001220] ... MAX_LOCKDEP_CHAINS:      65536
[    0.001251] ... CHAINHASH_SIZE:          32768
[    0.001251]  memory used by lock dependency info: 5167 kB
[    0.001251]  per task-struct memory footprint: 1152 bytes
[    0.001312] Calibrating delay loop... 594.73 BogoMIPS (lpj=2973696)
[    0.107604] pid_max: default: 32768 minimum: 301
[    0.108154] Security Framework initialized
[    0.108337] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.108367] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.111602] CPU: Testing write buffer coherency: ok
[    0.113189] CPU0: thread -1, cpu 0, socket -1, mpidr 0
[    0.113311] Setting up static identity map for 0x80566f40 - 0x80566fb0
[    0.118041] Brought up 1 CPUs
[    0.118072] SMP: Total of 1 processors activated.
[    0.118072] CPU: All CPU(s) started in SVC mode.
[    0.121765] devtmpfs: initialized
[    0.124145] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.205780] omap_hwmod: mcbsp2_sidetone using broken dt data from mcbsp
[    0.208160] omap_hwmod: mcbsp3_sidetone using broken dt data from mcbsp
[    0.316955] pinctrl core: initialized pinctrl subsystem
[    0.320739] regulator-dummy: no parameters
[    0.415618] NET: Registered protocol family 16
[    0.424682] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.428741] cpuidle: using governor ladder
[    0.428771] cpuidle: using governor menu
[    0.428985] omap_l3_smx omap_l3_smx.0: couldn't request debug irq
[    0.429107] omap_l3_smx: probe of omap_l3_smx.0 failed with error -22
[    0.437469] Reprogramming SDRC clock to 400000000 Hz
[    0.451354] gpiochip_add: registered GPIOs 0 to 31 on device: gpio
[    0.452606] OMAP GPIO hardware version 2.5
[    0.454620] gpiochip_add: registered GPIOs 32 to 63 on device: gpio
[    0.457519] gpiochip_add: registered GPIOs 64 to 95 on device: gpio
[    0.460266] gpiochip_add: registered GPIOs 96 to 127 on device: gpio
[    0.462921] gpiochip_add: registered GPIOs 128 to 159 on device: gpio
[    0.465667] gpiochip_add: registered GPIOs 160 to 191 on device: gpio
[    0.467254] irq: no irq domain found for /ocp/pinmux@48002030 !
[    0.468170] irq: no irq domain found for /ocp/pinmux@48002030 !
[    0.469055] irq: no irq domain found for /ocp/pinmux@48002030 !
[    0.494537] omap-gpmc 6e000000.gpmc: GPMC revision 5.0
[    0.496124] gpmc_probe_nand_child: ti,elm-id property not found
[    0.496337] gpmc_cs_program_settings: invalid width 0!
[    0.499053] platform 48058000.ssi-controller: Cannot lookup hwmod 'ssi'
[    0.507843] No ATAGs?
[    0.507904] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.511413] OMAP DMA hardware revision 5.0
[    0.554107] edma-dma-engine edma-dma-engine.0: Can't allocate PaRAM dummy slot
[    0.554199] edma-dma-engine: probe of edma-dma-engine.0 failed with error -22
[    0.608306] omap-dma-engine 48056000.dma-controller: OMAP DMA engine driver
[    0.609619] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/regulator-vddvario[0]'
[    0.610504] vddvario: no parameters
[    0.611114] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/regulator-vdd33a[0]'
[    0.611663] vdd33a: no parameters
[    0.612304] reg-fixed-voltage wl12xx_vmmc: could not find pctldev for node /ocp/pinmux@48002030/pinmux_wl12xx_gpio, deferring probe
[    0.612365] platform wl12xx_vmmc: Driver reg-fixed-voltage requests probe deferral
[    0.612609] of_get_named_gpiod_flags: parsed 'gpio' property of node '/regulator-lcd-3v3[0]' - status (0)
[    0.613494] lcd_3v3: 3300 mV 
[    0.619995] SCSI subsystem initialized
[    0.621185] usbcore: registered new interface driver usbfs
[    0.621459] usbcore: registered new interface driver hub
[    0.622009] usbcore: registered new device driver usb
[    0.779907] omap_i2c 48070000.i2c: bus 0 rev4.4 at 2600 kHz
[    0.781829] omap_i2c 48072000.i2c: bus 1 rev4.4 at 400 kHz
[    0.785583] omap_i2c 48060000.i2c: bus 2 rev4.4 at 400 kHz
[    0.793243] Switched to clocksource 32k_counter
[    1.008422] NET: Registered protocol family 2
[    1.010833] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    1.011077] TCP bind hash table entries: 2048 (order: 4, 73728 bytes)
[    1.012329] TCP: Hash tables configured (established 2048 bind 2048)
[    1.012542] TCP: reno registered
[    1.012573] UDP hash table entries: 256 (order: 2, 20480 bytes)
[    1.012908] UDP-Lite hash table entries: 256 (order: 2, 20480 bytes)
[    1.014556] NET: Registered protocol family 1
[    1.016998] RPC: Registered named UNIX socket transport module.
[    1.017028] RPC: Registered udp transport module.
[    1.017059] RPC: Registered tcp transport module.
[    1.017059] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    1.018890] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
[    1.027038] futex hash table entries: 256 (order: 2, 16384 bytes)
[    1.033843] VFS: Disk quotas dquot_6.5.2
[    1.034057] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[    1.037384] NFS: Registering the id_resolver key type
[    1.037872] Key type id_resolver registered
[    1.037902] Key type id_legacy registered
[    1.038116] jffs2: version 2.2. (NAND) (SUMMARY)  ?© 2001-2006 Red Hat, Inc.
[    1.038757] msgmni has been set to 470
[    1.047607] io scheduler noop registered
[    1.047637] io scheduler deadline registered
[    1.047729] io scheduler cfq registered (default)
[    1.051757] pinctrl-single 48002030.pinmux: 284 pins at pa fa002030 size 568
[    1.052673] pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
[    1.053771] pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
[    1.057189] pbias_mmc_omap2430: 1800 <--> 3000 mV at 3000 mV 
[    1.059509] abb_mpu_iva: 1012 <--> 1375 mV 
[    1.061737] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    1.071899] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial@4806a000[0]'
[    1.072875] 4806a000.serial: ttyO0 at MMIO 0x4806a000 (irq = 224, base_baud = 3000000) is a OMAP UART0
[    1.977722] console [ttyO0] enabled
[    1.985351] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial@4806c000[0]'
[    1.995727] 4806c000.serial: ttyO1 at MMIO 0x4806c000 (irq = 225, base_baud = 3000000) is a OMAP UART1
[    2.014007] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial@49020000[0]'
[    2.024353] 49020000.serial: ttyO2 at MMIO 0x49020000 (irq = 226, base_baud = 3000000) is a OMAP UART2
[    2.036285] omap_uart 49042000.serial: no wakeirq for uart0
[    2.042297] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial@49042000[0]'
[    2.052581] 49042000.serial: ttyO3 at MMIO 0x49042000 (irq = 260, base_baud = 3000000) is a OMAP UART3
[    2.109252] brd: module loaded
[    2.136108] loop: module loaded
[    2.160552] twl 0-0048: PIH (irq 294) chaining IRQs 298..306
[    2.167144] twl 0-0048: power (irq 303) chaining IRQs 306..313
[    2.184173] VAUX1: at 3000 mV 
[    2.192749] VAUX2_4030: at 1800 mV 
[    2.200714] VAUX3: at 2800 mV 
[    2.212615] VAUX4: at 2800 mV 
[    2.220214] VDD1: 600 <--> 1450 mV at 1200 mV 
[    2.229949] VDAC: 1800 mV 
[    2.239624] VIO: at 1800 mV 
[    2.247985] VINTANA1: 1500 mV 
[    2.256774] VINTANA2: at 2750 mV 
[    2.265624] VINTDIG: 1500 mV 
[    2.272277] VMMC1: 1850 <--> 3150 mV at 3000 mV 
[    2.281951] VMMC2: 1850 <--> 3150 mV at 2600 mV 
[    2.291107] VUSB1V5: 1500 mV 
[    2.296752] VUSB1V8: 1800 mV 
[    2.301879] VUSB3V1: 3100 mV 
[    2.310089] VPLL1: at 1800 mV 
[    2.319671] VPLL2: 1800 mV 
[    2.326751] VSIM: 1800 <--> 3000 mV at 1800 mV 
[    2.335571] twl4030_gpio twl4030-gpio: gpio (irq 298) chaining IRQs 314..331
[    2.344512] gpiochip_find_base: found new base at 492
[    2.350799] gpiochip_add: registered GPIOs 492 to 511 on device: twl4030
[    2.433349] mtdoops: mtd device (mtddev=name/number) must be supplied
[    2.471710] libphy: smsc911x-mdio: probed
[    2.476654] smsc911x 2c000000.ethernet eth0: attached PHY driver [SMSC LAN8700] (mii_bus:phy_addr=2c000000.ethe
rne:01, irq=-1)
[    2.489044] smsc911x 2c000000.ethernet eth0: MAC Address: 00:50:c2:7e:99:42
[    2.498687] usbcore: registered new interface driver asix
[    2.504730] usbcore: registered new interface driver ax88179_178a
[    2.511352] usbcore: registered new interface driver cdc_ether
[    2.517852] usbcore: registered new interface driver smsc95xx
[    2.524200] usbcore: registered new interface driver net1080
[    2.530364] usbcore: registered new interface driver cdc_subset
[    2.536895] usbcore: registered new interface driver zaurus
[    2.543151] usbcore: registered new interface driver cdc_ncm
[    2.551086] usbcore: registered new interface driver cdc_wdm
[    2.557525] usbcore: registered new interface driver usb-storage
[    2.564208] usbcore: registered new interface driver usbtest
[    2.574462] mousedev: PS/2 mouse device common for all mice
[    2.581848] twl4030_keypad 48070000.i2c:twl@48:keypad: OF: linux,keymap property not defined in /ocp/i2c@48070000/twl@48/keypad
[    2.594085] twl4030_keypad 48070000.i2c:twl@48:keypad: Failed to build keymap
[    2.601684] twl4030_keypad: probe of 48070000.i2c:twl@48:keypad failed with error -2
[    2.611633] of_get_named_gpiod_flags: parsed 'pendown-gpio' property of node '/ocp/spi@48098000/tsc2046@0[0]' - status (0)
[    2.703765] ads7846 spi1.0: touchscreen, irq 207
[    2.711456] input: ADS7846 Touchscreen as /devices/68000000.ocp/48098000.spi/spi_master/spi1/spi1.0/input/input1
[    2.729522] input: twl4030_pwrbutton as /devices/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:pwrbutton/input/input2
[    2.746917] twl_rtc 48070000.i2c:twl@48:rtc: Power up reset detected.
[    2.754852] twl_rtc 48070000.i2c:twl@48:rtc: Enabling TWL-RTC
[    2.766296] twl_rtc 48070000.i2c:twl@48:rtc: rtc core: registered 48070000.i2c:twl@48 as rtc0
[    2.777374] i2c /dev entries driver
[    2.785491] Driver for 1-wire Dallas network protocol.
[    2.795928] omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
[    2.809204] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@4809c000[0]'
[    2.819000] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@4809c000[0]'
[    2.882751] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@480b4000[0]'
[    2.892486] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@480b4000[0]'
[    2.902984] omap_hsmmc 480b4000.mmc: unable to get vmmc regulator -517
[    2.910522] platform 480b4000.mmc: Driver omap_hsmmc requests probe deferral
[    2.919433] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/ledb[0]' - status (0)
[    2.929016] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/ledb[0]' - status (0)
[    2.944396] ledtrig-cpu: registered to indicate activity on CPUs
[    2.952117] usbcore: registered new interface driver usbhid
[    2.958007] usbhid: USB HID core driver
[    2.964782] oprofile: using arm/armv7
[    2.969543] TCP: cubic registered
[    2.973144] Initializing XFRM netlink socket
[    2.977813] NET: Registered protocol family 17
[    2.982666] NET: Registered protocol family 15
[    2.987823] Key type dns_resolver registered
[    2.992767] omap2_set_init_voltage: unable to find boot up OPP for vdd_mpu_iva
[    3.000396] omap2_set_init_voltage: unable to set vdd_mpu_iva
[    3.006530] omap2_set_init_voltage: unable to find boot up OPP for vdd_core
[    3.013916] omap2_set_init_voltage: unable to set vdd_core
[    3.024597] ThumbEE CPU extension supported.
[    3.029174] Registering SWP/SWPB emulation handler
[    3.034301] SmartReflex Class3 initialized
[    3.054931] of_get_named_gpiod_flags: parsed 'gpio' property of node '/wl12xx_vmmc[0]' - status (0)
[    3.065643] vwl1271: 1800 mV 
[    3.069000] vwl1271: supplied by VMMC2
[    3.074829] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@480b4000[0]'
[    3.084533] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@480b4000[0]'
[    3.204681] mmc0: host does not support reading read-only switch. assuming write-enable.
[    3.213531] mmc0: new SDHC card at address e624
[    3.221923] mmcblk0: mmc0:e624 SD08G 7.40 GiB 
[    3.233978] twl_rtc 48070000.i2c:twl@48:rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
[    3.244171] sr_init: No PMIC hook to init smartreflex
[    3.250122] smartreflex smartreflex.0: omap_sr_probe: SmartReflex driver initialized
[    3.259307] smartreflex smartreflex.1: omap_sr_probe: SmartReflex driver initialized
[    3.342926] smsc911x 2c000000.ethernet eth0: SMSC911x/921x identified at 0xd087c000, IRQ: 208
[    3.369903]  mmcblk0: p1 p2 p3
[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
[    4.900299] Internal error: : 1028 [#1] SMP ARM
[    4.905090] Modules linked in:
[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
[    4.928009] LR is at clockevents_program_event+0xc0/0x148
[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015      
[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)   
[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
[    4.989868] bec0:                                                       237bc339 00000001
[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000) 
[    5.157470] ---[ end trace f92de024d996d904 ]---
[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-19 16:38       ` Paul Walmsley
  0 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 16:38 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, 18 Sep 2014, Tony Lindgren wrote:

> * Tony Lindgren <tony@atomide.com> [140918 10:17]:
> > * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> > > Hi,
> > > 
> > > This set contains PRCM related cleanups meant for 3.18 merge window.
> > > These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> > > (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> > > set is used as basis to avoid merge issues.
> > > 
> > > Purpose of this work is to eventually convert the PRCM code into a
> > > separate driver, but this is done in incremental parts as the amount
> > > of changes is substantial. Expected conclusion of this work is 3.19
> > > if everything goes fine.
> > > 
> > > This part of the work mostly moves some of the SoC specific PRCM driver
> > > calls under generic version of the same, and adds SoC-ops to support
> > > these on the driver level.
> > > 
> > > Working branch posted here:
> > > 
> > > tree: https://github.com/t-kristo/linux-pm.git
> > > branch: for-v3.18/prcm-cleanup
> > 
> > Paul, any comments on this series?
> 
> Just gave this branch a quick try, it seems to work with off-idle
> for me when merged with current linux-omap master branch. The following
> merge resolution is needed because of the recent pre es3.1 fix though.
> 
> I've pushed out this merged with all the other pending patches into
> omap-for-v3.18/tmp-merge-2014-09-18.

Ran the tests here, they seemed to pass:

http://www.pwsan.com/omap/testlogs/tmp-merge-2014-09-18/20140918132302/

However, I saw the following crash at boot on 37xxevm during one of
the boot test.  Ran thirty more boot tests afterwards on that board
and it did not recur.  It seems unlikely that the problem is related
to this series, but looks like we may have some intermittent boot
failure or race on 37xx :-(


- Paul


Texas Instruments X-Loader 1.47 (Jan 14 2011 - 15:43:28)
Starting X-loader on MMC
Reading boot sector

212836 Bytes Read from MMC
Starting OS Bootloader from MMC...
Starting OS Bootloader...


U-Boot 2010.06 (Jan 14 2011 - 15:43:45)

OMAP34xx/35xx-GP ES2.1, CPU-OPP2 L3-165MHz
OMAP3 EVM board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiBhelp |230400 8N1 | NOR | script /home/p | VT102 |      Offline                                     
In:    serial
Out:   serial
Err:   serial
Read back SMSC id 0x92200000
Die ID #368000229ff80000016071640902c013
Net:   smc911x-0
Hit any key to stop autoboot:  0 
OMAP3_EVM # 
OMAP3_EVM # 
OMAP3_EVM # dhcp
smc911x: detected LAN9220 controller
smc911x: phy initialized
smc911x: MAC 00:50:c2:7e:99:42
BOOTP broadcast 1
DHCP client bound to address 192.168.57.131
Using smc911x-0 device
TFTP from server 192.168.57.1; our IP address is 192.168.57.131
Filename 'uImage-dtb.omap3-evm-37xx'.
Load address: 0x82000000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #########################
done
Bytes transferred = 4452813 (43f1cd hex)
OMAP3_EVM # setenv bootargs console=ttyO0,115200n8 ignore_loglevel earlyprintk root=/dev/nfs nfsroot=192.168.57.1:/srv/nfs4/rootfs2 nfsrootdebug ip=dhcp init=/bin/sh
OMAP3_EVM # 
OMAP3_EVM # bootm
## Booting kernel from Legacy Image at 82000000 ...
   Image Name:   Linux-
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    4452749 Bytes = 4.2 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 3.17.0-rc5-12866-g0164b2d (paul at nozomi) (gcc version 4.7.2 (Debian 4.7.2-5) ) #1 SMP 
Thu Sep 18 13:29:12 MDT 2014
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine model: TI OMAP37XX EVM (TMDSEVM3730)
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] cma: Reserved 16 MiB at 8e800000
[    0.000000] Memory policy: Data cache writeback
[    0.000000] On node 0 totalpages: 65280
[    0.000000] free_area_init_node: node 0, pgdat c08c5480, node_mem_map cfcf1000
[    0.000000]   Normal zone: 512 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 65280 pages, LIFO batch:15
[    0.000000]   HighMem zone: 1048574 pages exceeds freesize 0
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] OMAP3630 ES1.2 (l2cache iva sgx neon isp 192mhz_clk )
[    0.000000] PERCPU: Embedded 9 pages/cpu @cfc7d000 s14336 r8192 d14336 u36864
[    0.000000] pcpu-alloc: s14336 r8192 d14336 u36864 alloc=9*4096
[    0.000000] pcpu-alloc: [0] 0 
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 64768
[    0.000000] Kernel command line: console=ttyO0,115200n8 ignore_loglevel earlyprintk root=/dev/nfs nfsroot=192.168.57.1:/srv/nfs4/rootfs2 nfsrootdebug ip=dhcp init=/bin/sh
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 224708K/261120K available (5700K kernel code, 643K rwdata, 2212K rodata, 406K init, 8211K bss, 36412K reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xffe00000   (2048 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff000000   ( 744 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc07c239c   (7913 kB)
[    0.000000]       .init : 0xc07c3000 - 0xc0828800   ( 406 kB)
[    0.000000]       .data : 0xc082a000 - 0xc08caf08   ( 644 kB)
[    0.000000]        .bss : 0xc08caf08 - 0xc10cfba0   (8212 kB)
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
[    0.000000] Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz
[    0.000000] OMAP clockevent source: timer1 at 32768 Hz
[    0.000030] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65536000000000ns
[    0.000061] OMAP clocksource: 32k_counter at 32768 Hz
[    0.001068] Console: colour dummy device 80x30
[    0.001159] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[    0.001159] ... MAX_LOCKDEP_SUBCLASSES:  8
[    0.001190] ... MAX_LOCK_DEPTH:          48
[    0.001190] ... MAX_LOCKDEP_KEYS:        8191
[    0.001190] ... CLASSHASH_SIZE:          4096
[    0.001220] ... MAX_LOCKDEP_ENTRIES:     32768
[    0.001220] ... MAX_LOCKDEP_CHAINS:      65536
[    0.001251] ... CHAINHASH_SIZE:          32768
[    0.001251]  memory used by lock dependency info: 5167 kB
[    0.001251]  per task-struct memory footprint: 1152 bytes
[    0.001312] Calibrating delay loop... 594.73 BogoMIPS (lpj=2973696)
[    0.107604] pid_max: default: 32768 minimum: 301
[    0.108154] Security Framework initialized
[    0.108337] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.108367] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.111602] CPU: Testing write buffer coherency: ok
[    0.113189] CPU0: thread -1, cpu 0, socket -1, mpidr 0
[    0.113311] Setting up static identity map for 0x80566f40 - 0x80566fb0
[    0.118041] Brought up 1 CPUs
[    0.118072] SMP: Total of 1 processors activated.
[    0.118072] CPU: All CPU(s) started in SVC mode.
[    0.121765] devtmpfs: initialized
[    0.124145] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.205780] omap_hwmod: mcbsp2_sidetone using broken dt data from mcbsp
[    0.208160] omap_hwmod: mcbsp3_sidetone using broken dt data from mcbsp
[    0.316955] pinctrl core: initialized pinctrl subsystem
[    0.320739] regulator-dummy: no parameters
[    0.415618] NET: Registered protocol family 16
[    0.424682] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.428741] cpuidle: using governor ladder
[    0.428771] cpuidle: using governor menu
[    0.428985] omap_l3_smx omap_l3_smx.0: couldn't request debug irq
[    0.429107] omap_l3_smx: probe of omap_l3_smx.0 failed with error -22
[    0.437469] Reprogramming SDRC clock to 400000000 Hz
[    0.451354] gpiochip_add: registered GPIOs 0 to 31 on device: gpio
[    0.452606] OMAP GPIO hardware version 2.5
[    0.454620] gpiochip_add: registered GPIOs 32 to 63 on device: gpio
[    0.457519] gpiochip_add: registered GPIOs 64 to 95 on device: gpio
[    0.460266] gpiochip_add: registered GPIOs 96 to 127 on device: gpio
[    0.462921] gpiochip_add: registered GPIOs 128 to 159 on device: gpio
[    0.465667] gpiochip_add: registered GPIOs 160 to 191 on device: gpio
[    0.467254] irq: no irq domain found for /ocp/pinmux at 48002030 !
[    0.468170] irq: no irq domain found for /ocp/pinmux at 48002030 !
[    0.469055] irq: no irq domain found for /ocp/pinmux at 48002030 !
[    0.494537] omap-gpmc 6e000000.gpmc: GPMC revision 5.0
[    0.496124] gpmc_probe_nand_child: ti,elm-id property not found
[    0.496337] gpmc_cs_program_settings: invalid width 0!
[    0.499053] platform 48058000.ssi-controller: Cannot lookup hwmod 'ssi'
[    0.507843] No ATAGs?
[    0.507904] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.511413] OMAP DMA hardware revision 5.0
[    0.554107] edma-dma-engine edma-dma-engine.0: Can't allocate PaRAM dummy slot
[    0.554199] edma-dma-engine: probe of edma-dma-engine.0 failed with error -22
[    0.608306] omap-dma-engine 48056000.dma-controller: OMAP DMA engine driver
[    0.609619] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/regulator-vddvario[0]'
[    0.610504] vddvario: no parameters
[    0.611114] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/regulator-vdd33a[0]'
[    0.611663] vdd33a: no parameters
[    0.612304] reg-fixed-voltage wl12xx_vmmc: could not find pctldev for node /ocp/pinmux at 48002030/pinmux_wl12xx_gpio, deferring probe
[    0.612365] platform wl12xx_vmmc: Driver reg-fixed-voltage requests probe deferral
[    0.612609] of_get_named_gpiod_flags: parsed 'gpio' property of node '/regulator-lcd-3v3[0]' - status (0)
[    0.613494] lcd_3v3: 3300 mV 
[    0.619995] SCSI subsystem initialized
[    0.621185] usbcore: registered new interface driver usbfs
[    0.621459] usbcore: registered new interface driver hub
[    0.622009] usbcore: registered new device driver usb
[    0.779907] omap_i2c 48070000.i2c: bus 0 rev4.4 at 2600 kHz
[    0.781829] omap_i2c 48072000.i2c: bus 1 rev4.4 at 400 kHz
[    0.785583] omap_i2c 48060000.i2c: bus 2 rev4.4 at 400 kHz
[    0.793243] Switched to clocksource 32k_counter
[    1.008422] NET: Registered protocol family 2
[    1.010833] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    1.011077] TCP bind hash table entries: 2048 (order: 4, 73728 bytes)
[    1.012329] TCP: Hash tables configured (established 2048 bind 2048)
[    1.012542] TCP: reno registered
[    1.012573] UDP hash table entries: 256 (order: 2, 20480 bytes)
[    1.012908] UDP-Lite hash table entries: 256 (order: 2, 20480 bytes)
[    1.014556] NET: Registered protocol family 1
[    1.016998] RPC: Registered named UNIX socket transport module.
[    1.017028] RPC: Registered udp transport module.
[    1.017059] RPC: Registered tcp transport module.
[    1.017059] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    1.018890] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
[    1.027038] futex hash table entries: 256 (order: 2, 16384 bytes)
[    1.033843] VFS: Disk quotas dquot_6.5.2
[    1.034057] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[    1.037384] NFS: Registering the id_resolver key type
[    1.037872] Key type id_resolver registered
[    1.037902] Key type id_legacy registered
[    1.038116] jffs2: version 2.2. (NAND) (SUMMARY)  ?? 2001-2006 Red Hat, Inc.
[    1.038757] msgmni has been set to 470
[    1.047607] io scheduler noop registered
[    1.047637] io scheduler deadline registered
[    1.047729] io scheduler cfq registered (default)
[    1.051757] pinctrl-single 48002030.pinmux: 284 pins at pa fa002030 size 568
[    1.052673] pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
[    1.053771] pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
[    1.057189] pbias_mmc_omap2430: 1800 <--> 3000 mV at 3000 mV 
[    1.059509] abb_mpu_iva: 1012 <--> 1375 mV 
[    1.061737] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    1.071899] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial at 4806a000[0]'
[    1.072875] 4806a000.serial: ttyO0 at MMIO 0x4806a000 (irq = 224, base_baud = 3000000) is a OMAP UART0
[    1.977722] console [ttyO0] enabled
[    1.985351] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial at 4806c000[0]'
[    1.995727] 4806c000.serial: ttyO1 at MMIO 0x4806c000 (irq = 225, base_baud = 3000000) is a OMAP UART1
[    2.014007] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial at 49020000[0]'
[    2.024353] 49020000.serial: ttyO2 at MMIO 0x49020000 (irq = 226, base_baud = 3000000) is a OMAP UART2
[    2.036285] omap_uart 49042000.serial: no wakeirq for uart0
[    2.042297] of_get_named_gpiod_flags: can't parse 'rts-gpio' property of node '/ocp/serial at 49042000[0]'
[    2.052581] 49042000.serial: ttyO3 at MMIO 0x49042000 (irq = 260, base_baud = 3000000) is a OMAP UART3
[    2.109252] brd: module loaded
[    2.136108] loop: module loaded
[    2.160552] twl 0-0048: PIH (irq 294) chaining IRQs 298..306
[    2.167144] twl 0-0048: power (irq 303) chaining IRQs 306..313
[    2.184173] VAUX1: at 3000 mV 
[    2.192749] VAUX2_4030: at 1800 mV 
[    2.200714] VAUX3: at 2800 mV 
[    2.212615] VAUX4: at 2800 mV 
[    2.220214] VDD1: 600 <--> 1450 mV at 1200 mV 
[    2.229949] VDAC: 1800 mV 
[    2.239624] VIO: at 1800 mV 
[    2.247985] VINTANA1: 1500 mV 
[    2.256774] VINTANA2: at 2750 mV 
[    2.265624] VINTDIG: 1500 mV 
[    2.272277] VMMC1: 1850 <--> 3150 mV at 3000 mV 
[    2.281951] VMMC2: 1850 <--> 3150 mV at 2600 mV 
[    2.291107] VUSB1V5: 1500 mV 
[    2.296752] VUSB1V8: 1800 mV 
[    2.301879] VUSB3V1: 3100 mV 
[    2.310089] VPLL1: at 1800 mV 
[    2.319671] VPLL2: 1800 mV 
[    2.326751] VSIM: 1800 <--> 3000 mV at 1800 mV 
[    2.335571] twl4030_gpio twl4030-gpio: gpio (irq 298) chaining IRQs 314..331
[    2.344512] gpiochip_find_base: found new base at 492
[    2.350799] gpiochip_add: registered GPIOs 492 to 511 on device: twl4030
[    2.433349] mtdoops: mtd device (mtddev=name/number) must be supplied
[    2.471710] libphy: smsc911x-mdio: probed
[    2.476654] smsc911x 2c000000.ethernet eth0: attached PHY driver [SMSC LAN8700] (mii_bus:phy_addr=2c000000.ethe
rne:01, irq=-1)
[    2.489044] smsc911x 2c000000.ethernet eth0: MAC Address: 00:50:c2:7e:99:42
[    2.498687] usbcore: registered new interface driver asix
[    2.504730] usbcore: registered new interface driver ax88179_178a
[    2.511352] usbcore: registered new interface driver cdc_ether
[    2.517852] usbcore: registered new interface driver smsc95xx
[    2.524200] usbcore: registered new interface driver net1080
[    2.530364] usbcore: registered new interface driver cdc_subset
[    2.536895] usbcore: registered new interface driver zaurus
[    2.543151] usbcore: registered new interface driver cdc_ncm
[    2.551086] usbcore: registered new interface driver cdc_wdm
[    2.557525] usbcore: registered new interface driver usb-storage
[    2.564208] usbcore: registered new interface driver usbtest
[    2.574462] mousedev: PS/2 mouse device common for all mice
[    2.581848] twl4030_keypad 48070000.i2c:twl at 48:keypad: OF: linux,keymap property not defined in /ocp/i2c at 48070000/twl at 48/keypad
[    2.594085] twl4030_keypad 48070000.i2c:twl at 48:keypad: Failed to build keymap
[    2.601684] twl4030_keypad: probe of 48070000.i2c:twl at 48:keypad failed with error -2
[    2.611633] of_get_named_gpiod_flags: parsed 'pendown-gpio' property of node '/ocp/spi at 48098000/tsc2046 at 0[0]' - status (0)
[    2.703765] ads7846 spi1.0: touchscreen, irq 207
[    2.711456] input: ADS7846 Touchscreen as /devices/68000000.ocp/48098000.spi/spi_master/spi1/spi1.0/input/input1
[    2.729522] input: twl4030_pwrbutton as /devices/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl at 48:pwrbutton/input/input2
[    2.746917] twl_rtc 48070000.i2c:twl at 48:rtc: Power up reset detected.
[    2.754852] twl_rtc 48070000.i2c:twl at 48:rtc: Enabling TWL-RTC
[    2.766296] twl_rtc 48070000.i2c:twl at 48:rtc: rtc core: registered 48070000.i2c:twl at 48 as rtc0
[    2.777374] i2c /dev entries driver
[    2.785491] Driver for 1-wire Dallas network protocol.
[    2.795928] omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
[    2.809204] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc at 4809c000[0]'
[    2.819000] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc at 4809c000[0]'
[    2.882751] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc at 480b4000[0]'
[    2.892486] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc at 480b4000[0]'
[    2.902984] omap_hsmmc 480b4000.mmc: unable to get vmmc regulator -517
[    2.910522] platform 480b4000.mmc: Driver omap_hsmmc requests probe deferral
[    2.919433] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/ledb[0]' - status (0)
[    2.929016] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/ledb[0]' - status (0)
[    2.944396] ledtrig-cpu: registered to indicate activity on CPUs
[    2.952117] usbcore: registered new interface driver usbhid
[    2.958007] usbhid: USB HID core driver
[    2.964782] oprofile: using arm/armv7
[    2.969543] TCP: cubic registered
[    2.973144] Initializing XFRM netlink socket
[    2.977813] NET: Registered protocol family 17
[    2.982666] NET: Registered protocol family 15
[    2.987823] Key type dns_resolver registered
[    2.992767] omap2_set_init_voltage: unable to find boot up OPP for vdd_mpu_iva
[    3.000396] omap2_set_init_voltage: unable to set vdd_mpu_iva
[    3.006530] omap2_set_init_voltage: unable to find boot up OPP for vdd_core
[    3.013916] omap2_set_init_voltage: unable to set vdd_core
[    3.024597] ThumbEE CPU extension supported.
[    3.029174] Registering SWP/SWPB emulation handler
[    3.034301] SmartReflex Class3 initialized
[    3.054931] of_get_named_gpiod_flags: parsed 'gpio' property of node '/wl12xx_vmmc[0]' - status (0)
[    3.065643] vwl1271: 1800 mV 
[    3.069000] vwl1271: supplied by VMMC2
[    3.074829] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc at 480b4000[0]'
[    3.084533] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc at 480b4000[0]'
[    3.204681] mmc0: host does not support reading read-only switch. assuming write-enable.
[    3.213531] mmc0: new SDHC card at address e624
[    3.221923] mmcblk0: mmc0:e624 SD08G 7.40 GiB 
[    3.233978] twl_rtc 48070000.i2c:twl at 48:rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
[    3.244171] sr_init: No PMIC hook to init smartreflex
[    3.250122] smartreflex smartreflex.0: omap_sr_probe: SmartReflex driver initialized
[    3.259307] smartreflex smartreflex.1: omap_sr_probe: SmartReflex driver initialized
[    3.342926] smsc911x 2c000000.ethernet eth0: SMSC911x/921x identified at 0xd087c000, IRQ: 208
[    3.369903]  mmcblk0: p1 p2 p3
[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
[    4.900299] Internal error: : 1028 [#1] SMP ARM
[    4.905090] Modules linked in:
[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
[    4.928009] LR is at clockevents_program_event+0xc0/0x148
[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015      
[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)   
[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
[    4.989868] bec0:                                                       237bc339 00000001
[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000) 
[    5.157470] ---[ end trace f92de024d996d904 ]---
[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-19 16:38       ` Paul Walmsley
@ 2014-09-19 17:27         ` Paul Walmsley
  -1 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 17:27 UTC (permalink / raw)
  To: Tony Lindgren; +Cc: Tero Kristo, linux-omap, linux-arm-kernel, Nishanth Menon

On Fri, 19 Sep 2014, Paul Walmsley wrote:

> However, I saw the following crash at boot on 37xxevm during one of
> the boot test.  Ran thirty more boot tests afterwards on that board
> and it did not recur.  It seems unlikely that the problem is related
> to this series, but looks like we may have some intermittent boot
> failure or race on 37xx :-(

...

> [    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> [    4.900299] Internal error: : 1028 [#1] SMP ARM
> [    4.905090] Modules linked in:
> [    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> [    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> [    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> [    4.928009] LR is at clockevents_program_event+0xc0/0x148
> [    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> [    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> [    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> [    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> [    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> [    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> [    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015      
> [    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)   
> [    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> [    4.989868] bec0:                                                       237bc339 00000001
> [    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> [    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> [    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> [    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> [    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> [    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> [    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> [    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> [    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> [    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> [    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> [    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> [    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> [    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> [    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> [    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> [    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> [    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000) 
> [    5.157470] ---[ end trace f92de024d996d904 ]---
> [    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> [    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!

Actually it just occurred to me that if something broke 
*wait_target_ready(), we'd expect to see intermittent failures like this, 
and this series touches *wait_target_ready().  So it might be worth taking 
a look at that with a magnifying glass to make sure that it's working.


- Paul

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-19 17:27         ` Paul Walmsley
  0 siblings, 0 replies; 90+ messages in thread
From: Paul Walmsley @ 2014-09-19 17:27 UTC (permalink / raw)
  To: linux-arm-kernel

On Fri, 19 Sep 2014, Paul Walmsley wrote:

> However, I saw the following crash at boot on 37xxevm during one of
> the boot test.  Ran thirty more boot tests afterwards on that board
> and it did not recur.  It seems unlikely that the problem is related
> to this series, but looks like we may have some intermittent boot
> failure or race on 37xx :-(

...

> [    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> [    4.900299] Internal error: : 1028 [#1] SMP ARM
> [    4.905090] Modules linked in:
> [    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> [    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> [    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> [    4.928009] LR is at clockevents_program_event+0xc0/0x148
> [    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> [    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> [    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> [    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> [    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> [    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> [    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015      
> [    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)   
> [    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> [    4.989868] bec0:                                                       237bc339 00000001
> [    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> [    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> [    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> [    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> [    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> [    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> [    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> [    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> [    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> [    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> [    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> [    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> [    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> [    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> [    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> [    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> [    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> [    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000) 
> [    5.157470] ---[ end trace f92de024d996d904 ]---
> [    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> [    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!

Actually it just occurred to me that if something broke 
*wait_target_ready(), we'd expect to see intermittent failures like this, 
and this series touches *wait_target_ready().  So it might be worth taking 
a look at that with a magnifying glass to make sure that it's working.


- Paul

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-18 19:16     ` Tony Lindgren
@ 2014-09-19 20:12       ` Nishanth Menon
  -1 siblings, 0 replies; 90+ messages in thread
From: Nishanth Menon @ 2014-09-19 20:12 UTC (permalink / raw)
  To: Tony Lindgren, Tero Kristo; +Cc: linux-omap, paul, linux-arm-kernel

On 09/18/2014 02:16 PM, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [140918 10:17]:
>> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
>>> Hi,
>>>
>>> This set contains PRCM related cleanups meant for 3.18 merge window.
>>> These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
>>> (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
>>> set is used as basis to avoid merge issues.
>>>
>>> Purpose of this work is to eventually convert the PRCM code into a
>>> separate driver, but this is done in incremental parts as the amount
>>> of changes is substantial. Expected conclusion of this work is 3.19
>>> if everything goes fine.
>>>
>>> This part of the work mostly moves some of the SoC specific PRCM driver
>>> calls under generic version of the same, and adds SoC-ops to support
>>> these on the driver level.
>>>
>>> Working branch posted here:
>>>
>>> tree: https://github.com/t-kristo/linux-pm.git
>>> branch: for-v3.18/prcm-cleanup
>>
>> Paul, any comments on this series?
> 
> Just gave this branch a quick try, it seems to work with off-idle
> for me when merged with current linux-omap master branch. The following
> merge resolution is needed because of the recent pre es3.1 fix though.
> 
> I've pushed out this merged with all the other pending patches into
> omap-for-v3.18/tmp-merge-2014-09-18.
> 
> Nishant, care to give it a try and check your recent PM related
> changes work with it?
> 
Sure. Sorry about the delay..  needed to find some workarounds for
working with my board farm..


Tested-by: Nishanth Menon <nm@ti.com>

Based on:

omap-for-v3.18/tmp-merge-2014-09-18
0164b2d Merge branch 'omap-for-v3.18/prcm' into omap-for-v3.18/tmp-merge

Test #1: basic testing
Added
69c6133 HACK: Makefile: Build a uImage with dtb already appended
(for legacy boards)

commit 0164b2dbe83e885a53b0c9a99a508bdbfdf7ee6d BASIC boot
 1: am335x-evm:  Boot PASS: http://slexy.org/raw/s2zy9OUOMM
 2:  am335x-sk:  Boot PASS: http://slexy.org/raw/s2t0JaiHYf
 3: am3517-evm:  Boot PASS: http://slexy.org/raw/s2SRkMMQwp
 4:  am37x-evm:  Boot PASS: http://slexy.org/raw/s20T0sq5dp
 5: am43xx-epos:  Boot PASS: http://slexy.org/raw/s2AVYqDVBf
 6: am43xx-gpevm:  Boot PASS: http://slexy.org/raw/s213N14B9r
 7: BeagleBoard-XM:  Boot PASS: http://slexy.org/raw/s21yyMkFRS
 8: beagleboard-vanilla:  Boot PASS: http://slexy.org/raw/s2SYJOHRwI
 9: beaglebone-black:  Boot PASS: http://slexy.org/raw/s214QDgb06
10: beaglebone:  Boot PASS: http://slexy.org/raw/s21SOLcjMD
11: craneboard:  Boot PASS: http://slexy.org/raw/s218cXoYSl
12: dra72x-evm:  Boot FAIL: http://slexy.org/raw/s21BAnAW8N
13: dra7xx-evm:  Boot PASS: http://slexy.org/raw/s21kf4G5Sh
14: OMAP3430-Labrador(LDP):  Boot PASS: http://slexy.org/raw/s21QIGwFOM
15:       n900:  Boot PASS: http://slexy.org/raw/s21T5xECo2
16:  omap5-evm:  Boot PASS: http://slexy.org/raw/s20qxa3iPw
17: pandaboard-es:  Boot PASS: http://slexy.org/raw/s2Fh0hMW7n
18: pandaboard-vanilla:  Boot PASS: http://slexy.org/raw/s2vqUc528i
19:    sdp2430:  Boot PASS: http://slexy.org/raw/s21gAsEAeD
20:    sdp3430:  Boot PASS: http://slexy.org/raw/s2dvThSn5D
TOTAL = 20 boards, Booted Boards = 19, No Boot boards = 1


Test #2: PM test (cpufreq/cpuidle/suspend-resume where applicable)

Testing script: (http://slexy.org/view/s21SRQehwu)

Added the following patches:
59bf40d ARM: OMAP5/DRA7: PM: cpuidle MPU CSWR support
(discussion still going on https://patchwork.kernel.org/patch/4764661/
- but good to know if it still continues to work with PRM changes).

69c6133 HACK: Makefile: Build a uImage with dtb already appended
(for legacy boards)

b854ca8 gpio: omap: Fix interrupt names
(https://patchwork.kernel.org/patch/4854511/)

c50fc8b pinctrl: single: AM437x: Add pinctrl compatibility
37d17bf pinctrl: single: Add DRA7 pinctrl compatibility
74121c6 pinctrl: bindings: Add OMAP pinctrl binding
(all of the above are in linux-next)

efb2486 clk: prevent erronous parsing of children during rate change
b92ac70 clk: ti: dra7-atl: Provide error check for incoming parameters
in set_rate
96e8b6b clk: ti: divider: Provide error check for incoming parameters
in set_rate
(all above picked up by mike)

92e5e74 ARM: OMAP2+ / pm_debug: add support for wakeup_timer configuration
(wakeup timer for testing purposes - remote boards)

with these:
commit 0164b2dbe83e885a53b0c9a99a508bdbfdf7ee6d + Additional patches
basic PM test
 1: am335x-evm:  Boot PASS: http://slexy.org/raw/s2xRMuVHvj
 2:  am335x-sk:  Boot PASS: http://slexy.org/raw/s2qEHyI9Rs
 3: am3517-evm:  Boot PASS: http://slexy.org/raw/s2Vptpboop
 4:  am37x-evm:  Boot PASS: http://slexy.org/raw/s21TKVsyet
 5: am43xx-epos:  Boot PASS: http://slexy.org/raw/s20KGye4N9
 6: am43xx-gpevm:  Boot PASS: http://slexy.org/raw/s201uuCOp2
 7: BeagleBoard-XM:  Boot PASS: http://slexy.org/raw/s21ChQP74I
 8: beagleboard-vanilla:  Boot PASS: http://slexy.org/raw/s20oagBAsl
 9: beaglebone-black:  Boot PASS: http://slexy.org/raw/s2VT200vL0
10: beaglebone:  Boot PASS: http://slexy.org/raw/s20raoHSya
11: craneboard:  Boot PASS: http://slexy.org/raw/s2vq6MYXNZ
12: dra72x-evm:  Boot FAIL: http://slexy.org/raw/s2EPseu0Jj
13: dra7xx-evm:  Boot PASS: http://slexy.org/raw/s21JJGLkTU
14: OMAP3430-Labrador(LDP):  Boot PASS: http://slexy.org/raw/s20Drlvdlp
15:       n900:  Boot PASS: http://slexy.org/raw/s21aDnJ1Bi
16:  omap5-evm:  Boot PASS: http://slexy.org/raw/s20ClvPKeK
17: pandaboard-es:  Boot PASS: http://slexy.org/raw/s2L0dt0syP
18: pandaboard-vanilla:  Boot PASS: http://slexy.org/raw/s2OlA9hfzy
19:    sdp2430:  Boot PASS: http://slexy.org/raw/s20Kgf04TW
20:    sdp3430:  Boot PASS: http://slexy.org/raw/s21p71QaVO
TOTAL = 20 boards, Booted Boards = 19, No Boot boards = 1



-- 
Regards,
Nishanth Menon

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-19 20:12       ` Nishanth Menon
  0 siblings, 0 replies; 90+ messages in thread
From: Nishanth Menon @ 2014-09-19 20:12 UTC (permalink / raw)
  To: linux-arm-kernel

On 09/18/2014 02:16 PM, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [140918 10:17]:
>> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
>>> Hi,
>>>
>>> This set contains PRCM related cleanups meant for 3.18 merge window.
>>> These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
>>> (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
>>> set is used as basis to avoid merge issues.
>>>
>>> Purpose of this work is to eventually convert the PRCM code into a
>>> separate driver, but this is done in incremental parts as the amount
>>> of changes is substantial. Expected conclusion of this work is 3.19
>>> if everything goes fine.
>>>
>>> This part of the work mostly moves some of the SoC specific PRCM driver
>>> calls under generic version of the same, and adds SoC-ops to support
>>> these on the driver level.
>>>
>>> Working branch posted here:
>>>
>>> tree: https://github.com/t-kristo/linux-pm.git
>>> branch: for-v3.18/prcm-cleanup
>>
>> Paul, any comments on this series?
> 
> Just gave this branch a quick try, it seems to work with off-idle
> for me when merged with current linux-omap master branch. The following
> merge resolution is needed because of the recent pre es3.1 fix though.
> 
> I've pushed out this merged with all the other pending patches into
> omap-for-v3.18/tmp-merge-2014-09-18.
> 
> Nishant, care to give it a try and check your recent PM related
> changes work with it?
> 
Sure. Sorry about the delay..  needed to find some workarounds for
working with my board farm..


Tested-by: Nishanth Menon <nm@ti.com>

Based on:

omap-for-v3.18/tmp-merge-2014-09-18
0164b2d Merge branch 'omap-for-v3.18/prcm' into omap-for-v3.18/tmp-merge

Test #1: basic testing
Added
69c6133 HACK: Makefile: Build a uImage with dtb already appended
(for legacy boards)

commit 0164b2dbe83e885a53b0c9a99a508bdbfdf7ee6d BASIC boot
 1: am335x-evm:  Boot PASS: http://slexy.org/raw/s2zy9OUOMM
 2:  am335x-sk:  Boot PASS: http://slexy.org/raw/s2t0JaiHYf
 3: am3517-evm:  Boot PASS: http://slexy.org/raw/s2SRkMMQwp
 4:  am37x-evm:  Boot PASS: http://slexy.org/raw/s20T0sq5dp
 5: am43xx-epos:  Boot PASS: http://slexy.org/raw/s2AVYqDVBf
 6: am43xx-gpevm:  Boot PASS: http://slexy.org/raw/s213N14B9r
 7: BeagleBoard-XM:  Boot PASS: http://slexy.org/raw/s21yyMkFRS
 8: beagleboard-vanilla:  Boot PASS: http://slexy.org/raw/s2SYJOHRwI
 9: beaglebone-black:  Boot PASS: http://slexy.org/raw/s214QDgb06
10: beaglebone:  Boot PASS: http://slexy.org/raw/s21SOLcjMD
11: craneboard:  Boot PASS: http://slexy.org/raw/s218cXoYSl
12: dra72x-evm:  Boot FAIL: http://slexy.org/raw/s21BAnAW8N
13: dra7xx-evm:  Boot PASS: http://slexy.org/raw/s21kf4G5Sh
14: OMAP3430-Labrador(LDP):  Boot PASS: http://slexy.org/raw/s21QIGwFOM
15:       n900:  Boot PASS: http://slexy.org/raw/s21T5xECo2
16:  omap5-evm:  Boot PASS: http://slexy.org/raw/s20qxa3iPw
17: pandaboard-es:  Boot PASS: http://slexy.org/raw/s2Fh0hMW7n
18: pandaboard-vanilla:  Boot PASS: http://slexy.org/raw/s2vqUc528i
19:    sdp2430:  Boot PASS: http://slexy.org/raw/s21gAsEAeD
20:    sdp3430:  Boot PASS: http://slexy.org/raw/s2dvThSn5D
TOTAL = 20 boards, Booted Boards = 19, No Boot boards = 1


Test #2: PM test (cpufreq/cpuidle/suspend-resume where applicable)

Testing script: (http://slexy.org/view/s21SRQehwu)

Added the following patches:
59bf40d ARM: OMAP5/DRA7: PM: cpuidle MPU CSWR support
(discussion still going on https://patchwork.kernel.org/patch/4764661/
- but good to know if it still continues to work with PRM changes).

69c6133 HACK: Makefile: Build a uImage with dtb already appended
(for legacy boards)

b854ca8 gpio: omap: Fix interrupt names
(https://patchwork.kernel.org/patch/4854511/)

c50fc8b pinctrl: single: AM437x: Add pinctrl compatibility
37d17bf pinctrl: single: Add DRA7 pinctrl compatibility
74121c6 pinctrl: bindings: Add OMAP pinctrl binding
(all of the above are in linux-next)

efb2486 clk: prevent erronous parsing of children during rate change
b92ac70 clk: ti: dra7-atl: Provide error check for incoming parameters
in set_rate
96e8b6b clk: ti: divider: Provide error check for incoming parameters
in set_rate
(all above picked up by mike)

92e5e74 ARM: OMAP2+ / pm_debug: add support for wakeup_timer configuration
(wakeup timer for testing purposes - remote boards)

with these:
commit 0164b2dbe83e885a53b0c9a99a508bdbfdf7ee6d + Additional patches
basic PM test
 1: am335x-evm:  Boot PASS: http://slexy.org/raw/s2xRMuVHvj
 2:  am335x-sk:  Boot PASS: http://slexy.org/raw/s2qEHyI9Rs
 3: am3517-evm:  Boot PASS: http://slexy.org/raw/s2Vptpboop
 4:  am37x-evm:  Boot PASS: http://slexy.org/raw/s21TKVsyet
 5: am43xx-epos:  Boot PASS: http://slexy.org/raw/s20KGye4N9
 6: am43xx-gpevm:  Boot PASS: http://slexy.org/raw/s201uuCOp2
 7: BeagleBoard-XM:  Boot PASS: http://slexy.org/raw/s21ChQP74I
 8: beagleboard-vanilla:  Boot PASS: http://slexy.org/raw/s20oagBAsl
 9: beaglebone-black:  Boot PASS: http://slexy.org/raw/s2VT200vL0
10: beaglebone:  Boot PASS: http://slexy.org/raw/s20raoHSya
11: craneboard:  Boot PASS: http://slexy.org/raw/s2vq6MYXNZ
12: dra72x-evm:  Boot FAIL: http://slexy.org/raw/s2EPseu0Jj
13: dra7xx-evm:  Boot PASS: http://slexy.org/raw/s21JJGLkTU
14: OMAP3430-Labrador(LDP):  Boot PASS: http://slexy.org/raw/s20Drlvdlp
15:       n900:  Boot PASS: http://slexy.org/raw/s21aDnJ1Bi
16:  omap5-evm:  Boot PASS: http://slexy.org/raw/s20ClvPKeK
17: pandaboard-es:  Boot PASS: http://slexy.org/raw/s2L0dt0syP
18: pandaboard-vanilla:  Boot PASS: http://slexy.org/raw/s2OlA9hfzy
19:    sdp2430:  Boot PASS: http://slexy.org/raw/s20Kgf04TW
20:    sdp3430:  Boot PASS: http://slexy.org/raw/s21p71QaVO
TOTAL = 20 boards, Booted Boards = 19, No Boot boards = 1



-- 
Regards,
Nishanth Menon

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-19 16:30     ` Paul Walmsley
@ 2014-09-22 13:19       ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-22 13:19 UTC (permalink / raw)
  To: Paul Walmsley, Tony Lindgren; +Cc: linux-omap, linux-arm-kernel

On 09/19/2014 07:30 PM, Paul Walmsley wrote:
> On Thu, 18 Sep 2014, Tony Lindgren wrote:
>
>> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
>>> Hi,
>>>
>>> This set contains PRCM related cleanups meant for 3.18 merge window.
>>> These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
>>> (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
>>> set is used as basis to avoid merge issues.
>>>
>>> Purpose of this work is to eventually convert the PRCM code into a
>>> separate driver, but this is done in incremental parts as the amount
>>> of changes is substantial. Expected conclusion of this work is 3.19
>>> if everything goes fine.
>>>
>>> This part of the work mostly moves some of the SoC specific PRCM driver
>>> calls under generic version of the same, and adds SoC-ops to support
>>> these on the driver level.
>>>
>>> Working branch posted here:
>>>
>>> tree: https://github.com/t-kristo/linux-pm.git
>>> branch: for-v3.18/prcm-cleanup

Hi,

I pushed v2 of this set as 'for-v3.18/prcm-cleanup-v2' to my tree. 
Basically to address the below comments, and additionally I changed a 
few public cm_* api names to omap_cm_* + add the tested-by/acked-by 
statuses. Tony/Paul, do you want me to repost the series, or are you ok 
with a local diff / pull only?

>>
>> Paul, any comments on this series?
>
> Patches 1, 3, 5, 8, 10, 13, 17, 18, 20, 21, 22, 23, 24 are:
>
> Acked-by: Paul Walmsley <paul@pwsan.com>

Thanks, added acks to v2 patches.

>
> Here are some specific comments on a few other patches:
>
> Regarding patch 7:  The kerneldoc-nano function comments are good, but
> should begin with "/**" rather than "/*".  When that's fixed, it can be
> considered acked by me.

Yea, this was a typo, thanks for noticing.

>
> Regarding patches 14, 15, 16: Non-static prm_* functions really should
> start with omap*_ to avoid potential naming conflicts with other drivers
> when these are moved to drivers/.  (Obviously the same would apply for any
> CM function names in other, future patches.)  When that's fixed, it can be
> considered acked by me.

Ok, changed. Additionally I changed some cm_* prototypes in patches #6, 
#7 and #9 to be of form omap_cm_*.

> Regarding patch 25: What are "I/O wakeup gaes" -- gates?  When that's
> fixed, an acked-by for me can be added.

Yes, gates. Fixed.

> Regarding patch 26: It seems wise to ensure that omap_prm_reset_system()
> ends with a 'while(1) { cpu_relax(); }' or something similar, to ensure
> that execution flow does not proceed past that point. At that point, it
> should be possible to remove the "while(1) {}"s from omap44xx_restart(),
> omap2xxx_restart(), etc.  When that's fixed, an acked-by for me can be
> added.

Ok, changed this also. Added the while(1) cpu_relax(); part to the 
public API, and removed the loops from everywhere else.

>
> ...
>
> And some general comments: none of which should probably block this
> series, but seemed worth noting:
>
> Regarding patches 6 and 19: Tero, could you please share the DT node data
> that you're planning to submit for the PRM, CM1, and CM2 on the OMAP4*
> platforms? According to the TRM, these are separate IP blocks, with
> separate OCP header register areas.  So these should probably have
> separate DT nodes, regs, etc. if the DTS files are to match the hardware.
> The planned DTS data may impact the way these patches are written, at
> least, if more patches are to be avoided later.

We already have the nodes for these. Check out omap4.dtsi for example, 
we have nodes for prm/cm1/cm2/scrm there already. These were already 
defined when the clock DT data was introduced, and I don't foresee any 
changes to the nodes as of now. The nodes only contain register space 
info as of now, and Nishanth is adding the interrupt property for PRM 
interrupt purposes, but rest of the features are probably going to be 
hardcoded within the PRCM drivers themselves.

If you are interested, feel free to look at for-3.19/prcm-cleanup branch 
in my git tree, this contains the remaining patches I have for PRCM 
cleanup after this set available as of now.

-Tero

>
> As far as patches 2, 4, 9, 11, and 12 go, I'll let those go without
> comment.
>
>
> - Paul
>


^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-22 13:19       ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-22 13:19 UTC (permalink / raw)
  To: linux-arm-kernel

On 09/19/2014 07:30 PM, Paul Walmsley wrote:
> On Thu, 18 Sep 2014, Tony Lindgren wrote:
>
>> * Tero Kristo <t-kristo@ti.com> [140901 11:09]:
>>> Hi,
>>>
>>> This set contains PRCM related cleanups meant for 3.18 merge window.
>>> These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
>>> (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
>>> set is used as basis to avoid merge issues.
>>>
>>> Purpose of this work is to eventually convert the PRCM code into a
>>> separate driver, but this is done in incremental parts as the amount
>>> of changes is substantial. Expected conclusion of this work is 3.19
>>> if everything goes fine.
>>>
>>> This part of the work mostly moves some of the SoC specific PRCM driver
>>> calls under generic version of the same, and adds SoC-ops to support
>>> these on the driver level.
>>>
>>> Working branch posted here:
>>>
>>> tree: https://github.com/t-kristo/linux-pm.git
>>> branch: for-v3.18/prcm-cleanup

Hi,

I pushed v2 of this set as 'for-v3.18/prcm-cleanup-v2' to my tree. 
Basically to address the below comments, and additionally I changed a 
few public cm_* api names to omap_cm_* + add the tested-by/acked-by 
statuses. Tony/Paul, do you want me to repost the series, or are you ok 
with a local diff / pull only?

>>
>> Paul, any comments on this series?
>
> Patches 1, 3, 5, 8, 10, 13, 17, 18, 20, 21, 22, 23, 24 are:
>
> Acked-by: Paul Walmsley <paul@pwsan.com>

Thanks, added acks to v2 patches.

>
> Here are some specific comments on a few other patches:
>
> Regarding patch 7:  The kerneldoc-nano function comments are good, but
> should begin with "/**" rather than "/*".  When that's fixed, it can be
> considered acked by me.

Yea, this was a typo, thanks for noticing.

>
> Regarding patches 14, 15, 16: Non-static prm_* functions really should
> start with omap*_ to avoid potential naming conflicts with other drivers
> when these are moved to drivers/.  (Obviously the same would apply for any
> CM function names in other, future patches.)  When that's fixed, it can be
> considered acked by me.

Ok, changed. Additionally I changed some cm_* prototypes in patches #6, 
#7 and #9 to be of form omap_cm_*.

> Regarding patch 25: What are "I/O wakeup gaes" -- gates?  When that's
> fixed, an acked-by for me can be added.

Yes, gates. Fixed.

> Regarding patch 26: It seems wise to ensure that omap_prm_reset_system()
> ends with a 'while(1) { cpu_relax(); }' or something similar, to ensure
> that execution flow does not proceed past that point. At that point, it
> should be possible to remove the "while(1) {}"s from omap44xx_restart(),
> omap2xxx_restart(), etc.  When that's fixed, an acked-by for me can be
> added.

Ok, changed this also. Added the while(1) cpu_relax(); part to the 
public API, and removed the loops from everywhere else.

>
> ...
>
> And some general comments: none of which should probably block this
> series, but seemed worth noting:
>
> Regarding patches 6 and 19: Tero, could you please share the DT node data
> that you're planning to submit for the PRM, CM1, and CM2 on the OMAP4*
> platforms? According to the TRM, these are separate IP blocks, with
> separate OCP header register areas.  So these should probably have
> separate DT nodes, regs, etc. if the DTS files are to match the hardware.
> The planned DTS data may impact the way these patches are written, at
> least, if more patches are to be avoided later.

We already have the nodes for these. Check out omap4.dtsi for example, 
we have nodes for prm/cm1/cm2/scrm there already. These were already 
defined when the clock DT data was introduced, and I don't foresee any 
changes to the nodes as of now. The nodes only contain register space 
info as of now, and Nishanth is adding the interrupt property for PRM 
interrupt purposes, but rest of the features are probably going to be 
hardcoded within the PRCM drivers themselves.

If you are interested, feel free to look at for-3.19/prcm-cleanup branch 
in my git tree, this contains the remaining patches I have for PRCM 
cleanup after this set available as of now.

-Tero

>
> As far as patches 2, 4, 9, 11, and 12 go, I'll let those go without
> comment.
>
>
> - Paul
>

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-22 13:19       ` Tero Kristo
@ 2014-09-23 16:08         ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-23 16:08 UTC (permalink / raw)
  To: Tero Kristo; +Cc: Paul Walmsley, linux-omap, linux-arm-kernel

* Tero Kristo <t-kristo@ti.com> [140922 06:18]:
> On 09/19/2014 07:30 PM, Paul Walmsley wrote:
> >On Thu, 18 Sep 2014, Tony Lindgren wrote:
> >
> >>* Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> >>>Hi,
> >>>
> >>>This set contains PRCM related cleanups meant for 3.18 merge window.
> >>>These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> >>>(http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> >>>set is used as basis to avoid merge issues.
> >>>
> >>>Purpose of this work is to eventually convert the PRCM code into a
> >>>separate driver, but this is done in incremental parts as the amount
> >>>of changes is substantial. Expected conclusion of this work is 3.19
> >>>if everything goes fine.
> >>>
> >>>This part of the work mostly moves some of the SoC specific PRCM driver
> >>>calls under generic version of the same, and adds SoC-ops to support
> >>>these on the driver level.
> >>>
> >>>Working branch posted here:
> >>>
> >>>tree: https://github.com/t-kristo/linux-pm.git
> >>>branch: for-v3.18/prcm-cleanup
> 
> Hi,
> 
> I pushed v2 of this set as 'for-v3.18/prcm-cleanup-v2' to my tree. Basically
> to address the below comments, and additionally I changed a few public cm_*
> api names to omap_cm_* + add the tested-by/acked-by statuses. Tony/Paul, do
> you want me to repost the series, or are you ok with a local diff / pull
> only?

If the changes were minor, at least I'm fine without reposting.
But let's wait to hear from Paul in case he has further comments.

Regards,

Tony
 
> >>
> >>Paul, any comments on this series?
> >
> >Patches 1, 3, 5, 8, 10, 13, 17, 18, 20, 21, 22, 23, 24 are:
> >
> >Acked-by: Paul Walmsley <paul@pwsan.com>
> 
> Thanks, added acks to v2 patches.
> 
> >
> >Here are some specific comments on a few other patches:
> >
> >Regarding patch 7:  The kerneldoc-nano function comments are good, but
> >should begin with "/**" rather than "/*".  When that's fixed, it can be
> >considered acked by me.
> 
> Yea, this was a typo, thanks for noticing.
> 
> >
> >Regarding patches 14, 15, 16: Non-static prm_* functions really should
> >start with omap*_ to avoid potential naming conflicts with other drivers
> >when these are moved to drivers/.  (Obviously the same would apply for any
> >CM function names in other, future patches.)  When that's fixed, it can be
> >considered acked by me.
> 
> Ok, changed. Additionally I changed some cm_* prototypes in patches #6, #7
> and #9 to be of form omap_cm_*.
> 
> >Regarding patch 25: What are "I/O wakeup gaes" -- gates?  When that's
> >fixed, an acked-by for me can be added.
> 
> Yes, gates. Fixed.
> 
> >Regarding patch 26: It seems wise to ensure that omap_prm_reset_system()
> >ends with a 'while(1) { cpu_relax(); }' or something similar, to ensure
> >that execution flow does not proceed past that point. At that point, it
> >should be possible to remove the "while(1) {}"s from omap44xx_restart(),
> >omap2xxx_restart(), etc.  When that's fixed, an acked-by for me can be
> >added.
> 
> Ok, changed this also. Added the while(1) cpu_relax(); part to the public
> API, and removed the loops from everywhere else.
> 
> >
> >...
> >
> >And some general comments: none of which should probably block this
> >series, but seemed worth noting:
> >
> >Regarding patches 6 and 19: Tero, could you please share the DT node data
> >that you're planning to submit for the PRM, CM1, and CM2 on the OMAP4*
> >platforms? According to the TRM, these are separate IP blocks, with
> >separate OCP header register areas.  So these should probably have
> >separate DT nodes, regs, etc. if the DTS files are to match the hardware.
> >The planned DTS data may impact the way these patches are written, at
> >least, if more patches are to be avoided later.
> 
> We already have the nodes for these. Check out omap4.dtsi for example, we
> have nodes for prm/cm1/cm2/scrm there already. These were already defined
> when the clock DT data was introduced, and I don't foresee any changes to
> the nodes as of now. The nodes only contain register space info as of now,
> and Nishanth is adding the interrupt property for PRM interrupt purposes,
> but rest of the features are probably going to be hardcoded within the PRCM
> drivers themselves.
> 
> If you are interested, feel free to look at for-3.19/prcm-cleanup branch in
> my git tree, this contains the remaining patches I have for PRCM cleanup
> after this set available as of now.
> 
> -Tero
> 
> >
> >As far as patches 2, 4, 9, 11, and 12 go, I'll let those go without
> >comment.
> >
> >
> >- Paul
> >
> 

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-23 16:08         ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-23 16:08 UTC (permalink / raw)
  To: linux-arm-kernel

* Tero Kristo <t-kristo@ti.com> [140922 06:18]:
> On 09/19/2014 07:30 PM, Paul Walmsley wrote:
> >On Thu, 18 Sep 2014, Tony Lindgren wrote:
> >
> >>* Tero Kristo <t-kristo@ti.com> [140901 11:09]:
> >>>Hi,
> >>>
> >>>This set contains PRCM related cleanups meant for 3.18 merge window.
> >>>These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon
> >>>(http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's
> >>>set is used as basis to avoid merge issues.
> >>>
> >>>Purpose of this work is to eventually convert the PRCM code into a
> >>>separate driver, but this is done in incremental parts as the amount
> >>>of changes is substantial. Expected conclusion of this work is 3.19
> >>>if everything goes fine.
> >>>
> >>>This part of the work mostly moves some of the SoC specific PRCM driver
> >>>calls under generic version of the same, and adds SoC-ops to support
> >>>these on the driver level.
> >>>
> >>>Working branch posted here:
> >>>
> >>>tree: https://github.com/t-kristo/linux-pm.git
> >>>branch: for-v3.18/prcm-cleanup
> 
> Hi,
> 
> I pushed v2 of this set as 'for-v3.18/prcm-cleanup-v2' to my tree. Basically
> to address the below comments, and additionally I changed a few public cm_*
> api names to omap_cm_* + add the tested-by/acked-by statuses. Tony/Paul, do
> you want me to repost the series, or are you ok with a local diff / pull
> only?

If the changes were minor, at least I'm fine without reposting.
But let's wait to hear from Paul in case he has further comments.

Regards,

Tony
 
> >>
> >>Paul, any comments on this series?
> >
> >Patches 1, 3, 5, 8, 10, 13, 17, 18, 20, 21, 22, 23, 24 are:
> >
> >Acked-by: Paul Walmsley <paul@pwsan.com>
> 
> Thanks, added acks to v2 patches.
> 
> >
> >Here are some specific comments on a few other patches:
> >
> >Regarding patch 7:  The kerneldoc-nano function comments are good, but
> >should begin with "/**" rather than "/*".  When that's fixed, it can be
> >considered acked by me.
> 
> Yea, this was a typo, thanks for noticing.
> 
> >
> >Regarding patches 14, 15, 16: Non-static prm_* functions really should
> >start with omap*_ to avoid potential naming conflicts with other drivers
> >when these are moved to drivers/.  (Obviously the same would apply for any
> >CM function names in other, future patches.)  When that's fixed, it can be
> >considered acked by me.
> 
> Ok, changed. Additionally I changed some cm_* prototypes in patches #6, #7
> and #9 to be of form omap_cm_*.
> 
> >Regarding patch 25: What are "I/O wakeup gaes" -- gates?  When that's
> >fixed, an acked-by for me can be added.
> 
> Yes, gates. Fixed.
> 
> >Regarding patch 26: It seems wise to ensure that omap_prm_reset_system()
> >ends with a 'while(1) { cpu_relax(); }' or something similar, to ensure
> >that execution flow does not proceed past that point. At that point, it
> >should be possible to remove the "while(1) {}"s from omap44xx_restart(),
> >omap2xxx_restart(), etc.  When that's fixed, an acked-by for me can be
> >added.
> 
> Ok, changed this also. Added the while(1) cpu_relax(); part to the public
> API, and removed the loops from everywhere else.
> 
> >
> >...
> >
> >And some general comments: none of which should probably block this
> >series, but seemed worth noting:
> >
> >Regarding patches 6 and 19: Tero, could you please share the DT node data
> >that you're planning to submit for the PRM, CM1, and CM2 on the OMAP4*
> >platforms? According to the TRM, these are separate IP blocks, with
> >separate OCP header register areas.  So these should probably have
> >separate DT nodes, regs, etc. if the DTS files are to match the hardware.
> >The planned DTS data may impact the way these patches are written, at
> >least, if more patches are to be avoided later.
> 
> We already have the nodes for these. Check out omap4.dtsi for example, we
> have nodes for prm/cm1/cm2/scrm there already. These were already defined
> when the clock DT data was introduced, and I don't foresee any changes to
> the nodes as of now. The nodes only contain register space info as of now,
> and Nishanth is adding the interrupt property for PRM interrupt purposes,
> but rest of the features are probably going to be hardcoded within the PRCM
> drivers themselves.
> 
> If you are interested, feel free to look at for-3.19/prcm-cleanup branch in
> my git tree, this contains the remaining patches I have for PRCM cleanup
> after this set available as of now.
> 
> -Tero
> 
> >
> >As far as patches 2, 4, 9, 11, and 12 go, I'll let those go without
> >comment.
> >
> >
> >- Paul
> >
> 

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-19 17:27         ` Paul Walmsley
@ 2014-09-23 16:14           ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-23 16:14 UTC (permalink / raw)
  To: Paul Walmsley; +Cc: Tero Kristo, linux-omap, linux-arm-kernel, Nishanth Menon

* Paul Walmsley <paul@pwsan.com> [140919 10:28]:
> On Fri, 19 Sep 2014, Paul Walmsley wrote:
> 
> > However, I saw the following crash at boot on 37xxevm during one of
> > the boot test.  Ran thirty more boot tests afterwards on that board
> > and it did not recur.  It seems unlikely that the problem is related
> > to this series, but looks like we may have some intermittent boot
> > failure or race on 37xx :-(
> 
> ...
> 
> > [    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > [    4.900299] Internal error: : 1028 [#1] SMP ARM
> > [    4.905090] Modules linked in:
> > [    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > [    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > [    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > [    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > [    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > [    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > [    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > [    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > [    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > [    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > [    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015      
> > [    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)   
> > [    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > [    4.989868] bec0:                                                       237bc339 00000001
> > [    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > [    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > [    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > [    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > [    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > [    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > [    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > [    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > [    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > [    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > [    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > [    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > [    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > [    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > [    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > [    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > [    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > [    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000) 
> > [    5.157470] ---[ end trace f92de024d996d904 ]---
> > [    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > [    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> 
> Actually it just occurred to me that if something broke 
> *wait_target_ready(), we'd expect to see intermittent failures like this, 
> and this series touches *wait_target_ready().  So it might be worth taking 
> a look at that with a magnifying glass to make sure that it's working.

Yes errors like this should not happen. Let's make sure things are
working reliably before merging this.

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-23 16:14           ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-09-23 16:14 UTC (permalink / raw)
  To: linux-arm-kernel

* Paul Walmsley <paul@pwsan.com> [140919 10:28]:
> On Fri, 19 Sep 2014, Paul Walmsley wrote:
> 
> > However, I saw the following crash at boot on 37xxevm during one of
> > the boot test.  Ran thirty more boot tests afterwards on that board
> > and it did not recur.  It seems unlikely that the problem is related
> > to this series, but looks like we may have some intermittent boot
> > failure or race on 37xx :-(
> 
> ...
> 
> > [    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > [    4.900299] Internal error: : 1028 [#1] SMP ARM
> > [    4.905090] Modules linked in:
> > [    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > [    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > [    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > [    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > [    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > [    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > [    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > [    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > [    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > [    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > [    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015      
> > [    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)   
> > [    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > [    4.989868] bec0:                                                       237bc339 00000001
> > [    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > [    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > [    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > [    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > [    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > [    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > [    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > [    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > [    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > [    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > [    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > [    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > [    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > [    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > [    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > [    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > [    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > [    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000) 
> > [    5.157470] ---[ end trace f92de024d996d904 ]---
> > [    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > [    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> 
> Actually it just occurred to me that if something broke 
> *wait_target_ready(), we'd expect to see intermittent failures like this, 
> and this series touches *wait_target_ready().  So it might be worth taking 
> a look at that with a magnifying glass to make sure that it's working.

Yes errors like this should not happen. Let's make sure things are
working reliably before merging this.

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-19 17:27         ` Paul Walmsley
@ 2014-09-24  9:04           ` Tero Kristo
  -1 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-24  9:04 UTC (permalink / raw)
  To: Paul Walmsley, Tony Lindgren; +Cc: linux-omap, linux-arm-kernel, Nishanth Menon

On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> On Fri, 19 Sep 2014, Paul Walmsley wrote:
>
>> However, I saw the following crash at boot on 37xxevm during one of
>> the boot test.  Ran thirty more boot tests afterwards on that board
>> and it did not recur.  It seems unlikely that the problem is related
>> to this series, but looks like we may have some intermittent boot
>> failure or race on 37xx :-(
>
> ...
>
>> [    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
>> [    4.900299] Internal error: : 1028 [#1] SMP ARM
>> [    4.905090] Modules linked in:
>> [    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
>> [    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
>> [    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
>> [    4.928009] LR is at clockevents_program_event+0xc0/0x148
>> [    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
>> [    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
>> [    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
>> [    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
>> [    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
>> [    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
>> [    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
>> [    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
>> [    4.985290] Stack: (0xc082bed8 to 0xc082c000)
>> [    4.989868] bec0:                                                       237bc339 00000001
>> [    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
>> [    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
>> [    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
>> [    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
>> [    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
>> [    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
>> [    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
>> [    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
>> [    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
>> [    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
>> [    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
>> [    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
>> [    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
>> [    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
>> [    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
>> [    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
>> [    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
>> [    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
>> [    5.157470] ---[ end trace f92de024d996d904 ]---
>> [    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
>> [    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
>
> Actually it just occurred to me that if something broke
> *wait_target_ready(), we'd expect to see intermittent failures like this,
> and this series touches *wait_target_ready().  So it might be worth taking
> a look at that with a magnifying glass to make sure that it's working.

I think this is probably something else, and most likely more hideous. 
The clock source timers are only enabled once during a boot, and they 
are never idled after that. This error happens almost 5 seconds after 
the initial module enable...?

-Tero


^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-09-24  9:04           ` Tero Kristo
  0 siblings, 0 replies; 90+ messages in thread
From: Tero Kristo @ 2014-09-24  9:04 UTC (permalink / raw)
  To: linux-arm-kernel

On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> On Fri, 19 Sep 2014, Paul Walmsley wrote:
>
>> However, I saw the following crash at boot on 37xxevm during one of
>> the boot test.  Ran thirty more boot tests afterwards on that board
>> and it did not recur.  It seems unlikely that the problem is related
>> to this series, but looks like we may have some intermittent boot
>> failure or race on 37xx :-(
>
> ...
>
>> [    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
>> [    4.900299] Internal error: : 1028 [#1] SMP ARM
>> [    4.905090] Modules linked in:
>> [    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
>> [    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
>> [    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
>> [    4.928009] LR is at clockevents_program_event+0xc0/0x148
>> [    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
>> [    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
>> [    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
>> [    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
>> [    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
>> [    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
>> [    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
>> [    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
>> [    4.985290] Stack: (0xc082bed8 to 0xc082c000)
>> [    4.989868] bec0:                                                       237bc339 00000001
>> [    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
>> [    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
>> [    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
>> [    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
>> [    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
>> [    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
>> [    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
>> [    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
>> [    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
>> [    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
>> [    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
>> [    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
>> [    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
>> [    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
>> [    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
>> [    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
>> [    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
>> [    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
>> [    5.157470] ---[ end trace f92de024d996d904 ]---
>> [    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
>> [    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
>
> Actually it just occurred to me that if something broke
> *wait_target_ready(), we'd expect to see intermittent failures like this,
> and this series touches *wait_target_ready().  So it might be worth taking
> a look at that with a magnifying glass to make sure that it's working.

I think this is probably something else, and most likely more hideous. 
The clock source timers are only enabled once during a boot, and they 
are never idled after that. This error happens almost 5 seconds after 
the initial module enable...?

-Tero

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-09-24  9:04           ` Tero Kristo
@ 2014-10-02 16:32             ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-02 16:32 UTC (permalink / raw)
  To: Tero Kristo; +Cc: Paul Walmsley, linux-omap, linux-arm-kernel, Nishanth Menon

* Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> >
> >>However, I saw the following crash at boot on 37xxevm during one of
> >>the boot test.  Ran thirty more boot tests afterwards on that board
> >>and it did not recur.  It seems unlikely that the problem is related
> >>to this series, but looks like we may have some intermittent boot
> >>failure or race on 37xx :-(
> >
> >...
> >
> >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> >>[    4.905090] Modules linked in:
> >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> >>[    4.989868] bec0:                                                       237bc339 00000001
> >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> >
> >Actually it just occurred to me that if something broke
> >*wait_target_ready(), we'd expect to see intermittent failures like this,
> >and this series touches *wait_target_ready().  So it might be worth taking
> >a look at that with a magnifying glass to make sure that it's working.
> 
> I think this is probably something else, and most likely more hideous. The
> clock source timers are only enabled once during a boot, and they are never
> idled after that. This error happens almost 5 seconds after the initial
> module enable...?

I have not seen this and I've had this branch merged in for testing
here for about a week now. I've also merged it into linux-omap master
branch for merging now, let's keep it there and plan on merging it early
for v3.19 merge window unless some issues are found.

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-02 16:32             ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-02 16:32 UTC (permalink / raw)
  To: linux-arm-kernel

* Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> >
> >>However, I saw the following crash at boot on 37xxevm during one of
> >>the boot test.  Ran thirty more boot tests afterwards on that board
> >>and it did not recur.  It seems unlikely that the problem is related
> >>to this series, but looks like we may have some intermittent boot
> >>failure or race on 37xx :-(
> >
> >...
> >
> >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> >>[    4.905090] Modules linked in:
> >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> >>[    4.989868] bec0:                                                       237bc339 00000001
> >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> >
> >Actually it just occurred to me that if something broke
> >*wait_target_ready(), we'd expect to see intermittent failures like this,
> >and this series touches *wait_target_ready().  So it might be worth taking
> >a look at that with a magnifying glass to make sure that it's working.
> 
> I think this is probably something else, and most likely more hideous. The
> clock source timers are only enabled once during a boot, and they are never
> idled after that. This error happens almost 5 seconds after the initial
> module enable...?

I have not seen this and I've had this branch merged in for testing
here for about a week now. I've also merged it into linux-omap master
branch for merging now, let's keep it there and plan on merging it early
for v3.19 merge window unless some issues are found.

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-10-02 16:32             ` Tony Lindgren
@ 2014-10-02 19:52               ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-02 19:52 UTC (permalink / raw)
  To: Tero Kristo; +Cc: Nishanth Menon, Paul Walmsley, linux-omap, linux-arm-kernel

* Tony Lindgren <tony@atomide.com> [141002 09:36]:
> * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > >
> > >>However, I saw the following crash at boot on 37xxevm during one of
> > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > >>and it did not recur.  It seems unlikely that the problem is related
> > >>to this series, but looks like we may have some intermittent boot
> > >>failure or race on 37xx :-(
> > >
> > >...
> > >
> > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > >>[    4.905090] Modules linked in:
> > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > >>[    4.989868] bec0:                                                       237bc339 00000001
> > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > >
> > >Actually it just occurred to me that if something broke
> > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > >and this series touches *wait_target_ready().  So it might be worth taking
> > >a look at that with a magnifying glass to make sure that it's working.
> > 
> > I think this is probably something else, and most likely more hideous. The
> > clock source timers are only enabled once during a boot, and they are never
> > idled after that. This error happens almost 5 seconds after the initial
> > module enable...?
> 
> I have not seen this and I've had this branch merged in for testing
> here for about a week now. I've also merged it into linux-omap master
> branch for merging now, let's keep it there and plan on merging it early
> for v3.19 merge window unless some issues are found.

Hmm here seems to be a link to similar issues from 2011:

http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx

Looks like the issue can be potentially reproduced with:

# cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-02 19:52               ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-02 19:52 UTC (permalink / raw)
  To: linux-arm-kernel

* Tony Lindgren <tony@atomide.com> [141002 09:36]:
> * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > >
> > >>However, I saw the following crash at boot on 37xxevm during one of
> > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > >>and it did not recur.  It seems unlikely that the problem is related
> > >>to this series, but looks like we may have some intermittent boot
> > >>failure or race on 37xx :-(
> > >
> > >...
> > >
> > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > >>[    4.905090] Modules linked in:
> > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > >>[    4.989868] bec0:                                                       237bc339 00000001
> > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > >
> > >Actually it just occurred to me that if something broke
> > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > >and this series touches *wait_target_ready().  So it might be worth taking
> > >a look at that with a magnifying glass to make sure that it's working.
> > 
> > I think this is probably something else, and most likely more hideous. The
> > clock source timers are only enabled once during a boot, and they are never
> > idled after that. This error happens almost 5 seconds after the initial
> > module enable...?
> 
> I have not seen this and I've had this branch merged in for testing
> here for about a week now. I've also merged it into linux-omap master
> branch for merging now, let's keep it there and plan on merging it early
> for v3.19 merge window unless some issues are found.

Hmm here seems to be a link to similar issues from 2011:

http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx

Looks like the issue can be potentially reproduced with:

# cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-10-02 19:52               ` Tony Lindgren
@ 2014-10-02 20:17                 ` Felipe Balbi
  -1 siblings, 0 replies; 90+ messages in thread
From: Felipe Balbi @ 2014-10-02 20:17 UTC (permalink / raw)
  To: Tony Lindgren
  Cc: Tero Kristo, Nishanth Menon, Paul Walmsley, linux-omap, linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 5337 bytes --]

On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > >
> > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > >>and it did not recur.  It seems unlikely that the problem is related
> > > >>to this series, but looks like we may have some intermittent boot
> > > >>failure or race on 37xx :-(
> > > >
> > > >...
> > > >
> > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > >>[    4.905090] Modules linked in:
> > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > >
> > > >Actually it just occurred to me that if something broke
> > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > >a look at that with a magnifying glass to make sure that it's working.
> > > 
> > > I think this is probably something else, and most likely more hideous. The
> > > clock source timers are only enabled once during a boot, and they are never
> > > idled after that. This error happens almost 5 seconds after the initial
> > > module enable...?
> > 
> > I have not seen this and I've had this branch merged in for testing
> > here for about a week now. I've also merged it into linux-omap master
> > branch for merging now, let's keep it there and plan on merging it early
> > for v3.19 merge window unless some issues are found.
> 
> Hmm here seems to be a link to similar issues from 2011:
> 
> http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> 
> Looks like the issue can be potentially reproduced with:
> 
> # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q

running here on am335x and am437x. On that same post, on person
mentions he reproduced on beagle bone.

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-02 20:17                 ` Felipe Balbi
  0 siblings, 0 replies; 90+ messages in thread
From: Felipe Balbi @ 2014-10-02 20:17 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > >
> > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > >>and it did not recur.  It seems unlikely that the problem is related
> > > >>to this series, but looks like we may have some intermittent boot
> > > >>failure or race on 37xx :-(
> > > >
> > > >...
> > > >
> > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > >>[    4.905090] Modules linked in:
> > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > >
> > > >Actually it just occurred to me that if something broke
> > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > >a look at that with a magnifying glass to make sure that it's working.
> > > 
> > > I think this is probably something else, and most likely more hideous. The
> > > clock source timers are only enabled once during a boot, and they are never
> > > idled after that. This error happens almost 5 seconds after the initial
> > > module enable...?
> > 
> > I have not seen this and I've had this branch merged in for testing
> > here for about a week now. I've also merged it into linux-omap master
> > branch for merging now, let's keep it there and plan on merging it early
> > for v3.19 merge window unless some issues are found.
> 
> Hmm here seems to be a link to similar issues from 2011:
> 
> http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> 
> Looks like the issue can be potentially reproduced with:
> 
> # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q

running here on am335x and am437x. On that same post, on person
mentions he reproduced on beagle bone.

-- 
balbi
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^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-10-02 20:17                 ` Felipe Balbi
@ 2014-10-02 21:19                   ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-02 21:19 UTC (permalink / raw)
  To: Felipe Balbi
  Cc: Tero Kristo, Nishanth Menon, Paul Walmsley, linux-omap, linux-arm-kernel

* Felipe Balbi <balbi@ti.com> [141002 13:18]:
> On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > > >
> > > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > > >>and it did not recur.  It seems unlikely that the problem is related
> > > > >>to this series, but looks like we may have some intermittent boot
> > > > >>failure or race on 37xx :-(
> > > > >
> > > > >...
> > > > >
> > > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > > >>[    4.905090] Modules linked in:
> > > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > > >
> > > > >Actually it just occurred to me that if something broke
> > > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > > >a look at that with a magnifying glass to make sure that it's working.
> > > > 
> > > > I think this is probably something else, and most likely more hideous. The
> > > > clock source timers are only enabled once during a boot, and they are never
> > > > idled after that. This error happens almost 5 seconds after the initial
> > > > module enable...?
> > > 
> > > I have not seen this and I've had this branch merged in for testing
> > > here for about a week now. I've also merged it into linux-omap master
> > > branch for merging now, let's keep it there and plan on merging it early
> > > for v3.19 merge window unless some issues are found.
> > 
> > Hmm here seems to be a link to similar issues from 2011:
> > 
> > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > 
> > Looks like the issue can be potentially reproduced with:
> > 
> > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> 
> running here on am335x and am437x. On that same post, on person
> mentions he reproduced on beagle bone.

OK I'll run it here too on my am37xx evm. Looks like Stanley was
running both cyclictest and hackbench the same time.

And I'll also queue the following patch during the -rc cycle to
avoid apps segfaulting occasionally at random on omap3.

Regards,

Tony

8<-------------------
From: Tony Lindgren <tony@atomide.com>
Date: Thu, 2 Oct 2014 13:51:18 -0700
Subject: [PATCH] ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3

Somehow we don't have this set in omap2plus_defconfig. Without this
apps can segfault randomly on omap3. I can reproduce this easily
on am37xx-evm by doing apt-get update over NFSroot.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 02a9fbd..13189fe 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -52,6 +52,7 @@ CONFIG_SOC_AM43XX=y
 CONFIG_SOC_DRA7XX=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ERRATA_411920=y
+CONFIG_ARM_ERRATA_430973=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_CMA=y

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-02 21:19                   ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-02 21:19 UTC (permalink / raw)
  To: linux-arm-kernel

* Felipe Balbi <balbi@ti.com> [141002 13:18]:
> On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > > >
> > > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > > >>and it did not recur.  It seems unlikely that the problem is related
> > > > >>to this series, but looks like we may have some intermittent boot
> > > > >>failure or race on 37xx :-(
> > > > >
> > > > >...
> > > > >
> > > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > > >>[    4.905090] Modules linked in:
> > > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > > >
> > > > >Actually it just occurred to me that if something broke
> > > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > > >a look at that with a magnifying glass to make sure that it's working.
> > > > 
> > > > I think this is probably something else, and most likely more hideous. The
> > > > clock source timers are only enabled once during a boot, and they are never
> > > > idled after that. This error happens almost 5 seconds after the initial
> > > > module enable...?
> > > 
> > > I have not seen this and I've had this branch merged in for testing
> > > here for about a week now. I've also merged it into linux-omap master
> > > branch for merging now, let's keep it there and plan on merging it early
> > > for v3.19 merge window unless some issues are found.
> > 
> > Hmm here seems to be a link to similar issues from 2011:
> > 
> > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > 
> > Looks like the issue can be potentially reproduced with:
> > 
> > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> 
> running here on am335x and am437x. On that same post, on person
> mentions he reproduced on beagle bone.

OK I'll run it here too on my am37xx evm. Looks like Stanley was
running both cyclictest and hackbench the same time.

And I'll also queue the following patch during the -rc cycle to
avoid apps segfaulting occasionally at random on omap3.

Regards,

Tony

8<-------------------
From: Tony Lindgren <tony@atomide.com>
Date: Thu, 2 Oct 2014 13:51:18 -0700
Subject: [PATCH] ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3

Somehow we don't have this set in omap2plus_defconfig. Without this
apps can segfault randomly on omap3. I can reproduce this easily
on am37xx-evm by doing apt-get update over NFSroot.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 02a9fbd..13189fe 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -52,6 +52,7 @@ CONFIG_SOC_AM43XX=y
 CONFIG_SOC_DRA7XX=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ERRATA_411920=y
+CONFIG_ARM_ERRATA_430973=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_CMA=y

^ permalink raw reply related	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-10-02 21:19                   ` Tony Lindgren
@ 2014-10-02 21:59                     ` Felipe Balbi
  -1 siblings, 0 replies; 90+ messages in thread
From: Felipe Balbi @ 2014-10-02 21:59 UTC (permalink / raw)
  To: Tony Lindgren
  Cc: Felipe Balbi, Tero Kristo, Nishanth Menon, Paul Walmsley,
	linux-omap, linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 7977 bytes --]

Hi,

On Thu, Oct 02, 2014 at 02:19:08PM -0700, Tony Lindgren wrote:
> * Felipe Balbi <balbi@ti.com> [141002 13:18]:
> > On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > > * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > > > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > > > >
> > > > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > > > >>and it did not recur.  It seems unlikely that the problem is related
> > > > > >>to this series, but looks like we may have some intermittent boot
> > > > > >>failure or race on 37xx :-(
> > > > > >
> > > > > >...
> > > > > >
> > > > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > > > >>[    4.905090] Modules linked in:
> > > > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > >
> > > > > >Actually it just occurred to me that if something broke
> > > > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > > > >a look at that with a magnifying glass to make sure that it's working.
> > > > > 
> > > > > I think this is probably something else, and most likely more hideous. The
> > > > > clock source timers are only enabled once during a boot, and they are never
> > > > > idled after that. This error happens almost 5 seconds after the initial
> > > > > module enable...?
> > > > 
> > > > I have not seen this and I've had this branch merged in for testing
> > > > here for about a week now. I've also merged it into linux-omap master
> > > > branch for merging now, let's keep it there and plan on merging it early
> > > > for v3.19 merge window unless some issues are found.
> > > 
> > > Hmm here seems to be a link to similar issues from 2011:
> > > 
> > > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > > 
> > > Looks like the issue can be potentially reproduced with:
> > > 
> > > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> > 
> > running here on am335x and am437x. On that same post, on person
> > mentions he reproduced on beagle bone.
> 
> OK I'll run it here too on my am37xx evm. Looks like Stanley was
> running both cyclictest and hackbench the same time.

yeah I did that.

BTW, just got the following on BBB, AM437x SK is still running.

[ 3952.432262] Kernel panic - not syncing: Attempted to kill the idle task!752763
[ 3952.442403] CPU: 0 PID: 0 Comm: hackbench Not tainted 3.17.0-rc6-00456-gd8da063 #222
[ 3952.450517] [<c0017338>] (unwind_backtrace) from [<c0012fdc>] (show_stack+0x20/0x24)
[ 3952.458620] [<c0012fdc>] (show_stack) from [<c0647f0c>] (dump_stack+0x8c/0xa4)
[ 3952.466168] [<c0647f0c>] (dump_stack) from [<c0644da4>] (panic+0xa4/0x224)
[ 3952.473358] [<c0644da4>] (panic) from [<c004b510>] (do_exit+0x924/0x9d8)
[ 3952.480358] [<c004b510>] (do_exit) from [<c004c4d8>] (do_group_exit+0x50/0xc0)
[ 3952.487903] [<c004c4d8>] (do_group_exit) from [<c004c568>] (__wake_up_parent+0x0/0x30)
[ 3952.496179] [<c004c568>] (__wake_up_parent) from [<c000ed40>] (ret_fast_syscall+0x0/0x48)
[ 3952.504875] drm_kms_helper: panic occurred, switching back to text console
[ 3952.517844] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!


> And I'll also queue the following patch during the -rc cycle to
> avoid apps segfaulting occasionally at random on omap3.
>
> 8<-------------------
> From: Tony Lindgren <tony@atomide.com>
> Date: Thu, 2 Oct 2014 13:51:18 -0700
> Subject: [PATCH] ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3
> 
> Somehow we don't have this set in omap2plus_defconfig. Without this
> apps can segfault randomly on omap3. I can reproduce this easily
> on am37xx-evm by doing apt-get update over NFSroot.
> 
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> 
> diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
> index 02a9fbd..13189fe 100644
> --- a/arch/arm/configs/omap2plus_defconfig
> +++ b/arch/arm/configs/omap2plus_defconfig
> @@ -52,6 +52,7 @@ CONFIG_SOC_AM43XX=y
>  CONFIG_SOC_DRA7XX=y
>  CONFIG_ARM_THUMBEE=y
>  CONFIG_ARM_ERRATA_411920=y
> +CONFIG_ARM_ERRATA_430973=y

and maybe this will fix BBB :-) I'll add that locally. If I survive
until tomorrow, I'll add a Tested-by.

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-02 21:59                     ` Felipe Balbi
  0 siblings, 0 replies; 90+ messages in thread
From: Felipe Balbi @ 2014-10-02 21:59 UTC (permalink / raw)
  To: linux-arm-kernel

Hi,

On Thu, Oct 02, 2014 at 02:19:08PM -0700, Tony Lindgren wrote:
> * Felipe Balbi <balbi@ti.com> [141002 13:18]:
> > On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > > * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > > > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > > > >
> > > > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > > > >>and it did not recur.  It seems unlikely that the problem is related
> > > > > >>to this series, but looks like we may have some intermittent boot
> > > > > >>failure or race on 37xx :-(
> > > > > >
> > > > > >...
> > > > > >
> > > > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > > > >>[    4.905090] Modules linked in:
> > > > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > >
> > > > > >Actually it just occurred to me that if something broke
> > > > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > > > >a look at that with a magnifying glass to make sure that it's working.
> > > > > 
> > > > > I think this is probably something else, and most likely more hideous. The
> > > > > clock source timers are only enabled once during a boot, and they are never
> > > > > idled after that. This error happens almost 5 seconds after the initial
> > > > > module enable...?
> > > > 
> > > > I have not seen this and I've had this branch merged in for testing
> > > > here for about a week now. I've also merged it into linux-omap master
> > > > branch for merging now, let's keep it there and plan on merging it early
> > > > for v3.19 merge window unless some issues are found.
> > > 
> > > Hmm here seems to be a link to similar issues from 2011:
> > > 
> > > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > > 
> > > Looks like the issue can be potentially reproduced with:
> > > 
> > > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> > 
> > running here on am335x and am437x. On that same post, on person
> > mentions he reproduced on beagle bone.
> 
> OK I'll run it here too on my am37xx evm. Looks like Stanley was
> running both cyclictest and hackbench the same time.

yeah I did that.

BTW, just got the following on BBB, AM437x SK is still running.

[ 3952.432262] Kernel panic - not syncing: Attempted to kill the idle task!752763
[ 3952.442403] CPU: 0 PID: 0 Comm: hackbench Not tainted 3.17.0-rc6-00456-gd8da063 #222
[ 3952.450517] [<c0017338>] (unwind_backtrace) from [<c0012fdc>] (show_stack+0x20/0x24)
[ 3952.458620] [<c0012fdc>] (show_stack) from [<c0647f0c>] (dump_stack+0x8c/0xa4)
[ 3952.466168] [<c0647f0c>] (dump_stack) from [<c0644da4>] (panic+0xa4/0x224)
[ 3952.473358] [<c0644da4>] (panic) from [<c004b510>] (do_exit+0x924/0x9d8)
[ 3952.480358] [<c004b510>] (do_exit) from [<c004c4d8>] (do_group_exit+0x50/0xc0)
[ 3952.487903] [<c004c4d8>] (do_group_exit) from [<c004c568>] (__wake_up_parent+0x0/0x30)
[ 3952.496179] [<c004c568>] (__wake_up_parent) from [<c000ed40>] (ret_fast_syscall+0x0/0x48)
[ 3952.504875] drm_kms_helper: panic occurred, switching back to text console
[ 3952.517844] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!


> And I'll also queue the following patch during the -rc cycle to
> avoid apps segfaulting occasionally at random on omap3.
>
> 8<-------------------
> From: Tony Lindgren <tony@atomide.com>
> Date: Thu, 2 Oct 2014 13:51:18 -0700
> Subject: [PATCH] ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3
> 
> Somehow we don't have this set in omap2plus_defconfig. Without this
> apps can segfault randomly on omap3. I can reproduce this easily
> on am37xx-evm by doing apt-get update over NFSroot.
> 
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> 
> diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
> index 02a9fbd..13189fe 100644
> --- a/arch/arm/configs/omap2plus_defconfig
> +++ b/arch/arm/configs/omap2plus_defconfig
> @@ -52,6 +52,7 @@ CONFIG_SOC_AM43XX=y
>  CONFIG_SOC_DRA7XX=y
>  CONFIG_ARM_THUMBEE=y
>  CONFIG_ARM_ERRATA_411920=y
> +CONFIG_ARM_ERRATA_430973=y

and maybe this will fix BBB :-) I'll add that locally. If I survive
until tomorrow, I'll add a Tested-by.

-- 
balbi
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^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-10-02 21:59                     ` Felipe Balbi
@ 2014-10-03 14:49                       ` Felipe Balbi
  -1 siblings, 0 replies; 90+ messages in thread
From: Felipe Balbi @ 2014-10-03 14:49 UTC (permalink / raw)
  To: Felipe Balbi
  Cc: Tony Lindgren, Tero Kristo, Nishanth Menon, Paul Walmsley,
	linux-omap, linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 8456 bytes --]

On Thu, Oct 02, 2014 at 04:59:30PM -0500, Felipe Balbi wrote:
> Hi,
> 
> On Thu, Oct 02, 2014 at 02:19:08PM -0700, Tony Lindgren wrote:
> > * Felipe Balbi <balbi@ti.com> [141002 13:18]:
> > > On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > > > * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > > > > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > > > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > > > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > > > > >
> > > > > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > > > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > > > > >>and it did not recur.  It seems unlikely that the problem is related
> > > > > > >>to this series, but looks like we may have some intermittent boot
> > > > > > >>failure or race on 37xx :-(
> > > > > > >
> > > > > > >...
> > > > > > >
> > > > > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > > > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > > > > >>[    4.905090] Modules linked in:
> > > > > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > > > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > > > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > > > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > > > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > > > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > > > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > > > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > > > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > > > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > > > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > > > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > > > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > > > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > > > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > > > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > > > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > > > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > > > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > > > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > > > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > > > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > > > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > > > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > > > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > > > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > > > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > > > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > > > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > > > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > > > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > > > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > > > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > > > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > > >
> > > > > > >Actually it just occurred to me that if something broke
> > > > > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > > > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > > > > >a look at that with a magnifying glass to make sure that it's working.
> > > > > > 
> > > > > > I think this is probably something else, and most likely more hideous. The
> > > > > > clock source timers are only enabled once during a boot, and they are never
> > > > > > idled after that. This error happens almost 5 seconds after the initial
> > > > > > module enable...?
> > > > > 
> > > > > I have not seen this and I've had this branch merged in for testing
> > > > > here for about a week now. I've also merged it into linux-omap master
> > > > > branch for merging now, let's keep it there and plan on merging it early
> > > > > for v3.19 merge window unless some issues are found.
> > > > 
> > > > Hmm here seems to be a link to similar issues from 2011:
> > > > 
> > > > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > > > 
> > > > Looks like the issue can be potentially reproduced with:
> > > > 
> > > > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> > > 
> > > running here on am335x and am437x. On that same post, on person
> > > mentions he reproduced on beagle bone.
> > 
> > OK I'll run it here too on my am37xx evm. Looks like Stanley was
> > running both cyclictest and hackbench the same time.
> 
> yeah I did that.
> 
> BTW, just got the following on BBB, AM437x SK is still running.
> 
> [ 3952.432262] Kernel panic - not syncing: Attempted to kill the idle task!752763
> [ 3952.442403] CPU: 0 PID: 0 Comm: hackbench Not tainted 3.17.0-rc6-00456-gd8da063 #222
> [ 3952.450517] [<c0017338>] (unwind_backtrace) from [<c0012fdc>] (show_stack+0x20/0x24)
> [ 3952.458620] [<c0012fdc>] (show_stack) from [<c0647f0c>] (dump_stack+0x8c/0xa4)
> [ 3952.466168] [<c0647f0c>] (dump_stack) from [<c0644da4>] (panic+0xa4/0x224)
> [ 3952.473358] [<c0644da4>] (panic) from [<c004b510>] (do_exit+0x924/0x9d8)
> [ 3952.480358] [<c004b510>] (do_exit) from [<c004c4d8>] (do_group_exit+0x50/0xc0)
> [ 3952.487903] [<c004c4d8>] (do_group_exit) from [<c004c568>] (__wake_up_parent+0x0/0x30)
> [ 3952.496179] [<c004c568>] (__wake_up_parent) from [<c000ed40>] (ret_fast_syscall+0x0/0x48)
> [ 3952.504875] drm_kms_helper: panic occurred, switching back to text console
> [ 3952.517844] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> 
> 
> > And I'll also queue the following patch during the -rc cycle to
> > avoid apps segfaulting occasionally at random on omap3.
> >
> > 8<-------------------
> > From: Tony Lindgren <tony@atomide.com>
> > Date: Thu, 2 Oct 2014 13:51:18 -0700
> > Subject: [PATCH] ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3
> > 
> > Somehow we don't have this set in omap2plus_defconfig. Without this
> > apps can segfault randomly on omap3. I can reproduce this easily
> > on am37xx-evm by doing apt-get update over NFSroot.
> > 
> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > 
> > diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
> > index 02a9fbd..13189fe 100644
> > --- a/arch/arm/configs/omap2plus_defconfig
> > +++ b/arch/arm/configs/omap2plus_defconfig
> > @@ -52,6 +52,7 @@ CONFIG_SOC_AM43XX=y
> >  CONFIG_SOC_DRA7XX=y
> >  CONFIG_ARM_THUMBEE=y
> >  CONFIG_ARM_ERRATA_411920=y
> > +CONFIG_ARM_ERRATA_430973=y
> 
> and maybe this will fix BBB :-) I'll add that locally. If I survive
> until tomorrow, I'll add a Tested-by.

BBB died again with the same behavior as above, but I think it's
unrelated to this errata. Therefore:

Tested-by: Felipe Balbi <balbi@ti.com>

cheers

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-03 14:49                       ` Felipe Balbi
  0 siblings, 0 replies; 90+ messages in thread
From: Felipe Balbi @ 2014-10-03 14:49 UTC (permalink / raw)
  To: linux-arm-kernel

On Thu, Oct 02, 2014 at 04:59:30PM -0500, Felipe Balbi wrote:
> Hi,
> 
> On Thu, Oct 02, 2014 at 02:19:08PM -0700, Tony Lindgren wrote:
> > * Felipe Balbi <balbi@ti.com> [141002 13:18]:
> > > On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > > > * Tony Lindgren <tony@atomide.com> [141002 09:36]:
> > > > > * Tero Kristo <t-kristo@ti.com> [140924 02:04]:
> > > > > > On 09/19/2014 08:27 PM, Paul Walmsley wrote:
> > > > > > >On Fri, 19 Sep 2014, Paul Walmsley wrote:
> > > > > > >
> > > > > > >>However, I saw the following crash at boot on 37xxevm during one of
> > > > > > >>the boot test.  Ran thirty more boot tests afterwards on that board
> > > > > > >>and it did not recur.  It seems unlikely that the problem is related
> > > > > > >>to this series, but looks like we may have some intermittent boot
> > > > > > >>failure or race on 37xx :-(
> > > > > > >
> > > > > > >...
> > > > > > >
> > > > > > >>[    4.892211] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa318034
> > > > > > >>[    4.900299] Internal error: : 1028 [#1] SMP ARM
> > > > > > >>[    4.905090] Modules linked in:
> > > > > > >>[    4.908325] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc5-12866-g0164b2d #1
> > > > > > >>[    4.916320] task: c0835db0 ti: c082a000 task.ti: c082a000
> > > > > > >>[    4.922027] PC is at omap2_gp_timer_set_next_event+0x24/0x78
> > > > > > >>[    4.928009] LR is at clockevents_program_event+0xc0/0x148
> > > > > > >>[    4.933715] pc : [<c002622c>]    lr : [<c00a2800>]    psr: 00000193
> > > > > > >>[    4.933715] sp : c082bed8  ip : 00000000  fp : 00000000
> > > > > > >>[    4.945800] r10: 00000000  r9 : 24101100  r8 : c0839080
> > > > > > >>[    4.951324] r7 : 00000001  r6 : 237bc339  r5 : 0000009f  r4 : 3d9759e7
> > > > > > >>[    4.958190] r3 : fa318034  r2 : c08cb920  r1 : 00000003  r0 : fffffec1
> > > > > > >>[    4.965087] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
> > > > > > >>[    4.972900] Control: 10c5387d  Table: 80004019  DAC: 00000015
> > > > > > >>[    4.978942] Process swapper/0 (pid: 0, stack limit = 0xc082a248)
> > > > > > >>[    4.985290] Stack: (0xc082bed8 to 0xc082c000)
> > > > > > >>[    4.989868] bec0:                                                       237bc339 00000001
> > > > > > >>[    4.998504] bee0: 00000001 24101100 00000001 cfc7d6c8 00000001 cfc7da50 cfc7d720 c00a4780
> > > > > > >>[    5.007141] bf00: 00000000 c00962b0 cfc7d720 c0096180 00000001 00000000 00000001 c08256c8
> > > > > > >>[    5.015777] bf20: c082a000 c08256c8 00000000 c00962b0 237b4c04 00000001 00000002 a0000193
> > > > > > >>[    5.024414] bf40: 00989680 00000000 00000000 24101100 00000001 cfc7da50 00000000 c108cc78
> > > > > > >>[    5.033020] bf60: 00000000 c00962b0 00000000 00000002 00000001 00000000 c108cc78 c00a56f0
> > > > > > >>[    5.041656] bf80: 00000000 00000002 237b4c04 00000001 c08c8ce8 c082a000 00000000 c08c8ce8
> > > > > > >>[    5.050292] bfa0: c08329dc c0832978 cfc7f0f8 c0072808 c0559928 c08270f0 c08caf40 c080fdc0
> > > > > > >>[    5.058929] bfc0: 00000000 c07c3b74 ffffffff ffffffff c07c35f0 00000000 00000000 c080fdc0
> > > > > > >>[    5.067535] bfe0: c08cb154 c0832968 c080fdbc c083763c 80004059 80008074 00000000 00000000
> > > > > > >>[    5.076171] [<c002622c>] (omap2_gp_timer_set_next_event) from [<c00a2800>] (clockevents_program_event+0xc0/0x148)
> > > > > > >>[    5.087005] [<c00a2800>] (clockevents_program_event) from [<c00a4780>] (tick_program_event+0x44/0x54)
> > > > > > >>[    5.096771] [<c00a4780>] (tick_program_event) from [<c0096180>] (__hrtimer_start_range_ns+0x3c0/0x4a0)
> > > > > > >>[    5.106597] [<c0096180>] (__hrtimer_start_range_ns) from [<c00962b0>] (hrtimer_start_range_ns+0x24/0x2c)
> > > > > > >>[    5.116577] [<c00962b0>] (hrtimer_start_range_ns) from [<c00a56f0>] (tick_nohz_idle_exit+0x140/0x1ec)
> > > > > > >>[    5.126342] [<c00a56f0>] (tick_nohz_idle_exit) from [<c0072808>] (cpu_startup_entry+0xf4/0x2d0)
> > > > > > >>[    5.135528] [<c0072808>] (cpu_startup_entry) from [<c07c3b74>] (start_kernel+0x340/0x3a8)
> > > > > > >>[    5.144165] [<c07c3b74>] (start_kernel) from [<80008074>] (0x80008074)
> > > > > > >>[    5.151031] Code: 13a0c000 0a000004 ee07cfba e592301c (e5931000)
> > > > > > >>[    5.157470] ---[ end trace f92de024d996d904 ]---
> > > > > > >>[    5.162353] Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > > >>[    5.169433] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > > > > > >
> > > > > > >Actually it just occurred to me that if something broke
> > > > > > >*wait_target_ready(), we'd expect to see intermittent failures like this,
> > > > > > >and this series touches *wait_target_ready().  So it might be worth taking
> > > > > > >a look at that with a magnifying glass to make sure that it's working.
> > > > > > 
> > > > > > I think this is probably something else, and most likely more hideous. The
> > > > > > clock source timers are only enabled once during a boot, and they are never
> > > > > > idled after that. This error happens almost 5 seconds after the initial
> > > > > > module enable...?
> > > > > 
> > > > > I have not seen this and I've had this branch merged in for testing
> > > > > here for about a week now. I've also merged it into linux-omap master
> > > > > branch for merging now, let's keep it there and plan on merging it early
> > > > > for v3.19 merge window unless some issues are found.
> > > > 
> > > > Hmm here seems to be a link to similar issues from 2011:
> > > > 
> > > > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > > > 
> > > > Looks like the issue can be potentially reproduced with:
> > > > 
> > > > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> > > 
> > > running here on am335x and am437x. On that same post, on person
> > > mentions he reproduced on beagle bone.
> > 
> > OK I'll run it here too on my am37xx evm. Looks like Stanley was
> > running both cyclictest and hackbench the same time.
> 
> yeah I did that.
> 
> BTW, just got the following on BBB, AM437x SK is still running.
> 
> [ 3952.432262] Kernel panic - not syncing: Attempted to kill the idle task!752763
> [ 3952.442403] CPU: 0 PID: 0 Comm: hackbench Not tainted 3.17.0-rc6-00456-gd8da063 #222
> [ 3952.450517] [<c0017338>] (unwind_backtrace) from [<c0012fdc>] (show_stack+0x20/0x24)
> [ 3952.458620] [<c0012fdc>] (show_stack) from [<c0647f0c>] (dump_stack+0x8c/0xa4)
> [ 3952.466168] [<c0647f0c>] (dump_stack) from [<c0644da4>] (panic+0xa4/0x224)
> [ 3952.473358] [<c0644da4>] (panic) from [<c004b510>] (do_exit+0x924/0x9d8)
> [ 3952.480358] [<c004b510>] (do_exit) from [<c004c4d8>] (do_group_exit+0x50/0xc0)
> [ 3952.487903] [<c004c4d8>] (do_group_exit) from [<c004c568>] (__wake_up_parent+0x0/0x30)
> [ 3952.496179] [<c004c568>] (__wake_up_parent) from [<c000ed40>] (ret_fast_syscall+0x0/0x48)
> [ 3952.504875] drm_kms_helper: panic occurred, switching back to text console
> [ 3952.517844] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> 
> 
> > And I'll also queue the following patch during the -rc cycle to
> > avoid apps segfaulting occasionally at random on omap3.
> >
> > 8<-------------------
> > From: Tony Lindgren <tony@atomide.com>
> > Date: Thu, 2 Oct 2014 13:51:18 -0700
> > Subject: [PATCH] ARM: omap2plus_defconfig: Enable ARM erratum 430973 for omap3
> > 
> > Somehow we don't have this set in omap2plus_defconfig. Without this
> > apps can segfault randomly on omap3. I can reproduce this easily
> > on am37xx-evm by doing apt-get update over NFSroot.
> > 
> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > 
> > diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
> > index 02a9fbd..13189fe 100644
> > --- a/arch/arm/configs/omap2plus_defconfig
> > +++ b/arch/arm/configs/omap2plus_defconfig
> > @@ -52,6 +52,7 @@ CONFIG_SOC_AM43XX=y
> >  CONFIG_SOC_DRA7XX=y
> >  CONFIG_ARM_THUMBEE=y
> >  CONFIG_ARM_ERRATA_411920=y
> > +CONFIG_ARM_ERRATA_430973=y
> 
> and maybe this will fix BBB :-) I'll add that locally. If I survive
> until tomorrow, I'll add a Tested-by.

BBB died again with the same behavior as above, but I think it's
unrelated to this errata. Therefore:

Tested-by: Felipe Balbi <balbi@ti.com>

cheers

-- 
balbi
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^ permalink raw reply	[flat|nested] 90+ messages in thread

* Re: [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
  2014-10-03 14:49                       ` Felipe Balbi
@ 2014-10-03 15:46                         ` Tony Lindgren
  -1 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-03 15:46 UTC (permalink / raw)
  To: Felipe Balbi
  Cc: Nishanth Menon, Paul Walmsley, Tero Kristo, linux-omap, linux-arm-kernel

* Felipe Balbi <balbi@ti.com> [141003 07:53]:
> On Thu, Oct 02, 2014 at 04:59:30PM -0500, Felipe Balbi wrote:
> > On Thu, Oct 02, 2014 at 02:19:08PM -0700, Tony Lindgren wrote:
> > > * Felipe Balbi <balbi@ti.com> [141002 13:18]:
> > > > On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > > > > 
> > > > > Hmm here seems to be a link to similar issues from 2011:
> > > > > 
> > > > > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > > > > 
> > > > > Looks like the issue can be potentially reproduced with:
> > > > > 
> > > > > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> > > > 
> > > > running here on am335x and am437x. On that same post, on person
> > > > mentions he reproduced on beagle bone.
> > > 
> > > OK I'll run it here too on my am37xx evm. Looks like Stanley was
> > > running both cyclictest and hackbench the same time.
> > 
> > yeah I did that.
> > 
> > BTW, just got the following on BBB, AM437x SK is still running.
> > 
> > [ 3952.432262] Kernel panic - not syncing: Attempted to kill the idle task!752763
> > [ 3952.442403] CPU: 0 PID: 0 Comm: hackbench Not tainted 3.17.0-rc6-00456-gd8da063 #222
> > [ 3952.450517] [<c0017338>] (unwind_backtrace) from [<c0012fdc>] (show_stack+0x20/0x24)
> > [ 3952.458620] [<c0012fdc>] (show_stack) from [<c0647f0c>] (dump_stack+0x8c/0xa4)
> > [ 3952.466168] [<c0647f0c>] (dump_stack) from [<c0644da4>] (panic+0xa4/0x224)
> > [ 3952.473358] [<c0644da4>] (panic) from [<c004b510>] (do_exit+0x924/0x9d8)
> > [ 3952.480358] [<c004b510>] (do_exit) from [<c004c4d8>] (do_group_exit+0x50/0xc0)
> > [ 3952.487903] [<c004c4d8>] (do_group_exit) from [<c004c568>] (__wake_up_parent+0x0/0x30)
> > [ 3952.496179] [<c004c568>] (__wake_up_parent) from [<c000ed40>] (ret_fast_syscall+0x0/0x48)
> > [ 3952.504875] drm_kms_helper: panic occurred, switching back to text console
> > [ 3952.517844] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > 
> > 
> > > And I'll also queue the following patch during the -rc cycle to
> > > avoid apps segfaulting occasionally at random on omap3.
> > 
> > and maybe this will fix BBB :-) I'll add that locally. If I survive
> > until tomorrow, I'll add a Tested-by.
> 
> BBB died again with the same behavior as above, but I think it's
> unrelated to this errata. Therefore:
> 
> Tested-by: Felipe Balbi <balbi@ti.com>

BTW, I have revision r3p2:

CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d

And it still seems to need 430973.

Looks like my 37xx evm produced no errors overnight running cyclictest
and hackbench the same time.

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

* [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
@ 2014-10-03 15:46                         ` Tony Lindgren
  0 siblings, 0 replies; 90+ messages in thread
From: Tony Lindgren @ 2014-10-03 15:46 UTC (permalink / raw)
  To: linux-arm-kernel

* Felipe Balbi <balbi@ti.com> [141003 07:53]:
> On Thu, Oct 02, 2014 at 04:59:30PM -0500, Felipe Balbi wrote:
> > On Thu, Oct 02, 2014 at 02:19:08PM -0700, Tony Lindgren wrote:
> > > * Felipe Balbi <balbi@ti.com> [141002 13:18]:
> > > > On Thu, Oct 02, 2014 at 12:52:38PM -0700, Tony Lindgren wrote:
> > > > > 
> > > > > Hmm here seems to be a link to similar issues from 2011:
> > > > > 
> > > > > http://e2e.ti.com/support/arm/sitara_arm/f/791/p/113593/628790.aspx
> > > > > 
> > > > > Looks like the issue can be potentially reproduced with:
> > > > > 
> > > > > # cyclictest -l100000000 -m -a0 -t1 -n -p99 -i200 -h200 -q
> > > > 
> > > > running here on am335x and am437x. On that same post, on person
> > > > mentions he reproduced on beagle bone.
> > > 
> > > OK I'll run it here too on my am37xx evm. Looks like Stanley was
> > > running both cyclictest and hackbench the same time.
> > 
> > yeah I did that.
> > 
> > BTW, just got the following on BBB, AM437x SK is still running.
> > 
> > [ 3952.432262] Kernel panic - not syncing: Attempted to kill the idle task!752763
> > [ 3952.442403] CPU: 0 PID: 0 Comm: hackbench Not tainted 3.17.0-rc6-00456-gd8da063 #222
> > [ 3952.450517] [<c0017338>] (unwind_backtrace) from [<c0012fdc>] (show_stack+0x20/0x24)
> > [ 3952.458620] [<c0012fdc>] (show_stack) from [<c0647f0c>] (dump_stack+0x8c/0xa4)
> > [ 3952.466168] [<c0647f0c>] (dump_stack) from [<c0644da4>] (panic+0xa4/0x224)
> > [ 3952.473358] [<c0644da4>] (panic) from [<c004b510>] (do_exit+0x924/0x9d8)
> > [ 3952.480358] [<c004b510>] (do_exit) from [<c004c4d8>] (do_group_exit+0x50/0xc0)
> > [ 3952.487903] [<c004c4d8>] (do_group_exit) from [<c004c568>] (__wake_up_parent+0x0/0x30)
> > [ 3952.496179] [<c004c568>] (__wake_up_parent) from [<c000ed40>] (ret_fast_syscall+0x0/0x48)
> > [ 3952.504875] drm_kms_helper: panic occurred, switching back to text console
> > [ 3952.517844] ---[ end Kernel panic - not syncing: Attempted to kill the idle task!
> > 
> > 
> > > And I'll also queue the following patch during the -rc cycle to
> > > avoid apps segfaulting occasionally at random on omap3.
> > 
> > and maybe this will fix BBB :-) I'll add that locally. If I survive
> > until tomorrow, I'll add a Tested-by.
> 
> BBB died again with the same behavior as above, but I think it's
> unrelated to this errata. Therefore:
> 
> Tested-by: Felipe Balbi <balbi@ti.com>

BTW, I have revision r3p2:

CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d

And it still seems to need 430973.

Looks like my 37xx evm produced no errors overnight running cyclictest
and hackbench the same time.

Regards,

Tony

^ permalink raw reply	[flat|nested] 90+ messages in thread

end of thread, other threads:[~2014-10-03 15:47 UTC | newest]

Thread overview: 90+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-01 18:08 [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window Tero Kristo
2014-09-01 18:08 ` Tero Kristo
2014-09-01 18:08 ` [PATCH 01/26] ARM: DRA7: PRM: add voltage processor check behind a prm_feature flag Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 02/26] ARM: AM43XX: PRM: use OMAP4 PRM driver Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 03/26] ARM: OMAP2/3: hwmod: merge wait_target_ready functions for omap2/3 Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 04/26] ARM: AM33xx/OMAP4+: CM: remove cdoffs parameter from wait_module_idle/ready Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 05/26] ARM: OMAP4/AM33xx: add cm_init / cm_exit calls for AM33xx and OMAP4+ Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 06/26] ARM: OMAP2+: CM: add common API for cm_wait_module_ready Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 07/26] ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 08/26] ARM: OMAP2+: CM: make clkdm_hwsup operations static Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 09/26] ARM: OMAP2+: CM: add common APIs for cm_module_enable/disable Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:08 ` [PATCH 10/26] ARM: OMAP2/3: CM: make cm_split_idlest_reg SoC calls static Tero Kristo
2014-09-01 18:08   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 11/26] ARM: AM33xx: hwmod: remove am33xx specific module SoC opts Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 12/26] ARM: AM43xx: hwmod: use OMAP4 hardreset ops instead of the AM33xx version Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 13/26] ARM: AM33xx: PRM: add support for prm_init Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 14/26] ARM: OMAP2+: PRM: add generic API for asserting hardware reset Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 15/26] ARM: OMAP2+: PRM: add generic API for deasserting " Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 16/26] ARM: OMAP2+: PRM: add generic API for checking hardreset status Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 17/26] ARM: OMAP4: CM: move public definitions from cminst44xx.h to cm44xx.h Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 18/26] ARM: OMAP4: CM: make cminst direct register access functions static Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 19/26] ARM: OMAP4+: CM: remove omap4_cm1/cm2_* functions Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 20/26] ARM: AM33xx: PRM: move global warm reset implementation to driver Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 21/26] ARM: AM33xx: PRM: make direct register access functions static Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 22/26] ARM: OMAP4: PRM: make omap4_prm_read/write_inst_reg calls static Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 23/26] ARM: OMAP3: PRM: make PRCM interrupt handler related functions static Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 24/26] ARM: OMAP4: " Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 25/26] ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-01 18:09 ` [PATCH 26/26] ARM: OMAP2+: PRM: provide generic API for system reset Tero Kristo
2014-09-01 18:09   ` Tero Kristo
2014-09-18 17:16 ` [PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window Tony Lindgren
2014-09-18 17:16   ` Tony Lindgren
2014-09-18 19:16   ` Tony Lindgren
2014-09-18 19:16     ` Tony Lindgren
2014-09-19 16:38     ` Paul Walmsley
2014-09-19 16:38       ` Paul Walmsley
2014-09-19 17:27       ` Paul Walmsley
2014-09-19 17:27         ` Paul Walmsley
2014-09-23 16:14         ` Tony Lindgren
2014-09-23 16:14           ` Tony Lindgren
2014-09-24  9:04         ` Tero Kristo
2014-09-24  9:04           ` Tero Kristo
2014-10-02 16:32           ` Tony Lindgren
2014-10-02 16:32             ` Tony Lindgren
2014-10-02 19:52             ` Tony Lindgren
2014-10-02 19:52               ` Tony Lindgren
2014-10-02 20:17               ` Felipe Balbi
2014-10-02 20:17                 ` Felipe Balbi
2014-10-02 21:19                 ` Tony Lindgren
2014-10-02 21:19                   ` Tony Lindgren
2014-10-02 21:59                   ` Felipe Balbi
2014-10-02 21:59                     ` Felipe Balbi
2014-10-03 14:49                     ` Felipe Balbi
2014-10-03 14:49                       ` Felipe Balbi
2014-10-03 15:46                       ` Tony Lindgren
2014-10-03 15:46                         ` Tony Lindgren
2014-09-19 20:12     ` Nishanth Menon
2014-09-19 20:12       ` Nishanth Menon
2014-09-19 15:47   ` Paul Walmsley
2014-09-19 15:47     ` Paul Walmsley
2014-09-19 16:30   ` Paul Walmsley
2014-09-19 16:30     ` Paul Walmsley
2014-09-22 13:19     ` Tero Kristo
2014-09-22 13:19       ` Tero Kristo
2014-09-23 16:08       ` Tony Lindgren
2014-09-23 16:08         ` Tony Lindgren

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