[PATCH 1/2] ARM: DRA7: hwmod_data: Fix hwmod data for pcie

[PATCH 1/2] ARM: DRA7: hwmod_data: Fix hwmod data for pcie

[Kishon Vijay Abraham I]

Fixed hwmod data for pcie by having the correct module mode offset.
Previously this module mode offset was part of pcie PHY which was wrong.
Now this module mode offset was moved to pcie hwmod and removed the hwmod data
for pcie phy. While at that renamed pcie_hwmod to pciess_hwmod in order
to match with the name given in TRM.

This helps to get rid of the following warning
"omap_hwmod: pcie1: _wait_target_disable failed"

[Grygorii.Strashko@linaro.org: Found the issue that actually caused
 "omap_hwmod: pcie1: _wait_target_disable failed"]
Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |  103 +++++++----------------------
 1 file changed, 24 insertions(+), 79 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8692e7..16fe7a1 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1466,55 +1466,18 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
  *
  */
 
-static struct omap_hwmod_class dra7xx_pcie_hwmod_class = {
+static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
 	.name	= "pcie",
 };
 
 /* pcie1 */
-static struct omap_hwmod dra7xx_pcie1_hwmod = {
+static struct omap_hwmod dra7xx_pciess1_hwmod = {
 	.name		= "pcie1",
-	.class		= &dra7xx_pcie_hwmod_class,
+	.class		= &dra7xx_pciess_hwmod_class,
 	.clkdm_name	= "pcie_clkdm",
 	.main_clk	= "l4_root_clk_div",
 	.prcm = {
 		.omap4 = {
-			.clkctrl_offs	= DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
-			.modulemode	= MODULEMODE_SWCTRL,
-		},
-	},
-};
-
-/* pcie2 */
-static struct omap_hwmod dra7xx_pcie2_hwmod = {
-	.name		= "pcie2",
-	.class		= &dra7xx_pcie_hwmod_class,
-	.clkdm_name	= "pcie_clkdm",
-	.main_clk	= "l4_root_clk_div",
-	.prcm = {
-		.omap4 = {
-			.clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
-			.modulemode   = MODULEMODE_SWCTRL,
-		},
-	},
-};
-
-/*
- * 'PCIE PHY' class
- *
- */
-
-static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
-	.name	= "pcie-phy",
-};
-
-/* pcie1 phy */
-static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
-	.name		= "pcie1-phy",
-	.class		= &dra7xx_pcie_phy_hwmod_class,
-	.clkdm_name	= "l3init_clkdm",
-	.main_clk	= "l4_root_clk_div",
-	.prcm = {
-		.omap4 = {
 			.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
 			.context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_SWCTRL,
@@ -1522,11 +1485,11 @@ static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
 	},
 };
 
-/* pcie2 phy */
-static struct omap_hwmod dra7xx_pcie2_phy_hwmod = {
-	.name		= "pcie2-phy",
-	.class		= &dra7xx_pcie_phy_hwmod_class,
-	.clkdm_name	= "l3init_clkdm",
+/* pcie2 */
+static struct omap_hwmod dra7xx_pciess2_hwmod = {
+	.name		= "pcie2",
+	.class		= &dra7xx_pciess_hwmod_class,
+	.clkdm_name	= "pcie_clkdm",
 	.main_clk	= "l4_root_clk_div",
 	.prcm = {
 		.omap4 = {
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l3_main_1 -> pcie1 */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = {
+/* l3_main_1 -> pciess1 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {
 	.master		= &dra7xx_l3_main_1_hwmod,
-	.slave		= &dra7xx_pcie1_hwmod,
+	.slave		= &dra7xx_pciess1_hwmod,
 	.clk		= "l3_iclk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_cfg -> pcie1 */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = {
+/* l4_cfg -> pciess1 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {
 	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie1_hwmod,
+	.slave		= &dra7xx_pciess1_hwmod,
 	.clk		= "l4_root_clk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l3_main_1 -> pcie2 */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = {
+/* l3_main_1 -> pciess2 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {
 	.master		= &dra7xx_l3_main_1_hwmod,
-	.slave		= &dra7xx_pcie2_hwmod,
+	.slave		= &dra7xx_pciess2_hwmod,
 	.clk		= "l3_iclk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_cfg -> pcie2 */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = {
-	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie2_hwmod,
-	.clk		= "l4_root_clk_div",
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_cfg -> pcie1 phy */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
-	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie1_phy_hwmod,
-	.clk		= "l4_root_clk_div",
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_cfg -> pcie2 phy */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
+/* l4_cfg -> pciess2 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
 	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie2_phy_hwmod,
+	.slave		= &dra7xx_pciess2_hwmod,
 	.clk		= "l4_root_clk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_cfg__mpu,
 	&dra7xx_l4_cfg__ocp2scp1,
 	&dra7xx_l4_cfg__ocp2scp3,
-	&dra7xx_l3_main_1__pcie1,
-	&dra7xx_l4_cfg__pcie1,
-	&dra7xx_l3_main_1__pcie2,
-	&dra7xx_l4_cfg__pcie2,
-	&dra7xx_l4_cfg__pcie1_phy,
-	&dra7xx_l4_cfg__pcie2_phy,
+	&dra7xx_l3_main_1__pciess1,
+	&dra7xx_l4_cfg__pciess1,
+	&dra7xx_l3_main_1__pciess2,
+	&dra7xx_l4_cfg__pciess2,
 	&dra7xx_l3_main_1__qspi,
 	&dra7xx_l4_per3__rtcss,
 	&dra7xx_l4_cfg__sata,
-- 
1.7.9.5

[PATCH 1/2] ARM: DRA7: hwmod_data: Fix hwmod data for pcie

[Kishon Vijay Abraham I]

Fixed hwmod data for pcie by having the correct module mode offset.
Previously this module mode offset was part of pcie PHY which was wrong.
Now this module mode offset was moved to pcie hwmod and removed the hwmod data
for pcie phy. While at that renamed pcie_hwmod to pciess_hwmod in order
to match with the name given in TRM.

This helps to get rid of the following warning
"omap_hwmod: pcie1: _wait_target_disable failed"

[Grygorii.Strashko at linaro.org: Found the issue that actually caused
 "omap_hwmod: pcie1: _wait_target_disable failed"]
Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c |  103 +++++++----------------------
 1 file changed, 24 insertions(+), 79 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8692e7..16fe7a1 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1466,55 +1466,18 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
  *
  */
 
-static struct omap_hwmod_class dra7xx_pcie_hwmod_class = {
+static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
 	.name	= "pcie",
 };
 
 /* pcie1 */
-static struct omap_hwmod dra7xx_pcie1_hwmod = {
+static struct omap_hwmod dra7xx_pciess1_hwmod = {
 	.name		= "pcie1",
-	.class		= &dra7xx_pcie_hwmod_class,
+	.class		= &dra7xx_pciess_hwmod_class,
 	.clkdm_name	= "pcie_clkdm",
 	.main_clk	= "l4_root_clk_div",
 	.prcm = {
 		.omap4 = {
-			.clkctrl_offs	= DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
-			.modulemode	= MODULEMODE_SWCTRL,
-		},
-	},
-};
-
-/* pcie2 */
-static struct omap_hwmod dra7xx_pcie2_hwmod = {
-	.name		= "pcie2",
-	.class		= &dra7xx_pcie_hwmod_class,
-	.clkdm_name	= "pcie_clkdm",
-	.main_clk	= "l4_root_clk_div",
-	.prcm = {
-		.omap4 = {
-			.clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
-			.modulemode   = MODULEMODE_SWCTRL,
-		},
-	},
-};
-
-/*
- * 'PCIE PHY' class
- *
- */
-
-static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
-	.name	= "pcie-phy",
-};
-
-/* pcie1 phy */
-static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
-	.name		= "pcie1-phy",
-	.class		= &dra7xx_pcie_phy_hwmod_class,
-	.clkdm_name	= "l3init_clkdm",
-	.main_clk	= "l4_root_clk_div",
-	.prcm = {
-		.omap4 = {
 			.clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
 			.context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
 			.modulemode   = MODULEMODE_SWCTRL,
@@ -1522,11 +1485,11 @@ static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
 	},
 };
 
-/* pcie2 phy */
-static struct omap_hwmod dra7xx_pcie2_phy_hwmod = {
-	.name		= "pcie2-phy",
-	.class		= &dra7xx_pcie_phy_hwmod_class,
-	.clkdm_name	= "l3init_clkdm",
+/* pcie2 */
+static struct omap_hwmod dra7xx_pciess2_hwmod = {
+	.name		= "pcie2",
+	.class		= &dra7xx_pciess_hwmod_class,
+	.clkdm_name	= "pcie_clkdm",
 	.main_clk	= "l4_root_clk_div",
 	.prcm = {
 		.omap4 = {
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l3_main_1 -> pcie1 */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = {
+/* l3_main_1 -> pciess1 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {
 	.master		= &dra7xx_l3_main_1_hwmod,
-	.slave		= &dra7xx_pcie1_hwmod,
+	.slave		= &dra7xx_pciess1_hwmod,
 	.clk		= "l3_iclk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_cfg -> pcie1 */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = {
+/* l4_cfg -> pciess1 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {
 	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie1_hwmod,
+	.slave		= &dra7xx_pciess1_hwmod,
 	.clk		= "l4_root_clk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l3_main_1 -> pcie2 */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = {
+/* l3_main_1 -> pciess2 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {
 	.master		= &dra7xx_l3_main_1_hwmod,
-	.slave		= &dra7xx_pcie2_hwmod,
+	.slave		= &dra7xx_pciess2_hwmod,
 	.clk		= "l3_iclk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_cfg -> pcie2 */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = {
-	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie2_hwmod,
-	.clk		= "l4_root_clk_div",
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_cfg -> pcie1 phy */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
-	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie1_phy_hwmod,
-	.clk		= "l4_root_clk_div",
-	.user		= OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_cfg -> pcie2 phy */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
+/* l4_cfg -> pciess2 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
 	.master		= &dra7xx_l4_cfg_hwmod,
-	.slave		= &dra7xx_pcie2_phy_hwmod,
+	.slave		= &dra7xx_pciess2_hwmod,
 	.clk		= "l4_root_clk_div",
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_cfg__mpu,
 	&dra7xx_l4_cfg__ocp2scp1,
 	&dra7xx_l4_cfg__ocp2scp3,
-	&dra7xx_l3_main_1__pcie1,
-	&dra7xx_l4_cfg__pcie1,
-	&dra7xx_l3_main_1__pcie2,
-	&dra7xx_l4_cfg__pcie2,
-	&dra7xx_l4_cfg__pcie1_phy,
-	&dra7xx_l4_cfg__pcie2_phy,
+	&dra7xx_l3_main_1__pciess1,
+	&dra7xx_l4_cfg__pciess1,
+	&dra7xx_l3_main_1__pciess2,
+	&dra7xx_l4_cfg__pciess2,
 	&dra7xx_l3_main_1__qspi,
 	&dra7xx_l4_per3__rtcss,
 	&dra7xx_l4_cfg__sata,
-- 
1.7.9.5

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Kishon Vijay Abraham I]

Now that we don't have hwmod entry for pcie PHY remove the
ti,hwmod property from PCIE PHY's

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi |    2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fed..18a904d 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1111,7 +1111,6 @@
 					      "wkupclk", "refclk",
 					      "div-clk", "phy-div";
 				#phy-cells = <0>;
-				ti,hwmods = "pcie1-phy";
 			};
 
 			pcie2_phy: pciephy@4a095000 {
@@ -1130,7 +1129,6 @@
 					      "wkupclk", "refclk",
 					      "div-clk", "phy-div";
 				#phy-cells = <0>;
-				ti,hwmods = "pcie2-phy";
 				status = "disabled";
 			};
 		};
-- 
1.7.9.5

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Kishon Vijay Abraham I]

Now that we don't have hwmod entry for pcie PHY remove the
ti,hwmod property from PCIE PHY's

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi |    2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fed..18a904d 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1111,7 +1111,6 @@
 					      "wkupclk", "refclk",
 					      "div-clk", "phy-div";
 				#phy-cells = <0>;
-				ti,hwmods = "pcie1-phy";
 			};
 
 			pcie2_phy: pciephy at 4a095000 {
@@ -1130,7 +1129,6 @@
 					      "wkupclk", "refclk",
 					      "div-clk", "phy-div";
 				#phy-cells = <0>;
-				ti,hwmods = "pcie2-phy";
 				status = "disabled";
 			};
 		};
-- 
1.7.9.5

Re: [PATCH 1/2] ARM: DRA7: hwmod_data: Fix hwmod data for pcie

[Paul Walmsley]

On Fri, 20 Feb 2015, Kishon Vijay Abraham I wrote:

> Fixed hwmod data for pcie by having the correct module mode offset.
> Previously this module mode offset was part of pcie PHY which was wrong.
> Now this module mode offset was moved to pcie hwmod and removed the hwmod data
> for pcie phy. While at that renamed pcie_hwmod to pciess_hwmod in order
> to match with the name given in TRM.
> 
> This helps to get rid of the following warning
> "omap_hwmod: pcie1: _wait_target_disable failed"
> 
> [Grygorii.Strashko@linaro.org: Found the issue that actually caused
>  "omap_hwmod: pcie1: _wait_target_disable failed"]
> Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

Thanks sent this for v4.0-rc fixes.  Unfortunately I don't have a DRA7xx 
board so can't test.


- Paul

[PATCH 1/2] ARM: DRA7: hwmod_data: Fix hwmod data for pcie

[Paul Walmsley]

On Fri, 20 Feb 2015, Kishon Vijay Abraham I wrote:

> Fixed hwmod data for pcie by having the correct module mode offset.
> Previously this module mode offset was part of pcie PHY which was wrong.
> Now this module mode offset was moved to pcie hwmod and removed the hwmod data
> for pcie phy. While at that renamed pcie_hwmod to pciess_hwmod in order
> to match with the name given in TRM.
> 
> This helps to get rid of the following warning
> "omap_hwmod: pcie1: _wait_target_disable failed"
> 
> [Grygorii.Strashko at linaro.org: Found the issue that actually caused
>  "omap_hwmod: pcie1: _wait_target_disable failed"]
> Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

Thanks sent this for v4.0-rc fixes.  Unfortunately I don't have a DRA7xx 
board so can't test.


- Paul

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii Strashko]

Hi Tony,

As I can see Patch 1 from this series was merged in 4.0-rc4,
but this patch wasn't. As result, I can see below warning all the time during boot now:

[    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
 

On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
> Now that we don't have hwmod entry for pcie PHY remove the
> ti,hwmod property from PCIE PHY's
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>   arch/arm/boot/dts/dra7.dtsi |    2 --
>   1 file changed, 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 5827fed..18a904d 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -1111,7 +1111,6 @@
>   					      "wkupclk", "refclk",
>   					      "div-clk", "phy-div";
>   				#phy-cells = <0>;
> -				ti,hwmods = "pcie1-phy";
>   			};
>   
>   			pcie2_phy: pciephy@4a095000 {
> @@ -1130,7 +1129,6 @@
>   					      "wkupclk", "refclk",
>   					      "div-clk", "phy-div";
>   				#phy-cells = <0>;
> -				ti,hwmods = "pcie2-phy";
>   				status = "disabled";
>   			};
>   		};
> 

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii Strashko]

Hi Tony,

As I can see Patch 1 from this series was merged in 4.0-rc4,
but this patch wasn't. As result, I can see below warning all the time during boot now:

[    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
 

On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
> Now that we don't have hwmod entry for pcie PHY remove the
> ti,hwmod property from PCIE PHY's
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>   arch/arm/boot/dts/dra7.dtsi |    2 --
>   1 file changed, 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 5827fed..18a904d 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -1111,7 +1111,6 @@
>   					      "wkupclk", "refclk",
>   					      "div-clk", "phy-div";
>   				#phy-cells = <0>;
> -				ti,hwmods = "pcie1-phy";
>   			};
>   
>   			pcie2_phy: pciephy at 4a095000 {
> @@ -1130,7 +1129,6 @@
>   					      "wkupclk", "refclk",
>   					      "div-clk", "phy-div";
>   				#phy-cells = <0>;
> -				ti,hwmods = "pcie2-phy";
>   				status = "disabled";
>   			};
>   		};
> 

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Tony Lindgren]

* Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> Hi Tony,
> 
> As I can see Patch 1 from this series was merged in 4.0-rc4,
> but this patch wasn't. As result, I can see below warning all the time during boot now:
> 
> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
 
OK. Is this needed as a fix for the v4.0-rc series, or can this wait
for v4.1?

Regards,

Tony
 
> On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
> > Now that we don't have hwmod entry for pcie PHY remove the
> > ti,hwmod property from PCIE PHY's
> > 
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> > ---
> >   arch/arm/boot/dts/dra7.dtsi |    2 --
> >   1 file changed, 2 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> > index 5827fed..18a904d 100644
> > --- a/arch/arm/boot/dts/dra7.dtsi
> > +++ b/arch/arm/boot/dts/dra7.dtsi
> > @@ -1111,7 +1111,6 @@
> >   					      "wkupclk", "refclk",
> >   					      "div-clk", "phy-div";
> >   				#phy-cells = <0>;
> > -				ti,hwmods = "pcie1-phy";
> >   			};
> >   
> >   			pcie2_phy: pciephy@4a095000 {
> > @@ -1130,7 +1129,6 @@
> >   					      "wkupclk", "refclk",
> >   					      "div-clk", "phy-div";
> >   				#phy-cells = <0>;
> > -				ti,hwmods = "pcie2-phy";
> >   				status = "disabled";
> >   			};
> >   		};
> > 
> 

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Tony Lindgren]

* Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> Hi Tony,
> 
> As I can see Patch 1 from this series was merged in 4.0-rc4,
> but this patch wasn't. As result, I can see below warning all the time during boot now:
> 
> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
 
OK. Is this needed as a fix for the v4.0-rc series, or can this wait
for v4.1?

Regards,

Tony
 
> On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
> > Now that we don't have hwmod entry for pcie PHY remove the
> > ti,hwmod property from PCIE PHY's
> > 
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> > ---
> >   arch/arm/boot/dts/dra7.dtsi |    2 --
> >   1 file changed, 2 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> > index 5827fed..18a904d 100644
> > --- a/arch/arm/boot/dts/dra7.dtsi
> > +++ b/arch/arm/boot/dts/dra7.dtsi
> > @@ -1111,7 +1111,6 @@
> >   					      "wkupclk", "refclk",
> >   					      "div-clk", "phy-div";
> >   				#phy-cells = <0>;
> > -				ti,hwmods = "pcie1-phy";
> >   			};
> >   
> >   			pcie2_phy: pciephy at 4a095000 {
> > @@ -1130,7 +1129,6 @@
> >   					      "wkupclk", "refclk",
> >   					      "div-clk", "phy-div";
> >   				#phy-cells = <0>;
> > -				ti,hwmods = "pcie2-phy";
> >   				status = "disabled";
> >   			};
> >   		};
> > 
> 

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii.Strashko@linaro.org]

On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>> but this patch wasn't. As result, I can see below warning all the time during boot now:
>>
>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
>   
> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> for v4.1?

I think, Yes. These two patches should go all together, because they are
interrelated.

>> On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
>>> Now that we don't have hwmod entry for pcie PHY remove the
>>> ti,hwmod property from PCIE PHY's
>>>
>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>> ---
>>>    arch/arm/boot/dts/dra7.dtsi |    2 --
>>>    1 file changed, 2 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>> index 5827fed..18a904d 100644
>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>> @@ -1111,7 +1111,6 @@
>>>    					      "wkupclk", "refclk",
>>>    					      "div-clk", "phy-div";
>>>    				#phy-cells = <0>;
>>> -				ti,hwmods = "pcie1-phy";
>>>    			};
>>>    
>>>    			pcie2_phy: pciephy@4a095000 {
>>> @@ -1130,7 +1129,6 @@
>>>    					      "wkupclk", "refclk",
>>>    					      "div-clk", "phy-div";
>>>    				#phy-cells = <0>;
>>> -				ti,hwmods = "pcie2-phy";
>>>    				status = "disabled";
>>>    			};
>>>    		};
>>>
>>


-- 
regards,
-grygorii

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii.Strashko@linaro.org]

On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>> but this patch wasn't. As result, I can see below warning all the time during boot now:
>>
>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
>   
> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> for v4.1?

I think, Yes. These two patches should go all together, because they are
interrelated.

>> On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
>>> Now that we don't have hwmod entry for pcie PHY remove the
>>> ti,hwmod property from PCIE PHY's
>>>
>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>> ---
>>>    arch/arm/boot/dts/dra7.dtsi |    2 --
>>>    1 file changed, 2 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>> index 5827fed..18a904d 100644
>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>> @@ -1111,7 +1111,6 @@
>>>    					      "wkupclk", "refclk",
>>>    					      "div-clk", "phy-div";
>>>    				#phy-cells = <0>;
>>> -				ti,hwmods = "pcie1-phy";
>>>    			};
>>>    
>>>    			pcie2_phy: pciephy at 4a095000 {
>>> @@ -1130,7 +1129,6 @@
>>>    					      "wkupclk", "refclk",
>>>    					      "div-clk", "phy-div";
>>>    				#phy-cells = <0>;
>>> -				ti,hwmods = "pcie2-phy";
>>>    				status = "disabled";
>>>    			};
>>>    		};
>>>
>>


-- 
regards,
-grygorii

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Tony Lindgren]

* Grygorii.Strashko@linaro.org <grygorii.strashko@linaro.org> [150318 12:36]:
> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >> but this patch wasn't. As result, I can see below warning all the time during boot now:
> >>
> >> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> >   
> > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > for v4.1?
> 
> I think, Yes. These two patches should go all together, because they are
> interrelated.

OK applying into omap-for-v4.0/fixes thanks.

Tony
 
> >> On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
> >>> Now that we don't have hwmod entry for pcie PHY remove the
> >>> ti,hwmod property from PCIE PHY's
> >>>
> >>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >>> ---
> >>>    arch/arm/boot/dts/dra7.dtsi |    2 --
> >>>    1 file changed, 2 deletions(-)
> >>>
> >>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> >>> index 5827fed..18a904d 100644
> >>> --- a/arch/arm/boot/dts/dra7.dtsi
> >>> +++ b/arch/arm/boot/dts/dra7.dtsi
> >>> @@ -1111,7 +1111,6 @@
> >>>    					      "wkupclk", "refclk",
> >>>    					      "div-clk", "phy-div";
> >>>    				#phy-cells = <0>;
> >>> -				ti,hwmods = "pcie1-phy";
> >>>    			};
> >>>    
> >>>    			pcie2_phy: pciephy@4a095000 {
> >>> @@ -1130,7 +1129,6 @@
> >>>    					      "wkupclk", "refclk",
> >>>    					      "div-clk", "phy-div";
> >>>    				#phy-cells = <0>;
> >>> -				ti,hwmods = "pcie2-phy";
> >>>    				status = "disabled";
> >>>    			};
> >>>    		};
> >>>
> >>
> 
> 
> -- 
> regards,
> -grygorii

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Tony Lindgren]

* Grygorii.Strashko at linaro.org <grygorii.strashko@linaro.org> [150318 12:36]:
> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >> but this patch wasn't. As result, I can see below warning all the time during boot now:
> >>
> >> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> >   
> > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > for v4.1?
> 
> I think, Yes. These two patches should go all together, because they are
> interrelated.

OK applying into omap-for-v4.0/fixes thanks.

Tony
 
> >> On 02/20/2015 10:51 AM, Kishon Vijay Abraham I wrote:
> >>> Now that we don't have hwmod entry for pcie PHY remove the
> >>> ti,hwmod property from PCIE PHY's
> >>>
> >>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> >>> ---
> >>>    arch/arm/boot/dts/dra7.dtsi |    2 --
> >>>    1 file changed, 2 deletions(-)
> >>>
> >>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> >>> index 5827fed..18a904d 100644
> >>> --- a/arch/arm/boot/dts/dra7.dtsi
> >>> +++ b/arch/arm/boot/dts/dra7.dtsi
> >>> @@ -1111,7 +1111,6 @@
> >>>    					      "wkupclk", "refclk",
> >>>    					      "div-clk", "phy-div";
> >>>    				#phy-cells = <0>;
> >>> -				ti,hwmods = "pcie1-phy";
> >>>    			};
> >>>    
> >>>    			pcie2_phy: pciephy at 4a095000 {
> >>> @@ -1130,7 +1129,6 @@
> >>>    					      "wkupclk", "refclk",
> >>>    					      "div-clk", "phy-div";
> >>>    				#phy-cells = <0>;
> >>> -				ti,hwmods = "pcie2-phy";
> >>>    				status = "disabled";
> >>>    			};
> >>>    		};
> >>>
> >>
> 
> 
> -- 
> regards,
> -grygorii

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:

> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >> but this patch wasn't. As result, I can see below warning all the time during boot now:
> >>
> >> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> >   
> > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > for v4.1?
> 
> I think, Yes. These two patches should go all together, because they are
> interrelated.

Does the warning result in a functional problem, or is it just a warning?


- Paul

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:

> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >> but this patch wasn't. As result, I can see below warning all the time during boot now:
> >>
> >> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> >   
> > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > for v4.1?
> 
> I think, Yes. These two patches should go all together, because they are
> interrelated.

Does the warning result in a functional problem, or is it just a warning?


- Paul

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii.Strashko@linaro.org]

On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
>
>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>>>> but this patch wasn't. As result, I can see below warning all the time during boot now:
>>>>
>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
>>>
>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
>>> for v4.1?
>>
>> I think, Yes. These two patches should go all together, because they are
>> interrelated.
>
> Does the warning result in a functional problem, or is it just a warning?
>

PCE1 PHY device is not registered any more.

-- 
regards,
-grygorii

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii.Strashko@linaro.org]

On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
>
>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>>>> but this patch wasn't. As result, I can see below warning all the time during boot now:
>>>>
>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
>>>
>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
>>> for v4.1?
>>
>> I think, Yes. These two patches should go all together, because they are
>> interrelated.
>
> Does the warning result in a functional problem, or is it just a warning?
>

PCE1 PHY device is not registered any more.

-- 
regards,
-grygorii

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:

> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> > On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> > 
> > > On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > > > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> > > > > As I can see Patch 1 from this series was merged in 4.0-rc4,
> > > > > but this patch wasn't. As result, I can see below warning all the time
> > > > > during boot now:
> > > > > 
> > > > > [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> > > > > 'pcie1-phy'
> > > > 
> > > > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > > > for v4.1?
> > > 
> > > I think, Yes. These two patches should go all together, because they are
> > > interrelated.
> > 
> > Does the warning result in a functional problem, or is it just a warning?
> > 
> 
> PCE1 PHY device is not registered any more.

How does the second patch fix that?

- Paul

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:

> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> > On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> > 
> > > On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > > > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> > > > > As I can see Patch 1 from this series was merged in 4.0-rc4,
> > > > > but this patch wasn't. As result, I can see below warning all the time
> > > > > during boot now:
> > > > > 
> > > > > [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> > > > > 'pcie1-phy'
> > > > 
> > > > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > > > for v4.1?
> > > 
> > > I think, Yes. These two patches should go all together, because they are
> > > interrelated.
> > 
> > Does the warning result in a functional problem, or is it just a warning?
> > 
> 
> PCE1 PHY device is not registered any more.

How does the second patch fix that?

- Paul

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [150319 08:46]:
> On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> 
> > On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> > > On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> > > 
> > > > On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > > > > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> > > > > > As I can see Patch 1 from this series was merged in 4.0-rc4,
> > > > > > but this patch wasn't. As result, I can see below warning all the time
> > > > > > during boot now:
> > > > > > 
> > > > > > [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> > > > > > 'pcie1-phy'
> > > > > 
> > > > > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > > > > for v4.1?
> > > > 
> > > > I think, Yes. These two patches should go all together, because they are
> > > > interrelated.
> > > 
> > > Does the warning result in a functional problem, or is it just a warning?
> > > 
> > 
> > PCE1 PHY device is not registered any more.
> 
> How does the second patch fix that?

It seems it should be just a warning fix if the pciephy hwmod entries
are now gone?

Anyways, I'm planning to send a pull request for  omap-for-v4.0/fixes
today. Please let me know ASAP if the $subject patch should be dropped,
otherwise I'll send it as it fixes a boot time warning and is already
applied.

Regards,

Tony

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [150319 08:46]:
> On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> 
> > On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> > > On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> > > 
> > > > On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > > > > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> > > > > > As I can see Patch 1 from this series was merged in 4.0-rc4,
> > > > > > but this patch wasn't. As result, I can see below warning all the time
> > > > > > during boot now:
> > > > > > 
> > > > > > [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> > > > > > 'pcie1-phy'
> > > > > 
> > > > > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > > > > for v4.1?
> > > > 
> > > > I think, Yes. These two patches should go all together, because they are
> > > > interrelated.
> > > 
> > > Does the warning result in a functional problem, or is it just a warning?
> > > 
> > 
> > PCE1 PHY device is not registered any more.
> 
> How does the second patch fix that?

It seems it should be just a warning fix if the pciephy hwmod entries
are now gone?

Anyways, I'm planning to send a pull request for  omap-for-v4.0/fixes
today. Please let me know ASAP if the $subject patch should be dropped,
otherwise I'll send it as it fixes a boot time warning and is already
applied.

Regards,

Tony

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii.Strashko@linaro.org]

On 03/19/2015 05:45 PM, Paul Walmsley wrote:
> On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> 
>> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
>>> On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
>>>
>>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
>>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>>>>>> but this patch wasn't. As result, I can see below warning all the time
>>>>>> during boot now:
>>>>>>
>>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
>>>>>> 'pcie1-phy'
>>>>>
>>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
>>>>> for v4.1?
>>>>
>>>> I think, Yes. These two patches should go all together, because they are
>>>> interrelated.
>>>
>>> Does the warning result in a functional problem, or is it just a warning?
>>>
>>
>> PCE1 PHY device is not registered any more.
> 
> How does the second patch fix that?

I've re-checked it - sorry for disinfo.

PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
As result Runtime PM is not working any more.


[    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
[    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
[    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info

When ti,hwmods is not present PCI PHY will be added as regular Platform device
and Runtime PM will work again.

-- 
regards,
-grygorii

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Grygorii.Strashko@linaro.org]

On 03/19/2015 05:45 PM, Paul Walmsley wrote:
> On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> 
>> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
>>> On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
>>>
>>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
>>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>>>>>> but this patch wasn't. As result, I can see below warning all the time
>>>>>> during boot now:
>>>>>>
>>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
>>>>>> 'pcie1-phy'
>>>>>
>>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
>>>>> for v4.1?
>>>>
>>>> I think, Yes. These two patches should go all together, because they are
>>>> interrelated.
>>>
>>> Does the warning result in a functional problem, or is it just a warning?
>>>
>>
>> PCE1 PHY device is not registered any more.
> 
> How does the second patch fix that?

I've re-checked it - sorry for disinfo.

PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
As result Runtime PM is not working any more.


[    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
[    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
[    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info

When ti,hwmods is not present PCI PHY will be added as regular Platform device
and Runtime PM will work again.

-- 
regards,
-grygorii

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 19 Mar 2015, Tony Lindgren wrote:

> * Paul Walmsley <paul@pwsan.com> [150319 08:46]:
> > On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> > 
> > > On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> > > > On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> > > > 
> > > > > On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > > > > > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> > > > > > > As I can see Patch 1 from this series was merged in 4.0-rc4,
> > > > > > > but this patch wasn't. As result, I can see below warning all the time
> > > > > > > during boot now:
> > > > > > > 
> > > > > > > [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> > > > > > > 'pcie1-phy'
> > > > > > 
> > > > > > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > > > > > for v4.1?
> > > > > 
> > > > > I think, Yes. These two patches should go all together, because they are
> > > > > interrelated.
> > > > 
> > > > Does the warning result in a functional problem, or is it just a warning?
> > > > 
> > > 
> > > PCE1 PHY device is not registered any more.
> > 
> > How does the second patch fix that?
> 
> It seems it should be just a warning fix if the pciephy hwmod entries
> are now gone?
> 
> Anyways, I'm planning to send a pull request for  omap-for-v4.0/fixes
> today. Please let me know ASAP if the $subject patch should be dropped,
> otherwise I'll send it as it fixes a boot time warning and is already
> applied.

If you want to send it up as a fix, that's fine with me.  But I don't see 
how that second patch will cause any changes in device registration, as 
stated.


- Paul

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 19 Mar 2015, Tony Lindgren wrote:

> * Paul Walmsley <paul@pwsan.com> [150319 08:46]:
> > On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> > 
> > > On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> > > > On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> > > > 
> > > > > On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> > > > > > * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> > > > > > > As I can see Patch 1 from this series was merged in 4.0-rc4,
> > > > > > > but this patch wasn't. As result, I can see below warning all the time
> > > > > > > during boot now:
> > > > > > > 
> > > > > > > [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> > > > > > > 'pcie1-phy'
> > > > > > 
> > > > > > OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> > > > > > for v4.1?
> > > > > 
> > > > > I think, Yes. These two patches should go all together, because they are
> > > > > interrelated.
> > > > 
> > > > Does the warning result in a functional problem, or is it just a warning?
> > > > 
> > > 
> > > PCE1 PHY device is not registered any more.
> > 
> > How does the second patch fix that?
> 
> It seems it should be just a warning fix if the pciephy hwmod entries
> are now gone?
> 
> Anyways, I'm planning to send a pull request for  omap-for-v4.0/fixes
> today. Please let me know ASAP if the $subject patch should be dropped,
> otherwise I'll send it as it fixes a boot time warning and is already
> applied.

If you want to send it up as a fix, that's fine with me.  But I don't see 
how that second patch will cause any changes in device registration, as 
stated.


- Paul

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:

> On 03/19/2015 05:45 PM, Paul Walmsley wrote:
> > On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> > 
> >> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> >>> On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> >>>
> >>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> >>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >>>>>> but this patch wasn't. As result, I can see below warning all the time
> >>>>>> during boot now:
> >>>>>>
> >>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> >>>>>> 'pcie1-phy'
> >>>>>
> >>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> >>>>> for v4.1?
> >>>>
> >>>> I think, Yes. These two patches should go all together, because they are
> >>>> interrelated.
> >>>
> >>> Does the warning result in a functional problem, or is it just a warning?
> >>>
> >>
> >> PCE1 PHY device is not registered any more.
> > 
> > How does the second patch fix that?
> 
> I've re-checked it - sorry for disinfo.
> 
> PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
> As result Runtime PM is not working any more.
> 
> 
> [    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> [    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
> [    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> 
> When ti,hwmods is not present PCI PHY will be added as regular Platform device
> and Runtime PM will work again.

OK then it should definitely go up as a fix.  

Kishon, for future references, those two patches should have been combined 
into a single patch.  As it stands now, if someone bisects down to that 
first patch, it sounds like PM will be at least partially broken.  Too bad 
I don't have a DRA7xx board where things like this can be tested before 
being sent upstream.



- Paul

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:

> On 03/19/2015 05:45 PM, Paul Walmsley wrote:
> > On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> > 
> >> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> >>> On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> >>>
> >>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> >>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >>>>>> but this patch wasn't. As result, I can see below warning all the time
> >>>>>> during boot now:
> >>>>>>
> >>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> >>>>>> 'pcie1-phy'
> >>>>>
> >>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> >>>>> for v4.1?
> >>>>
> >>>> I think, Yes. These two patches should go all together, because they are
> >>>> interrelated.
> >>>
> >>> Does the warning result in a functional problem, or is it just a warning?
> >>>
> >>
> >> PCE1 PHY device is not registered any more.
> > 
> > How does the second patch fix that?
> 
> I've re-checked it - sorry for disinfo.
> 
> PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
> As result Runtime PM is not working any more.
> 
> 
> [    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> [    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
> [    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> 
> When ti,hwmods is not present PCI PHY will be added as regular Platform device
> and Runtime PM will work again.

OK then it should definitely go up as a fix.  

Kishon, for future references, those two patches should have been combined 
into a single patch.  As it stands now, if someone bisects down to that 
first patch, it sounds like PM will be at least partially broken.  Too bad 
I don't have a DRA7xx board where things like this can be tested before 
being sent upstream.



- Paul

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Kishon Vijay Abraham I]

Hi,

On Thursday 19 March 2015 10:19 PM, Paul Walmsley wrote:
> On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> 
>> On 03/19/2015 05:45 PM, Paul Walmsley wrote:
>>> On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
>>>
>>>> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
>>>>> On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
>>>>>
>>>>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
>>>>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>>>>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>>>>>>>> but this patch wasn't. As result, I can see below warning all the time
>>>>>>>> during boot now:
>>>>>>>>
>>>>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
>>>>>>>> 'pcie1-phy'
>>>>>>>
>>>>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
>>>>>>> for v4.1?
>>>>>>
>>>>>> I think, Yes. These two patches should go all together, because they are
>>>>>> interrelated.
>>>>>
>>>>> Does the warning result in a functional problem, or is it just a warning?
>>>>>
>>>>
>>>> PCE1 PHY device is not registered any more.
>>>
>>> How does the second patch fix that?
>>
>> I've re-checked it - sorry for disinfo.
>>
>> PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
>> As result Runtime PM is not working any more.
>>
>>
>> [    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
>> [    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
>> [    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
>>
>> When ti,hwmods is not present PCI PHY will be added as regular Platform device
>> and Runtime PM will work again.
> 
> OK then it should definitely go up as a fix.  
> 
> Kishon, for future references, those two patches should have been combined 
> into a single patch.  As it stands now, if someone bisects down to that 
> first patch, it sounds like PM will be at least partially broken.  Too bad 
> I don't have a DRA7xx board where things like this can be tested before 
> being sent upstream.

huh.. was under the assumption that patches for device tree and the kernel
patches should be separate. And PCIE for DRA7xx was broken in mainline for
quite sometime now because of reset framework support not added for DRA7xx.

Thanks
Kishon

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Kishon Vijay Abraham I]

Hi,

On Thursday 19 March 2015 10:19 PM, Paul Walmsley wrote:
> On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> 
>> On 03/19/2015 05:45 PM, Paul Walmsley wrote:
>>> On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
>>>
>>>> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
>>>>> On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
>>>>>
>>>>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
>>>>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
>>>>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
>>>>>>>> but this patch wasn't. As result, I can see below warning all the time
>>>>>>>> during boot now:
>>>>>>>>
>>>>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
>>>>>>>> 'pcie1-phy'
>>>>>>>
>>>>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
>>>>>>> for v4.1?
>>>>>>
>>>>>> I think, Yes. These two patches should go all together, because they are
>>>>>> interrelated.
>>>>>
>>>>> Does the warning result in a functional problem, or is it just a warning?
>>>>>
>>>>
>>>> PCE1 PHY device is not registered any more.
>>>
>>> How does the second patch fix that?
>>
>> I've re-checked it - sorry for disinfo.
>>
>> PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
>> As result Runtime PM is not working any more.
>>
>>
>> [    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
>> [    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
>> [    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
>>
>> When ti,hwmods is not present PCI PHY will be added as regular Platform device
>> and Runtime PM will work again.
> 
> OK then it should definitely go up as a fix.  
> 
> Kishon, for future references, those two patches should have been combined 
> into a single patch.  As it stands now, if someone bisects down to that 
> first patch, it sounds like PM will be at least partially broken.  Too bad 
> I don't have a DRA7xx board where things like this can be tested before 
> being sent upstream.

huh.. was under the assumption that patches for device tree and the kernel
patches should be separate. And PCIE for DRA7xx was broken in mainline for
quite sometime now because of reset framework support not added for DRA7xx.

Thanks
Kishon

Re: [PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 26 Mar 2015, Kishon Vijay Abraham I wrote:

> On Thursday 19 March 2015 10:19 PM, Paul Walmsley wrote:
> > On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> >> On 03/19/2015 05:45 PM, Paul Walmsley wrote:
> >>> On Thu, 19 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> >>>> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> >>>>> On Wed, 18 Mar 2015, Grygorii.Strashko@linaro.org wrote:
> >>>>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> >>>>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >>>>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >>>>>>>> but this patch wasn't. As result, I can see below warning all the time
> >>>>>>>> during boot now:
> >>>>>>>>
> >>>>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> >>>>>>>> 'pcie1-phy'
> >>>>>>>
> >>>>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> >>>>>>> for v4.1?
> >>>>>>
> >>>>>> I think, Yes. These two patches should go all together, because they are
> >>>>>> interrelated.
> >>>>>
> >>>>> Does the warning result in a functional problem, or is it just a warning?
> >>>>
> >>>> PCE1 PHY device is not registered any more.
> >>>
> >>> How does the second patch fix that?
> >>
> >> I've re-checked it - sorry for disinfo.
> >>
> >> PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
> >> As result Runtime PM is not working any more.
> >>
> >>
> >> [    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> >> [    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
> >> [    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> >>
> >> When ti,hwmods is not present PCI PHY will be added as regular Platform device
> >> and Runtime PM will work again.
> > 
> > OK then it should definitely go up as a fix.  
> > 
> > Kishon, for future references, those two patches should have been combined 
> > into a single patch.  As it stands now, if someone bisects down to that 
> > first patch, it sounds like PM will be at least partially broken.  Too bad 
> > I don't have a DRA7xx board where things like this can be tested before 
> > being sent upstream.
> 
> huh.. was under the assumption that patches for device tree and the kernel
> patches should be separate.

Generally that's true, _unless_ separating them will break something 
between the two patches.  That appears to be the case here.  The important 
thing is to make sure every single commit builds and functions at least as 
well as the previous commit - i.e., there should be no regressions.


- Paul

[PATCH 2/2] ARM: dts: dra7: remove ti,hwmod property from pcie phy

[Paul Walmsley]

On Thu, 26 Mar 2015, Kishon Vijay Abraham I wrote:

> On Thursday 19 March 2015 10:19 PM, Paul Walmsley wrote:
> > On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> >> On 03/19/2015 05:45 PM, Paul Walmsley wrote:
> >>> On Thu, 19 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> >>>> On 03/19/2015 04:55 PM, Paul Walmsley wrote:
> >>>>> On Wed, 18 Mar 2015, Grygorii.Strashko at linaro.org wrote:
> >>>>>> On 03/18/2015 06:57 PM, Tony Lindgren wrote:
> >>>>>>> * Grygorii Strashko <grygorii.strashko@ti.com> [150318 09:37]:
> >>>>>>>> As I can see Patch 1 from this series was merged in 4.0-rc4,
> >>>>>>>> but this patch wasn't. As result, I can see below warning all the time
> >>>>>>>> during boot now:
> >>>>>>>>
> >>>>>>>> [    0.594591] platform 4a094000.pciephy: Cannot lookup hwmod
> >>>>>>>> 'pcie1-phy'
> >>>>>>>
> >>>>>>> OK. Is this needed as a fix for the v4.0-rc series, or can this wait
> >>>>>>> for v4.1?
> >>>>>>
> >>>>>> I think, Yes. These two patches should go all together, because they are
> >>>>>> interrelated.
> >>>>>
> >>>>> Does the warning result in a functional problem, or is it just a warning?
> >>>>
> >>>> PCE1 PHY device is not registered any more.
> >>>
> >>> How does the second patch fix that?
> >>
> >> I've re-checked it - sorry for disinfo.
> >>
> >> PHY devices are created, but omap_device_fail_pm_domain is assigned to them.
> >> As result Runtime PM is not working any more.
> >>
> >>
> >> [    0.592501] platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy'
> >> [    0.597510] pinctrl-single 4a003400.pinmux: 281 pins at pa fc003400 size 1124
> >> [    0.602794] ti-pipe3 4a094000.pciephy: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> >>
> >> When ti,hwmods is not present PCI PHY will be added as regular Platform device
> >> and Runtime PM will work again.
> > 
> > OK then it should definitely go up as a fix.  
> > 
> > Kishon, for future references, those two patches should have been combined 
> > into a single patch.  As it stands now, if someone bisects down to that 
> > first patch, it sounds like PM will be at least partially broken.  Too bad 
> > I don't have a DRA7xx board where things like this can be tested before 
> > being sent upstream.
> 
> huh.. was under the assumption that patches for device tree and the kernel
> patches should be separate.

Generally that's true, _unless_ separating them will break something 
between the two patches.  That appears to be the case here.  The important 
thing is to make sure every single commit builds and functions at least as 
well as the previous commit - i.e., there should be no regressions.


- Paul