* sama5d4, configure pck1 with dt?
@ 2016-07-06 21:17 Peter Meerwald-Stadler
2016-07-07 7:15 ` Boris Brezillon
0 siblings, 1 reply; 3+ messages in thread
From: Peter Meerwald-Stadler @ 2016-07-06 21:17 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
how do I configure pck1 using devicetree to be used as the master
clock for an audio codec?
in particular how do I choose the clock source and frequency for pck1?
is there a way to do this using devicetree?
or is the code in at91sam9g20ek_audio_probe() the way to go?
i.e mclk=clk_get(0, "pck1"); pllb=clk_get(0, "pllb"); clk_set_parent(mclk,
pllb); clk_set_rate(mclk, 12000000);
confused...
thanks, regards, p.
--
Peter Meerwald-Stadler
+43-664-2444418 (mobile)
^ permalink raw reply [flat|nested] 3+ messages in thread
* sama5d4, configure pck1 with dt?
2016-07-06 21:17 sama5d4, configure pck1 with dt? Peter Meerwald-Stadler
@ 2016-07-07 7:15 ` Boris Brezillon
2016-07-13 9:02 ` Peter Meerwald-Stadler
0 siblings, 1 reply; 3+ messages in thread
From: Boris Brezillon @ 2016-07-07 7:15 UTC (permalink / raw)
To: linux-arm-kernel
Hi Peter,
On Wed, 6 Jul 2016 23:17:07 +0200 (CEST)
Peter Meerwald-Stadler <pmeerw@pmeerw.net> wrote:
> Hello,
>
> how do I configure pck1 using devicetree to be used as the master
> clock for an audio codec?
>
> in particular how do I choose the clock source and frequency for pck1?
> is there a way to do this using devicetree?
>
> or is the code in at91sam9g20ek_audio_probe() the way to go?
> i.e mclk=clk_get(0, "pck1"); pllb=clk_get(0, "pllb"); clk_set_parent(mclk,
> pllb); clk_set_rate(mclk, 12000000);
It's as simple as that:
mclk = clk_get(<your-device>, "<audio-clk-name>");
clk_set_rate(mclk, <rate>);
<your-device> should not be NULL, <audio-clk-name> should not be pck1
(see the DT binding doc), and you should not manually re-parent the mclk
clk (the driver select the best parent when clk_set_rate() is
called).
Regards,
Boris
^ permalink raw reply [flat|nested] 3+ messages in thread
* sama5d4, configure pck1 with dt?
2016-07-07 7:15 ` Boris Brezillon
@ 2016-07-13 9:02 ` Peter Meerwald-Stadler
0 siblings, 0 replies; 3+ messages in thread
From: Peter Meerwald-Stadler @ 2016-07-13 9:02 UTC (permalink / raw)
To: linux-arm-kernel
Hallo Boris,
> > how do I configure pck1 using devicetree to be used as the master
> > clock for an audio codec?
> >
> > in particular how do I choose the clock source and frequency for pck1?
> > is there a way to do this using devicetree?
> >
> > or is the code in at91sam9g20ek_audio_probe() the way to go?
> > i.e mclk=clk_get(0, "pck1"); pllb=clk_get(0, "pllb"); clk_set_parent(mclk,
> > pllb); clk_set_rate(mclk, 12000000);
>
> It's as simple as that:
> mclk = clk_get(<your-device>, "<audio-clk-name>");
> clk_set_rate(mclk, <rate>);
thank you for your advise; it almost works :)
my issue is/was that CLK_SET_PARENT_GATE is set, so the clock cannot
reparent when prepared
the audio codec driver I am trying to use (da7213) enables the mclk in
BIAS_STANDBY pretty much before doing anything else (without knowing the
actual clock rate), later-on setting the actual rate fails...
the issue is within ALSA and/or the codec driver, not the SAMA5D4 clock
implementation
> <your-device> should not be NULL, <audio-clk-name> should not be pck1
> (see the DT binding doc), and you should not manually re-parent the mclk
> clk (the driver select the best parent when clk_set_rate() is
> called).
yep, understood, doing so now
thanks, regards, p.
--
Peter Meerwald-Stadler
+43-664-2444418 (mobile)
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-07-06 21:17 sama5d4, configure pck1 with dt? Peter Meerwald-Stadler
2016-07-07 7:15 ` Boris Brezillon
2016-07-13 9:02 ` Peter Meerwald-Stadler
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