From: atull <atull@opensource.altera.com>
To: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Joshua Clayton <stillcompiling@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Fabio Estevam <fabio.estevam@nxp.com>,
Russell King <linux@armlinux.org.uk>,
"Devicetree List" <devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
<julia@ni.com>
Subject: Re: [PATCH 1/3] fpga manager: Add cyclonespi driver for Altera fpgas
Date: Mon, 10 Oct 2016 13:38:18 -0500 [thread overview]
Message-ID: <alpine.DEB.2.02.1610101148520.28839@linuxheads99> (raw)
In-Reply-To: <CAAtXAHfax5qve7bpxNoObZOZGZk1CoJkusMecMXyMc_w1JBbvw@mail.gmail.com>
On Fri, 7 Oct 2016, Moritz Fischer wrote:
> Hi Alan,
>
> On Fri, Oct 7, 2016 at 11:21 AM, atull <atull@opensource.altera.com> wrote:
>
> > Moritz, Can you remind me what that issue was there (or point me to
> > that email, I can't find it)? I don't think I had a problem with that
> > in your case. In general I think if these drivers can take the
> > bitstream that comes from the manufacturer's tools and stuff it into
> > the FPGA, then we are accomplishing what we want. So I am OK with
> > this here. The intent of the driver is to load a standard rbf, same
> > as the other Altera FPGA drivers.
>
> My first version of the zynq fpga manager had byte swapping in there
> and detection of which format was used. Greg even (accidentially)
> merged my initial code
> which I then cleaned up in 4d10eaff5bfc69997a769f9c83b749f0a8c542fa
> ("fpga: zynq-fpga: Change fw format to handle bin instead of bit.") to
> address the review
> comments.
>
> I do see your point about useability, and if this is something that
> keeps coming up
> we could pull that into the framework with a flag to SWAP or as part
> of the image_information
> struct.
>
> Thoughts?
I agree. Some day we may want to see it useful to extend
the flow to do that. Currently it's not needed so we can
wait until we see clearly what is needed.
Alan
>
> Cheers,
>
> Moritz
>
> [1] https://mail-archive.com/linux-kernel@vger.kernel.org/msg995245.html
>
WARNING: multiple messages have this Message-ID (diff)
From: atull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
To: Moritz Fischer <moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w@public.gmane.org>
Cc: Joshua Clayton
<stillcompiling-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Sascha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>,
Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
Devicetree List
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Linux Kernel Mailing List
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-arm-kernel
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
julia-acOepvfBmUk@public.gmane.org
Subject: Re: [PATCH 1/3] fpga manager: Add cyclonespi driver for Altera fpgas
Date: Mon, 10 Oct 2016 13:38:18 -0500 [thread overview]
Message-ID: <alpine.DEB.2.02.1610101148520.28839@linuxheads99> (raw)
In-Reply-To: <CAAtXAHfax5qve7bpxNoObZOZGZk1CoJkusMecMXyMc_w1JBbvw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Fri, 7 Oct 2016, Moritz Fischer wrote:
> Hi Alan,
>
> On Fri, Oct 7, 2016 at 11:21 AM, atull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org> wrote:
>
> > Moritz, Can you remind me what that issue was there (or point me to
> > that email, I can't find it)? I don't think I had a problem with that
> > in your case. In general I think if these drivers can take the
> > bitstream that comes from the manufacturer's tools and stuff it into
> > the FPGA, then we are accomplishing what we want. So I am OK with
> > this here. The intent of the driver is to load a standard rbf, same
> > as the other Altera FPGA drivers.
>
> My first version of the zynq fpga manager had byte swapping in there
> and detection of which format was used. Greg even (accidentially)
> merged my initial code
> which I then cleaned up in 4d10eaff5bfc69997a769f9c83b749f0a8c542fa
> ("fpga: zynq-fpga: Change fw format to handle bin instead of bit.") to
> address the review
> comments.
>
> I do see your point about useability, and if this is something that
> keeps coming up
> we could pull that into the framework with a flag to SWAP or as part
> of the image_information
> struct.
>
> Thoughts?
I agree. Some day we may want to see it useful to extend
the flow to do that. Currently it's not needed so we can
wait until we see clearly what is needed.
Alan
>
> Cheers,
>
> Moritz
>
> [1] https://mail-archive.com/linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org/msg995245.html
>
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WARNING: multiple messages have this Message-ID (diff)
From: atull@opensource.altera.com (atull)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] fpga manager: Add cyclonespi driver for Altera fpgas
Date: Mon, 10 Oct 2016 13:38:18 -0500 [thread overview]
Message-ID: <alpine.DEB.2.02.1610101148520.28839@linuxheads99> (raw)
In-Reply-To: <CAAtXAHfax5qve7bpxNoObZOZGZk1CoJkusMecMXyMc_w1JBbvw@mail.gmail.com>
On Fri, 7 Oct 2016, Moritz Fischer wrote:
> Hi Alan,
>
> On Fri, Oct 7, 2016 at 11:21 AM, atull <atull@opensource.altera.com> wrote:
>
> > Moritz, Can you remind me what that issue was there (or point me to
> > that email, I can't find it)? I don't think I had a problem with that
> > in your case. In general I think if these drivers can take the
> > bitstream that comes from the manufacturer's tools and stuff it into
> > the FPGA, then we are accomplishing what we want. So I am OK with
> > this here. The intent of the driver is to load a standard rbf, same
> > as the other Altera FPGA drivers.
>
> My first version of the zynq fpga manager had byte swapping in there
> and detection of which format was used. Greg even (accidentially)
> merged my initial code
> which I then cleaned up in 4d10eaff5bfc69997a769f9c83b749f0a8c542fa
> ("fpga: zynq-fpga: Change fw format to handle bin instead of bit.") to
> address the review
> comments.
>
> I do see your point about useability, and if this is something that
> keeps coming up
> we could pull that into the framework with a flag to SWAP or as part
> of the image_information
> struct.
>
> Thoughts?
I agree. Some day we may want to see it useful to extend
the flow to do that. Currently it's not needed so we can
wait until we see clearly what is needed.
Alan
>
> Cheers,
>
> Moritz
>
> [1] https://mail-archive.com/linux-kernel at vger.kernel.org/msg995245.html
>
next prev parent reply other threads:[~2016-10-10 18:38 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1475783742.git.stillcompiling@gmail.com>
2016-10-06 20:34 ` [PATCH 1/3] fpga manager: Add cyclonespi driver for Altera fpgas Joshua Clayton
2016-10-06 20:34 ` Joshua Clayton
2016-10-06 20:34 ` Joshua Clayton
2016-10-07 2:48 ` Moritz Fischer
2016-10-07 2:48 ` Moritz Fischer
2016-10-07 18:21 ` atull
2016-10-07 18:21 ` atull
2016-10-07 18:21 ` atull
2016-10-07 18:42 ` Moritz Fischer
2016-10-07 18:42 ` Moritz Fischer
2016-10-07 18:42 ` Moritz Fischer
2016-10-10 18:38 ` atull [this message]
2016-10-10 18:38 ` atull
2016-10-10 18:38 ` atull
2016-10-07 20:54 ` Joshua Clayton
2016-10-07 20:54 ` Joshua Clayton
2016-10-07 20:54 ` Joshua Clayton
2016-10-10 18:29 ` atull
2016-10-10 18:29 ` atull
2016-10-10 18:29 ` atull
2016-10-06 20:34 ` [PATCH 2/3] doc: dt: add cyclone-spi binding document Joshua Clayton
2016-10-06 20:34 ` Joshua Clayton
2016-10-06 20:34 ` Joshua Clayton
2016-10-07 2:53 ` Moritz Fischer
2016-10-07 2:53 ` Moritz Fischer
2016-10-07 2:53 ` Moritz Fischer
2016-10-07 20:41 ` Joshua Clayton
2016-10-07 20:41 ` Joshua Clayton
2016-10-07 20:41 ` Joshua Clayton
2016-10-10 16:24 ` atull
2016-10-10 16:24 ` atull
2016-10-06 20:34 ` [PATCH 3/3] ARM: dts: imx6q-evi: support cyclonespi Joshua Clayton
2016-10-06 20:34 ` Joshua Clayton
2016-10-06 20:34 ` Joshua Clayton
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