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From: Stefano Stabellini <sstabellini@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Vijay Kilari <vijay.kilari@gmail.com>
Subject: Re: [RFC PATCH 21/24] ARM: vITS: handle INVALL command
Date: Wed, 9 Nov 2016 16:21:30 -0800 (PST)	[thread overview]
Message-ID: <alpine.DEB.2.10.1611091614540.3491@sstabellini-ThinkPad-X260> (raw)
In-Reply-To: <aa2442b5-0409-421c-5c98-485e6d3f4b33@arm.com>

On Fri, 4 Nov 2016, Andre Przywara wrote:
> Hi,
> 
> On 24/10/16 16:32, Vijay Kilari wrote:
> > On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara <andre.przywara@arm.com> wrote:
> >> The INVALL command instructs an ITS to invalidate the configuration
> >> data for all LPIs associated with a given redistributor (read: VCPU).
> >> To avoid iterating (and mapping!) all guest tables, we instead go through
> >> the host LPI table to find any LPIs targetting this VCPU. We then update
> >> the configuration bits for the connected virtual LPIs.
> >>
> >> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> >> ---
> >>  xen/arch/arm/gic-its.c        | 58 +++++++++++++++++++++++++++++++++++++++++++
> >>  xen/arch/arm/vgic-its.c       | 30 ++++++++++++++++++++++
> >>  xen/include/asm-arm/gic-its.h |  2 ++
> >>  3 files changed, 90 insertions(+)
> >>
> >> diff --git a/xen/arch/arm/gic-its.c b/xen/arch/arm/gic-its.c
> >> index 6f4329f..5129d6e 100644
> >> --- a/xen/arch/arm/gic-its.c
> >> +++ b/xen/arch/arm/gic-its.c
> >> @@ -228,6 +228,18 @@ static int its_send_cmd_inv(struct host_its *its,
> >>      return its_send_command(its, cmd);
> >>  }
> >>
> >> +static int its_send_cmd_invall(struct host_its *its, int cpu)
> >> +{
> >> +    uint64_t cmd[4];
> >> +
> >> +    cmd[0] = GITS_CMD_INVALL;
> >> +    cmd[1] = 0x00;
> >> +    cmd[2] = cpu & GENMASK(15, 0);
> >> +    cmd[3] = 0x00;
> >> +
> >> +    return its_send_command(its, cmd);
> >> +}
> >> +
> >>  int gicv3_its_map_device(struct host_its *hw_its, struct domain *d,
> >>                           int devid, int bits, bool valid)
> >>  {
> >> @@ -668,6 +680,52 @@ uint32_t gicv3_lpi_lookup_lpi(struct domain *d, uint32_t host_lpi, int *vcpu_id)
> >>      return hlpi.virt_lpi;
> >>  }
> >>
> >> +/* Iterate over all host LPIs, and updating the "enabled" state for a given
> >> + * guest redistributor (VCPU) given the respective state in the provided
> >> + * proptable. This proptable is indexed by the stored virtual LPI number.
> >> + * This is to implement a guest INVALL command.
> >> + */
> >> +void gicv3_lpi_update_configurations(struct vcpu *v, uint8_t *proptable)
> >> +{
> >> +    int chunk, i;
> >> +    struct host_its *its;
> >> +
> >> +    for (chunk = 0; chunk < MAX_HOST_LPIS / HOST_LPIS_PER_PAGE; chunk++)
> >> +    {
> >> +        if ( !lpi_data.host_lpis[chunk] )
> >> +            continue;
> >> +
> >> +        for (i = 0; i < HOST_LPIS_PER_PAGE; i++)
> >> +        {
> >> +            union host_lpi *hlpip = &lpi_data.host_lpis[chunk][i], hlpi;
> >> +            uint32_t hlpi_nr;
> >> +
> >> +            hlpi.data = hlpip->data;
> >> +            if ( !hlpi.virt_lpi )
> >> +                continue;
> >> +
> >> +            if ( hlpi.dom_id != v->domain->domain_id )
> >> +                continue;
> >> +
> >> +            if ( hlpi.vcpu_id != v->vcpu_id )
> >> +                continue;
> >> +
> >> +            hlpi_nr = chunk * HOST_LPIS_PER_PAGE + i;
> >> +
> >> +            if ( proptable[hlpi.virt_lpi] & LPI_PROP_ENABLED )
> >> +                lpi_data.lpi_property[hlpi_nr - 8192] |= LPI_PROP_ENABLED;
> >> +            else
> >> +                lpi_data.lpi_property[hlpi_nr - 8192] &= ~LPI_PROP_ENABLED;
> >> +        }
> >> +    }
> >         AFAIK, the initial design is to use tasklet to update property
> > table as it consumes
> > lot of time to update the table.
> 
> This is a possible, but premature optimization.
> Linux (at the moment, at least) only calls INVALL _once_, just after
> initialising the collections. And at this point no LPI is mapped, so the
> whole routine does basically nothing - and that quite fast.
> We can later have any kind of fancy algorithm if there is a need for.

I understand, but as-is it's so expensive that could be a DOS vector.
Also other OSes could issue INVALL much more often than Linux.

Considering that we might support device assigment with ITS soon, I
think it might be best to parse per-domain virtual tables rather than
the full list of physical LPIs, which theoretically could be much
larger. Or alternatively we need to think about adding another field to
lpi_data, to link together all lpis assigned to the same domain, but
that would cost even more memory. Or we could rate-limit the INVALL
calls to one every few seconds or something. Or all of the above :-)

We need to protect Xen from too frequent and too expensive requests like
this.


> >> +
> >> +    /* Tell all ITSes that they should update the property table for CPU 0,
> >> +     * which is where we map all LPIs to.
> >> +     */
> >> +    list_for_each_entry(its, &host_its_list, entry)
> >> +        its_send_cmd_invall(its, 0);
> >> +}
> >> +
> >>  void gicv3_lpi_set_enable(struct host_its *its,
> >>                            uint32_t deviceid, uint32_t eventid,
> >>                            uint32_t host_lpi, bool enabled)
> >> diff --git a/xen/arch/arm/vgic-its.c b/xen/arch/arm/vgic-its.c
> >> index 74da8fc..1e429b7 100644
> >> --- a/xen/arch/arm/vgic-its.c
> >> +++ b/xen/arch/arm/vgic-its.c
> >> @@ -294,6 +294,33 @@ out_unlock:
> >>      return ret;
> >>  }
> >>
> >> +/* INVALL updates the per-LPI configuration status for every LPI mapped to
> >> + * this redistributor. For the guest side we don't need to update anything,
> >> + * as we always refer to the actual table for the enabled bit and the
> >> + * priority.
> >> + * Enabling or disabling a virtual LPI however needs to be propagated to
> >> + * the respective host LPI. Instead of iterating over all mapped LPIs in our
> >> + * emulated GIC (which is expensive due to the required on-demand mapping),
> >> + * we iterate over all mapped _host_ LPIs and filter for those which are
> >> + * forwarded to this virtual redistributor.
> >> + */
> >> +static int its_handle_invall(struct virt_its *its, uint64_t *cmdptr)
> >> +{
> >> +    uint32_t collid = its_cmd_get_collection(cmdptr);
> >> +    struct vcpu *vcpu;
> >> +
> >> +    spin_lock(&its->its_lock);
> >> +    vcpu = get_vcpu_from_collection(its, collid);
> >> +    spin_unlock(&its->its_lock);
> >> +
> >> +    if ( !vcpu )
> >> +        return -1;
> >> +
> >> +    gicv3_lpi_update_configurations(vcpu, its->d->arch.vgic.proptable);
> >> +
> >> +    return 0;
> >> +}
> >> +
> >>  static int its_handle_mapc(struct virt_its *its, uint64_t *cmdptr)
> >>  {
> >>      uint32_t collid = its_cmd_get_collection(cmdptr);
> >> @@ -515,6 +542,9 @@ static int vgic_its_handle_cmds(struct domain *d, struct virt_its *its,
> >>          case GITS_CMD_INV:
> >>              its_handle_inv(its, cmdptr);
> >>             break;
> >> +        case GITS_CMD_INVALL:
> >> +            its_handle_invall(its, cmdptr);
> >> +           break;
> >>          case GITS_CMD_MAPC:
> >>              its_handle_mapc(its, cmdptr);
> >>              break;
> >> diff --git a/xen/include/asm-arm/gic-its.h b/xen/include/asm-arm/gic-its.h
> >> index 2cdb3e1..ba6b2d5 100644
> >> --- a/xen/include/asm-arm/gic-its.h
> >> +++ b/xen/include/asm-arm/gic-its.h
> >> @@ -146,6 +146,8 @@ int gicv3_lpi_drop_host_lpi(struct host_its *its,
> >>                              uint32_t devid, uint32_t eventid,
> >>                              uint32_t host_lpi);
> >>
> >> +void gicv3_lpi_update_configurations(struct vcpu *v, uint8_t *proptable);
> >> +
> >>  static inline int gicv3_lpi_get_priority(struct domain *d, uint32_t lpi)
> >>  {
> >>      return d->arch.vgic.proptable[lpi - 8192] & 0xfc;
> >> --
> >> 2.9.0
> >>
> >>
> >> _______________________________________________
> >> Xen-devel mailing list
> >> Xen-devel@lists.xen.org
> >> https://lists.xen.org/xen-devel
> > 
> 

_______________________________________________
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  reply	other threads:[~2016-11-10  0:21 UTC|newest]

Thread overview: 144+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-28 18:24 [RFC PATCH 00/24] [FOR 4.9] arm64: Dom0 ITS emulation Andre Przywara
2016-09-28 18:24 ` [RFC PATCH 01/24] ARM: GICv3 ITS: parse and store ITS subnodes from hardware DT Andre Przywara
2016-10-26  1:11   ` Stefano Stabellini
2016-11-01 15:13   ` Julien Grall
2016-11-14 17:35     ` Andre Przywara
2016-11-23 15:39       ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 02/24] ARM: GICv3: allocate LPI pending and property table Andre Przywara
2016-10-24 14:28   ` Vijay Kilari
2016-11-02 16:22     ` Andre Przywara
2016-10-26  1:10   ` Stefano Stabellini
2016-11-10 15:29     ` Andre Przywara
2016-11-10 21:00       ` Stefano Stabellini
2016-11-01 17:22   ` Julien Grall
2016-11-15 11:32     ` Andre Przywara
2016-11-23 15:58       ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 03/24] ARM: GICv3 ITS: allocate device and collection table Andre Przywara
2016-10-09 13:55   ` Vijay Kilari
2016-10-10  9:05     ` Andre Przywara
2016-10-24 14:30   ` Vijay Kilari
2016-11-02 17:51     ` Andre Przywara
2016-10-26 22:57   ` Stefano Stabellini
2016-11-01 17:34     ` Julien Grall
2016-11-10 15:32     ` Andre Przywara
2016-11-10 21:06       ` Stefano Stabellini
2016-11-01 18:19   ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 04/24] ARM: GICv3 ITS: map ITS command buffer Andre Przywara
2016-10-24 14:31   ` Vijay Kilari
2016-10-26 23:03   ` Stefano Stabellini
2016-11-10 16:04     ` Andre Przywara
2016-11-02 13:38   ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 05/24] ARM: GICv3 ITS: introduce ITS command handling Andre Przywara
2016-10-26 23:55   ` Stefano Stabellini
2016-10-27 21:52     ` Stefano Stabellini
2016-11-10 15:57     ` Andre Przywara
2016-11-02 15:05   ` Julien Grall
2017-01-31  9:10     ` Andre Przywara
2017-01-31 10:23       ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 06/24] ARM: GICv3 ITS: introduce host LPI array Andre Przywara
2016-10-27 22:59   ` Stefano Stabellini
2016-11-02 15:14     ` Julien Grall
2016-11-10 17:22     ` Andre Przywara
2016-11-10 21:48       ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 07/24] ARM: GICv3 ITS: introduce device mapping Andre Przywara
2016-10-24 15:31   ` Vijay Kilari
2016-11-03 19:33     ` Andre Przywara
2016-10-28  0:08   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 08/24] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2016-10-24 15:31   ` Vijay Kilari
2016-11-03 19:47     ` Andre Przywara
2016-10-28  1:04   ` Stefano Stabellini
2017-01-12 19:14     ` Andre Przywara
2017-01-13 19:37       ` Stefano Stabellini
2017-01-16  9:44         ` André Przywara
2017-01-16 19:16           ` Stefano Stabellini
2016-11-04 15:46   ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 09/24] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2016-10-28  1:51   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 10/24] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2016-10-28 23:07   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 11/24] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2016-10-24 15:32   ` Vijay Kilari
2016-11-03 20:21     ` Andre Przywara
2016-11-04 11:53       ` Julien Grall
2016-10-29  0:39   ` Stefano Stabellini
2017-03-29 15:47     ` Andre Przywara
2016-11-02 17:18   ` Julien Grall
2016-11-02 17:41     ` Stefano Stabellini
2016-11-02 18:03       ` Julien Grall
2016-11-02 18:09         ` Stefano Stabellini
2017-01-31  9:10     ` Andre Przywara
2017-01-31 10:38       ` Julien Grall
2017-01-31 12:04         ` Andre Przywara
2016-09-28 18:24 ` [RFC PATCH 12/24] ARM: vGICv3: introduce basic ITS emulation bits Andre Przywara
2016-10-09 14:20   ` Vijay Kilari
2016-10-10 10:38     ` Andre Przywara
2016-10-24 15:31   ` Vijay Kilari
2016-11-03 19:26     ` Andre Przywara
2016-11-04 12:07       ` Julien Grall
2016-11-03 17:50   ` Julien Grall
2016-11-08 23:54   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 13/24] ARM: vITS: handle CLEAR command Andre Przywara
2016-11-04 15:48   ` Julien Grall
2016-11-09  0:39   ` Stefano Stabellini
2016-11-09 13:32     ` Julien Grall
2016-09-28 18:24 ` [RFC PATCH 14/24] ARM: vITS: handle INT command Andre Przywara
2016-11-09  0:42   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 15/24] ARM: vITS: handle MAPC command Andre Przywara
2016-11-09  0:48   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 16/24] ARM: vITS: handle MAPD command Andre Przywara
2016-11-09  0:54   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 17/24] ARM: vITS: handle MAPTI command Andre Przywara
2016-11-09  1:07   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 18/24] ARM: vITS: handle MOVI command Andre Przywara
2016-11-09  1:13   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 19/24] ARM: vITS: handle DISCARD command Andre Przywara
2016-11-09  1:28   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 20/24] ARM: vITS: handle INV command Andre Przywara
2016-11-09  1:49   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 21/24] ARM: vITS: handle INVALL command Andre Przywara
2016-10-24 15:32   ` Vijay Kilari
2016-11-04  9:22     ` Andre Przywara
2016-11-10  0:21       ` Stefano Stabellini [this message]
2016-11-10 11:57         ` Julien Grall
2016-11-10 20:42           ` Stefano Stabellini
2016-11-11 15:53             ` Julien Grall
2016-11-11 20:31               ` Stefano Stabellini
2016-11-18 18:39                 ` Stefano Stabellini
2016-11-25 16:10                   ` Julien Grall
2016-12-01  1:19                     ` Stefano Stabellini
2016-12-02 16:18                       ` Andre Przywara
2016-12-03  0:46                         ` Stefano Stabellini
2016-12-05 13:36                           ` Julien Grall
2016-12-05 19:51                             ` Stefano Stabellini
2016-12-06 15:56                               ` Julien Grall
2016-12-06 19:36                                 ` Stefano Stabellini
2016-12-06 21:32                                   ` Dario Faggioli
2016-12-06 21:53                                     ` Stefano Stabellini
2016-12-06 22:01                                       ` Stefano Stabellini
2016-12-06 22:12                                         ` Dario Faggioli
2016-12-06 23:13                                         ` Julien Grall
2016-12-07 20:20                                           ` Stefano Stabellini
2016-12-09 18:01                                             ` Julien Grall
2016-12-09 20:13                                               ` Stefano Stabellini
2016-12-09 18:07                                             ` Andre Przywara
2016-12-09 20:18                                               ` Stefano Stabellini
2016-12-14  2:39                                                 ` George Dunlap
2016-12-16  1:30                                                   ` Dario Faggioli
2016-12-06 22:39                                       ` Dario Faggioli
2016-12-06 23:24                                         ` Julien Grall
2016-12-07  0:17                                           ` Dario Faggioli
2016-12-07 20:21                                         ` Stefano Stabellini
2016-12-09 10:14                                           ` Dario Faggioli
2016-12-06 21:36                               ` Dario Faggioli
2016-12-09 19:00                           ` Andre Przywara
2016-12-10  0:30                             ` Stefano Stabellini
2016-12-12 10:38                               ` Andre Przywara
2016-12-14  0:38                                 ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 22/24] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2016-11-10  0:38   ` Stefano Stabellini
2016-09-28 18:24 ` [RFC PATCH 23/24] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2016-09-28 18:24 ` [RFC PATCH 24/24] ARM: vGIC: advertising LPI support Andre Przywara
2016-11-10  0:49   ` Stefano Stabellini
2016-11-10 11:22     ` Julien Grall
2016-11-02 13:56 ` [RFC PATCH 00/24] [FOR 4.9] arm64: Dom0 ITS emulation Julien Grall

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