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From: Stefano Stabellini <sstabellini@kernel.org>
To: Julien Grall <julien.grall@linaro.org>
Cc: "Edgar Iglesias (edgar.iglesias@xilinx.com)"
	<edgar.iglesias@xilinx.com>,
	"Stefano Stabellini" <sstabellini@kernel.org>,
	"Wei Chen" <Wei.Chen@arm.com>,
	"Steve Capper" <Steve.Capper@arm.com>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Jiandi An" <anjiandi@codeaurora.org>,
	"Punit Agrawal" <punit.agrawal@arm.com>,
	alistair.francis@xilinx.com,
	"Shanker Donthineni" <shankerd@codeaurora.org>,
	xen-devel <xen-devel@lists.xenproject.org>,
	"manish.jaggi@caviumnetworks.com"
	<manish.jaggi@caviumnetworks.com>,
	"Campbell Sean" <scampbel@codeaurora.org>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [early RFC] ARM PCI Passthrough design document
Date: Thu, 2 Feb 2017 15:06:57 -0800 (PST)	[thread overview]
Message-ID: <alpine.DEB.2.10.1702021506180.17946@sstabellini-ThinkPad-X260> (raw)
In-Reply-To: <6b279b84-aa0f-7557-390e-dc66db90036f@linaro.org>

[-- Attachment #1: Type: TEXT/PLAIN, Size: 5066 bytes --]

On Thu, 2 Feb 2017, Julien Grall wrote:
> Hi Roger,
> 
> On 01/02/17 10:55, Roger Pau Monné wrote:
> > On Wed, Jan 25, 2017 at 06:53:20PM +0000, Julien Grall wrote:
> > > Hi Stefano,
> > > 
> > > On 24/01/17 20:07, Stefano Stabellini wrote:
> > > > On Tue, 24 Jan 2017, Julien Grall wrote:
> > > > > > > whilst for Device Tree the segment number is not available.
> > > > > > > 
> > > > > > > So Xen needs to rely on DOM0 to discover the host bridges and
> > > > > > > notify Xen
> > > > > > > with all the relevant informations. This will be done via a new
> > > > > > > hypercall
> > > > > > > PHYSDEVOP_pci_host_bridge_add. The layout of the structure will
> > > > > > > be:
> > > > > > 
> > > > > > I understand that the main purpose of this hypercall is to get Xen
> > > > > > and Dom0
> > > > > > to
> > > > > > agree on the segment numbers, but why is it necessary? If Dom0 has
> > > > > > an
> > > > > > emulated contoller like any other guest, do we care what segment
> > > > > > numbers
> > > > > > Dom0 will use?
> > > > > 
> > > > > I was not planning to have a emulated controller for DOM0. The
> > > > > physical one is
> > > > > not necessarily ECAM compliant so we would have to either emulate the
> > > > > physical
> > > > > one (meaning multiple different emulation) or an ECAM compliant.
> > > > > 
> > > > > The latter is not possible because you don't know if there is enough
> > > > > free MMIO
> > > > > space for the emulation.
> > > > > 
> > > > > In the case on ARM, I don't see much the point to emulate the host
> > > > > bridge for
> > > > > DOM0. The only thing we need in Xen is to access the configuration
> > > > > space, we
> > > > > don't have about driving the host bridge. So I would let DOM0 dealing
> > > > > with
> > > > > that.
> > > > > 
> > > > > Also, I don't see any reason for ARM to trap DOM0 configuration space
> > > > > access.
> > > > > The MSI will be configured using the interrupt controller and it is a
> > > > > trusted
> > > > > Domain.
> > > > 
> > > > These last you sentences raise a lot of questions. Maybe I am missing
> > > > something. You might want to clarify the strategy for Dom0 and DomUs,
> > > > and how they differ, in the next version of the doc.
> > > > 
> > > > At some point you wrote "Instantiation of a specific driver for the host
> > > > controller can be easily done if Xen has the information to detect it.
> > > > However, those drivers may require resources described in ASL." Does it
> > > > mean you plan to drive the physical host bridge from Xen and Dom0
> > > > simultaneously?
> > > 
> > > I may miss some bits, so feel free to correct me if I am wrong.
> > > 
> > > My understanding is host bridge can be divided in 2 parts:
> > > 	- Initialization of the host bridge
> > > 	- Access the configuration space
> > > 
> > > For generic host bridge, the initialization is inexistent. However some
> > > host
> > > bridge (e.g xgene, xilinx) may require some specific setup and also
> > > configuring clocks. Given that Xen only requires to access the
> > > configuration
> > > space, I was thinking to let DOM0 initialization the host bridge. This
> > > would
> > > avoid to import a lot of code in Xen, however this means that we need to
> > > know when the host bridge has been initialized before accessing the
> > > configuration space.
> > 
> > Can the bridge be initialized without Dom0 having access to the ECAM area?
> > If
> > that's possible I would do:
> > 
> > 1. Dom0 initializes the bridge (whatever that involves).
> > 2. Dom0 calls PHYSDEVOP_pci_mmcfg_reserved to register the bridge with Xen:
> >  2.1 Xen scans the bridge and detects the devices.
> >  2.2 Xen maps the ECAM area into Dom0 stage-2 p2m.
> > 3. Dom0 scans the bridge &c (whatever is done on native).
> 
> As Stefano suggested, we should try to initialize the hostbridge in Xen when
> possible. This will avoid a split interaction and our hair too :).
> 
> I am looking at different hostbridge to see how much code would be required in
> Xen to handle them. I think the Xilinx root-complex is an easy one (see the
> discussion in [1]) and it is manageable to get the code in Xen.
> 
> But some are much more complex, for instance the R-Car (see discussion in [2])
> requires clocks, use a specific way to access configuration space and has the
> MSI controller integrated in the root complex. This would require some work
> with DOM0. I will mention the problem in the design document but not going to
> address it at the moment (too complex). Although, we would have to support it
> at some point as the root complex is used in automotive board (see [3]).
> 
> For now I will address:
> 	- ECAM compliant/ECAM like root complex
> 	- Root complex with simple initialization
> 
> For DT, I would have a fallback on mapping the root complex to DOM0 if we
> don't support it. So DOM0 could still use PCI.
> 
> For ACPI, I am expecting all the platform ECAM compliant or require few
> quirks. So I would mandate the support of the root complex in Xen in order to
> get PCI supported.

Sound good. Ack.

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  reply	other threads:[~2017-02-02 23:07 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-29 14:04 [early RFC] ARM PCI Passthrough design document Julien Grall
2016-12-29 14:16 ` Jaggi, Manish
2016-12-29 17:03   ` Julien Grall
2016-12-29 18:41     ` Jaggi, Manish
2016-12-29 19:38       ` Julien Grall
2017-01-04  0:24 ` Stefano Stabellini
2017-01-24 14:28   ` Julien Grall
2017-01-24 20:07     ` Stefano Stabellini
2017-01-25 11:21       ` Roger Pau Monné
2017-01-25 18:53       ` Julien Grall
2017-01-31 16:53         ` Edgar E. Iglesias
2017-01-31 17:09           ` Julien Grall
2017-01-31 19:06             ` Edgar E. Iglesias
2017-01-31 22:08               ` Stefano Stabellini
2017-02-01 19:04               ` Julien Grall
2017-02-01 19:31                 ` Stefano Stabellini
2017-02-01 20:24                   ` Julien Grall
2017-02-02 15:33                 ` Edgar E. Iglesias
2017-02-02 23:12                   ` Stefano Stabellini
2017-02-02 23:44                     ` Edgar E. Iglesias
2017-02-10  1:01                       ` Stefano Stabellini
2017-02-13 15:39                         ` Julien Grall
2017-02-13 19:59                           ` Stefano Stabellini
2017-02-14 17:21                             ` Julien Grall
2017-02-14 18:20                               ` Stefano Stabellini
2017-02-14 20:18                                 ` Julien Grall
2017-02-13 15:35                   ` Julien Grall
2017-02-22  4:03                     ` Edgar E. Iglesias
2017-02-23 16:47                       ` Julien Grall
2017-03-02 21:13                         ` Edgar E. Iglesias
2017-02-02 15:40                 ` Roger Pau Monné
2017-02-13 16:22                   ` Julien Grall
2017-01-31 21:58         ` Stefano Stabellini
2017-02-01 20:12           ` Julien Grall
2017-02-01 10:55         ` Roger Pau Monné
2017-02-01 18:50           ` Stefano Stabellini
2017-02-10  9:48             ` Roger Pau Monné
2017-02-10 10:11               ` Paul Durrant
2017-02-10 12:57                 ` Roger Pau Monne
2017-02-10 13:02                   ` Paul Durrant
2017-02-10 21:04                     ` Stefano Stabellini
2017-02-02 12:38           ` Julien Grall
2017-02-02 23:06             ` Stefano Stabellini [this message]
2017-03-08 19:06               ` Julien Grall
2017-03-08 19:12                 ` Konrad Rzeszutek Wilk
2017-03-08 19:55                   ` Stefano Stabellini
2017-03-08 21:51                     ` Julien Grall
2017-03-09  2:59                   ` Roger Pau Monné
2017-03-09 11:17                     ` Konrad Rzeszutek Wilk
2017-03-09 13:26                       ` Julien Grall
2017-03-10  0:29                         ` Konrad Rzeszutek Wilk
2017-03-10  3:23                           ` Roger Pau Monné
2017-03-10 15:28                             ` Konrad Rzeszutek Wilk
2017-03-15 12:07                               ` Roger Pau Monné
2017-03-15 12:42                                 ` Konrad Rzeszutek Wilk
2017-03-15 12:56                                   ` Roger Pau Monné
2017-03-15 15:11                                     ` Venu Busireddy
2017-03-15 16:38                                       ` Roger Pau Monn?
2017-03-15 16:54                                         ` Venu Busireddy
2017-03-15 17:00                                           ` Roger Pau Monn?
2017-05-03 12:38                                             ` Julien Grall
2017-05-03 12:53                                         ` Julien Grall
2017-01-25  4:23     ` Manish Jaggi
2017-01-06 15:12 ` Roger Pau Monné
2017-01-06 21:16   ` Stefano Stabellini
2017-01-24 17:17   ` Julien Grall
2017-01-25 11:42     ` Roger Pau Monné
2017-01-31 15:59       ` Julien Grall
2017-01-31 22:03         ` Stefano Stabellini
2017-02-01 10:28           ` Roger Pau Monné
2017-02-01 18:45             ` Stefano Stabellini
2017-01-06 16:27 ` Edgar E. Iglesias
2017-01-06 21:12   ` Stefano Stabellini
2017-01-09 17:50     ` Edgar E. Iglesias
2017-01-19  5:09 ` Manish Jaggi
2017-01-24 17:43   ` Julien Grall
2017-01-25  4:37     ` Manish Jaggi
2017-01-25 15:25       ` Julien Grall
2017-01-30  7:41         ` Manish Jaggi
2017-01-31 13:33           ` Julien Grall
2017-05-19  6:38 ` Goel, Sameer
2017-05-19 16:48   ` Julien Grall

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