Re: [early RFC] ARM PCI Passthrough design document

From: Julien Grall <julien.grall@linaro.org>
To: "Jaggi, Manish" <Manish.Jaggi@cavium.com>,
	xen-devel <xen-devel@lists.xenproject.org>,
	Stefano Stabellini <sstabellini@kernel.org>
Cc: "Edgar Iglesias (edgar.iglesias@xilinx.com)"
	<edgar.iglesias@xilinx.com>,
	"Kapoor, Prasun" <Prasun.Kapoor@cavium.com>,
	"Nair, Jayachandran" <Jayachandran.Nair@cavium.com>,
	"Wei Chen" <Wei.Chen@arm.com>,
	"Campbell Sean" <scampbel@codeaurora.org>,
	"Jiandi An" <anjiandi@codeaurora.org>,
	"Punit Agrawal" <punit.agrawal@arm.com>,
	"alistair.francis@xilinx.com" <alistair.francis@xilinx.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	"Shanker Donthineni" <shankerd@codeaurora.org>,
	"Steve Capper" <Steve.Capper@arm.com>
Subject: Re: [early RFC] ARM PCI Passthrough design document
Date: Thu, 29 Dec 2016 17:03:43 +0000	[thread overview]
Message-ID: <f9b54c1f-7006-4bd8-2128-92d1e0f13b5e@linaro.org> (raw)
In-Reply-To: <BY1PR0701MB159447C143E0E7533F2BF3CAEC6B0@BY1PR0701MB1594.namprd07.prod.outlook.com>

On 29/12/2016 14:16, Jaggi, Manish wrote:
> Hi Julien,

Hello Manish,

>
> Wouldnt it be better if the design proposed by cavium be extended by
> discussions and comeup with an agreeable to all design.

As I mentioned in my mail, this design is a completely different 
approach (emulation vs PV). This is a distinct proposal because 
emulation vs PV impact a lot the overall design.

> I didnt see any comments on the one I posted.

Whilst I haven't commented on your design document, I have read 
carefully your last version of the design. But even after 5 version and 
nearly 2 years of work this is still DT and ITS focused. No words about 
interrupt legacy, no words about ACPI... And as you can see in this 
draft, ACPI will have an impact on the overall.

Some part of this design document is based on all the discussion we had 
over last year on your design. However, most of the comments have not 
been addressed despite the fact they have been repeated multiple time by 
various reviewers. For example the bus number has not been added 
PHYSDEVOP_pci_host_bridge_add as requested in one of the first version 
of the design.

> Putting an altogether new design without commenting on the one posted a
> month back, might not be a right approach

Speaking for myself, my bandwidth is limited and I am going to 
prioritize review on series where my comments have been addressed.

Regards,

-- 
Julien Grall

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