* [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo
@ 2018-04-08 9:35 David Wang
2018-04-17 10:19 ` Thomas Gleixner
0 siblings, 1 reply; 4+ messages in thread
From: David Wang @ 2018-04-08 9:35 UTC (permalink / raw)
To: tglx, mingo, hpa, mingo, grehkg, x86, linux-kernel
Cc: brucechang, cooperyan, qiyuanwang, benjaminpan, lukelin, timguo,
David Wang
We add this patch to show correct HW features(arch_perfmon, tpr_shadow,
vnmi, flexpriority, ept and vpid) when user execute "cat /proc/cpuinfo".
Signed-off-by: David Wang <davidwang@zhaoxin.com>
---
arch/x86/kernel/cpu/centaur.c | 49 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index e5ec0f1..969fb8f 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -112,6 +112,44 @@ static void early_init_centaur(struct cpuinfo_x86 *c)
}
}
+static void centaur_detect_vmx_virtcap(struct cpuinfo_x86 *c)
+{
+#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW 0x00200000
+#define X86_VMX_FEATURE_PROC_CTLS_VNMI 0x00400000
+#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS 0x80000000
+#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC 0x00000001
+#define X86_VMX_FEATURE_PROC_CTLS2_EPT 0x00000002
+#define X86_VMX_FEATURE_PROC_CTLS2_VPID 0x00000020
+
+ u32 vmx_msr_low, vmx_msr_high, msr_ctl, msr_ctl2;
+
+ clear_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
+ clear_cpu_cap(c, X86_FEATURE_VNMI);
+ clear_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
+ clear_cpu_cap(c, X86_FEATURE_EPT);
+ clear_cpu_cap(c, X86_FEATURE_VPID);
+
+ rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
+ msr_ctl = vmx_msr_high | vmx_msr_low;
+
+ if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW)
+ set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
+ if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_VNMI)
+ set_cpu_cap(c, X86_FEATURE_VNMI);
+ if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS) {
+ rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
+ vmx_msr_low, vmx_msr_high);
+ msr_ctl2 = vmx_msr_high | vmx_msr_low;
+ if ((msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC) &&
+ (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW))
+ set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
+ if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_EPT)
+ set_cpu_cap(c, X86_FEATURE_EPT);
+ if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VPID)
+ set_cpu_cap(c, X86_FEATURE_VPID);
+ }
+}
+
static void init_centaur(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_X86_32
@@ -128,6 +166,14 @@ static void init_centaur(struct cpuinfo_x86 *c)
clear_cpu_cap(c, 0*32+31);
#endif
early_init_centaur(c);
+
+ if (c->cpuid_level > 9) {
+ unsigned eax = cpuid_eax(10);
+ /* Check for version and the number of counters */
+ if ((eax & 0xff) && (((eax >> 8) & 0xff) > 1))
+ set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
+ }
+
switch (c->x86) {
#ifdef CONFIG_X86_32
case 5:
@@ -199,6 +245,9 @@ static void init_centaur(struct cpuinfo_x86 *c)
#ifdef CONFIG_X86_64
set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
#endif
+
+ if (cpu_has(c, X86_FEATURE_VMX))
+ centaur_detect_vmx_virtcap(c);
}
#ifdef CONFIG_X86_32
--
1.9.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo
2018-04-08 9:35 [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo David Wang
@ 2018-04-17 10:19 ` Thomas Gleixner
0 siblings, 0 replies; 4+ messages in thread
From: Thomas Gleixner @ 2018-04-17 10:19 UTC (permalink / raw)
To: David Wang
Cc: mingo, hpa, mingo, grehkg, x86, linux-kernel, brucechang,
cooperyan, qiyuanwang, benjaminpan, lukelin, timguo
On Sun, 8 Apr 2018, David Wang wrote:
> We add this patch to show correct HW features(arch_perfmon, tpr_shadow,
> vnmi, flexpriority, ept and vpid) when user execute "cat /proc/cpuinfo".
See the other mail vs. the changelog.
>
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
> arch/x86/kernel/cpu/centaur.c | 49 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
> index e5ec0f1..969fb8f 100644
> --- a/arch/x86/kernel/cpu/centaur.c
> +++ b/arch/x86/kernel/cpu/centaur.c
> @@ -112,6 +112,44 @@ static void early_init_centaur(struct cpuinfo_x86 *c)
> }
> }
>
> +static void centaur_detect_vmx_virtcap(struct cpuinfo_x86 *c)
> +{
> +#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW 0x00200000
> +#define X86_VMX_FEATURE_PROC_CTLS_VNMI 0x00400000
> +#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS 0x80000000
> +#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC 0x00000001
> +#define X86_VMX_FEATURE_PROC_CTLS2_EPT 0x00000002
> +#define X86_VMX_FEATURE_PROC_CTLS2_VPID 0x00000020
Please move the defines outside the function. This is horrible to read,
> +
> + u32 vmx_msr_low, vmx_msr_high, msr_ctl, msr_ctl2;
> +
> + clear_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
> + clear_cpu_cap(c, X86_FEATURE_VNMI);
> + clear_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
> + clear_cpu_cap(c, X86_FEATURE_EPT);
> + clear_cpu_cap(c, X86_FEATURE_VPID);
Why are you clearing the capabilities? They are cleared at boot time.
> + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
> + msr_ctl = vmx_msr_high | vmx_msr_low;
> +
> + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW)
> + set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
> + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_VNMI)
> + set_cpu_cap(c, X86_FEATURE_VNMI);
> + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS) {
> + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
> + vmx_msr_low, vmx_msr_high);
> + msr_ctl2 = vmx_msr_high | vmx_msr_low;
> + if ((msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC) &&
> + (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW))
> + set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
> + if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_EPT)
> + set_cpu_cap(c, X86_FEATURE_EPT);
> + if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VPID)
> + set_cpu_cap(c, X86_FEATURE_VPID);
> + }
> +}
> +
> static void init_centaur(struct cpuinfo_x86 *c)
> {
> #ifdef CONFIG_X86_32
> @@ -128,6 +166,14 @@ static void init_centaur(struct cpuinfo_x86 *c)
> clear_cpu_cap(c, 0*32+31);
> #endif
> early_init_centaur(c);
> +
> + if (c->cpuid_level > 9) {
> + unsigned eax = cpuid_eax(10);
Missing newline between variable declaration and code. checkpatch.pl should
have told you that.
> + /* Check for version and the number of counters */
> + if ((eax & 0xff) && (((eax >> 8) & 0xff) > 1))
Magic constants and a comment which does not explain how the check works.
> + set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
Thanks,
tglx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo
@ 2018-04-18 8:49 David Wang
0 siblings, 0 replies; 4+ messages in thread
From: David Wang @ 2018-04-18 8:49 UTC (permalink / raw)
To: 'Thomas Gleixner'
Cc: mingo, hpa, mingo, grehkg, x86, linux-kernel, brucechang,
cooperyan, qiyuanwang, benjaminpan, lukelin, timguo
> -----Original Mail-----
> Sender: Thomas Gleixner [mailto:tglx@linutronix.de]
> Time: 2018/4/17 18:19
> Receiver: David Wang <davidwang@zhaoxin.com>
> CC: mingo@redhat.com; hpa@zytor.com; mingo@kernel.org;
> grehkg@linuxfoundation.org; x86@kernel.org; linux-
> kernel@vger.kernel.org; brucechang@via-alliance.com;
> cooperyan@zhaoxin.com; qiyuanwang@zhaoxin.com;
> benjaminpan@viatech.com; lukelin@viacpu.com; timguo@zhaoxin.com
> Subject: Re: [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo
>
> On Sun, 8 Apr 2018, David Wang wrote:
>
> > We add this patch to show correct HW features(arch_perfmon,
> > tpr_shadow, vnmi, flexpriority, ept and vpid) when user execute "cat
> /proc/cpuinfo".
>
> See the other mail vs. the changelog.
>
OK. Thanks.
> >
> > Signed-off-by: David Wang <davidwang@zhaoxin.com>
> > ---
> > arch/x86/kernel/cpu/centaur.c | 49
> > +++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> >
> > diff --git a/arch/x86/kernel/cpu/centaur.c
> > b/arch/x86/kernel/cpu/centaur.c index e5ec0f1..969fb8f 100644
> > --- a/arch/x86/kernel/cpu/centaur.c
> > +++ b/arch/x86/kernel/cpu/centaur.c
> > @@ -112,6 +112,44 @@ static void early_init_centaur(struct cpuinfo_x86
> *c)
> > }
> > }
> >
> > +static void centaur_detect_vmx_virtcap(struct cpuinfo_x86 *c) {
> > +#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW 0x00200000
> > +#define X86_VMX_FEATURE_PROC_CTLS_VNMI 0x00400000
> > +#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS 0x80000000
> > +#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC 0x00000001
> > +#define X86_VMX_FEATURE_PROC_CTLS2_EPT 0x00000002
> > +#define X86_VMX_FEATURE_PROC_CTLS2_VPID 0x00000020
>
> Please move the defines outside the function. This is horrible to read,
OK.
>
> > +
> > + u32 vmx_msr_low, vmx_msr_high, msr_ctl, msr_ctl2;
> > +
> > + clear_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
> > + clear_cpu_cap(c, X86_FEATURE_VNMI);
> > + clear_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
> > + clear_cpu_cap(c, X86_FEATURE_EPT);
> > + clear_cpu_cap(c, X86_FEATURE_VPID);
>
> Why are you clearing the capabilities? They are cleared at boot time.
>
OK. It's really useless.
> > + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low,
> vmx_msr_high);
> > + msr_ctl = vmx_msr_high | vmx_msr_low;
> > +
> > + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW)
> > + set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
> > + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_VNMI)
> > + set_cpu_cap(c, X86_FEATURE_VNMI);
> > + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS) {
> > + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
> > + vmx_msr_low, vmx_msr_high);
> > + msr_ctl2 = vmx_msr_high | vmx_msr_low;
> > + if ((msr_ctl2 &
> X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC) &&
> > + (msr_ctl &
> X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW))
> > + set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
> > + if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_EPT)
> > + set_cpu_cap(c, X86_FEATURE_EPT);
> > + if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VPID)
> > + set_cpu_cap(c, X86_FEATURE_VPID);
> > + }
> > +}
> > +
> > static void init_centaur(struct cpuinfo_x86 *c) { #ifdef
> > CONFIG_X86_32 @@ -128,6 +166,14 @@ static void init_centaur(struct
> > cpuinfo_x86 *c)
> > clear_cpu_cap(c, 0*32+31);
> > #endif
> > early_init_centaur(c);
> > +
> > + if (c->cpuid_level > 9) {
> > + unsigned eax = cpuid_eax(10);
>
> Missing newline between variable declaration and code. checkpatch.pl
> should have told you that.
>
OK.
> > + /* Check for version and the number of counters */
> > + if ((eax & 0xff) && (((eax >> 8) & 0xff) > 1))
>
> Magic constants and a comment which does not explain how the check
> works.
>
OK. I will explain more detail in the comments.
> > + set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
>
> Thanks,
>
> tglx
Thanks,
---
David
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo
@ 2018-04-09 5:19 David Wang
0 siblings, 0 replies; 4+ messages in thread
From: David Wang @ 2018-04-09 5:19 UTC (permalink / raw)
To: tglx, mingo, hpa, mingo, gregkh, x86, linux-kernel
Cc: brucechang, cooperyan, qiyuanwang, benjaminpan, lukelin, timguo
> -----邮件原件-----
> 发件人: David Wang [mailto:davidwang@zhaoxin.com]
> 发送时间: 2018年4月8日 17:36
> 收件人: tglx@linutronix.de; mingo@redhat.com; hpa@zytor.com;
> mingo@kernel.org; grehkg@linuxfoundation.org; x86@kernel.org;
> linux-kernel@vger.kernel.org
> 抄送: brucechang@via-alliance.com; cooperyan@zhaoxin.com;
> qiyuanwang@zhaoxin.com; benjaminpan@viatech.com; lukelin@viacpu.com;
> timguo@zhaoxin.com; David Wang <davidwang@zhaoxin.com>
> 主题: [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo
>
> We add this patch to show correct HW features(arch_perfmon, tpr_shadow,
> vnmi, flexpriority, ept and vpid) when user execute "cat /proc/cpuinfo".
>
> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> ---
> arch/x86/kernel/cpu/centaur.c | 49
> +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
> index e5ec0f1..969fb8f 100644
> --- a/arch/x86/kernel/cpu/centaur.c
> +++ b/arch/x86/kernel/cpu/centaur.c
> @@ -112,6 +112,44 @@ static void early_init_centaur(struct cpuinfo_x86 *c)
> }
> }
>
> +static void centaur_detect_vmx_virtcap(struct cpuinfo_x86 *c) {
> +#define X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW 0x00200000
> +#define X86_VMX_FEATURE_PROC_CTLS_VNMI 0x00400000
> +#define X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS 0x80000000
> +#define X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC 0x00000001
> +#define X86_VMX_FEATURE_PROC_CTLS2_EPT 0x00000002
> +#define X86_VMX_FEATURE_PROC_CTLS2_VPID 0x00000020
> +
> + u32 vmx_msr_low, vmx_msr_high, msr_ctl, msr_ctl2;
> +
> + clear_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
> + clear_cpu_cap(c, X86_FEATURE_VNMI);
> + clear_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
> + clear_cpu_cap(c, X86_FEATURE_EPT);
> + clear_cpu_cap(c, X86_FEATURE_VPID);
> +
> + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
> + msr_ctl = vmx_msr_high | vmx_msr_low;
> +
> + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW)
> + set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
> + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_VNMI)
> + set_cpu_cap(c, X86_FEATURE_VNMI);
> + if (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_2ND_CTLS) {
> + rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
> + vmx_msr_low, vmx_msr_high);
> + msr_ctl2 = vmx_msr_high | vmx_msr_low;
> + if ((msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VIRT_APIC) &&
> + (msr_ctl & X86_VMX_FEATURE_PROC_CTLS_TPR_SHADOW))
> + set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
> + if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_EPT)
> + set_cpu_cap(c, X86_FEATURE_EPT);
> + if (msr_ctl2 & X86_VMX_FEATURE_PROC_CTLS2_VPID)
> + set_cpu_cap(c, X86_FEATURE_VPID);
> + }
> +}
> +
> static void init_centaur(struct cpuinfo_x86 *c) { #ifdef CONFIG_X86_32
> @@ -128,6 +166,14 @@ static void init_centaur(struct cpuinfo_x86 *c)
> clear_cpu_cap(c, 0*32+31);
> #endif
> early_init_centaur(c);
> +
> + if (c->cpuid_level > 9) {
> + unsigned eax = cpuid_eax(10);
> + /* Check for version and the number of counters */
> + if ((eax & 0xff) && (((eax >> 8) & 0xff) > 1))
> + set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON);
> + }
> +
> switch (c->x86) {
> #ifdef CONFIG_X86_32
> case 5:
> @@ -199,6 +245,9 @@ static void init_centaur(struct cpuinfo_x86 *c)
#ifdef
> CONFIG_X86_64
> set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); #endif
> +
> + if (cpu_has(c, X86_FEATURE_VMX))
> + centaur_detect_vmx_virtcap(c);
> }
>
> #ifdef CONFIG_X86_32
> --
> 1.9.1
Sorry to send to wrong email address.
---
David
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-04-18 8:50 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-08 9:35 [PATCH] x86/Centaur: show more HW features in /proc/cpuinfo David Wang
2018-04-17 10:19 ` Thomas Gleixner
2018-04-09 5:19 David Wang
2018-04-18 8:49 David Wang
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.