From: Paul Walmsley <paul.walmsley@sifive.com> To: Greentime Hu <greentime.hu@sifive.com> Cc: green.hu@gmail.com, greentime@kernel.org, palmer@dabbelt.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, schwab@suse.de, anup@brainfault.org Subject: Re: [PATCH v3] riscv: make sure the cores stay looping in .Lsecondary_park Date: Thu, 9 Jan 2020 11:27:34 -0800 (PST) [thread overview] Message-ID: <alpine.DEB.2.21.9999.2001091126480.135239@viisi.sifive.com> (raw) In-Reply-To: <20200109031516.29639-1-greentime.hu@sifive.com> On Thu, 9 Jan 2020, Greentime Hu wrote: > The code in secondary_park is currently placed in the .init section. The > kernel reclaims and clears this code when it finishes booting. That > causes the cores parked in it to go to somewhere unpredictable, so we > move this function out of init to make sure the cores stay looping there. > > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > Reviewed-by: Anup Patel <anup@brainfault.org> Thanks, the following is what's been queued for v5.5-rc. - Paul From: Greentime Hu <greentime.hu@sifive.com> Date: Thu, 9 Jan 2020 11:15:16 +0800 Subject: [PATCH] riscv: make sure the cores stay looping in .Lsecondary_park The code in secondary_park is currently placed in the .init section. The kernel reclaims and clears this code when it finishes booting. That causes the cores parked in it to go to somewhere unpredictable, so we move this function out of init to make sure the cores stay looping there. Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Cc: Andreas Schwab <schwab@suse.de> Cc: stable@vger.kernel.org Fixes: 76d2a0493a17d ("RISC-V: Init and Halt Code") Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> --- arch/riscv/kernel/head.S | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 797802c73dee..c9cc44ef7184 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -209,11 +209,6 @@ relocate: tail smp_callin #endif -.align 2 -.Lsecondary_park: - /* We lack SMP support or have too many harts, so park this hart */ - wfi - j .Lsecondary_park END(_start) #ifdef CONFIG_RISCV_M_MODE @@ -295,6 +290,13 @@ ENTRY(reset_regs) END(reset_regs) #endif /* CONFIG_RISCV_M_MODE */ +.section ".text", "ax",@progbits +.align 2 +.Lsecondary_park: + /* We lack SMP support or have too many harts, so park this hart */ + wfi + j .Lsecondary_park + __PAGE_ALIGNED_BSS /* Empty zero page */ .balign PAGE_SIZE -- 2.25.0.rc2
WARNING: multiple messages have this Message-ID (diff)
From: Paul Walmsley <paul.walmsley@sifive.com> To: Greentime Hu <greentime.hu@sifive.com> Cc: schwab@suse.de, linux-kernel@vger.kernel.org, palmer@dabbelt.com, green.hu@gmail.com, anup@brainfault.org, greentime@kernel.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v3] riscv: make sure the cores stay looping in .Lsecondary_park Date: Thu, 9 Jan 2020 11:27:34 -0800 (PST) [thread overview] Message-ID: <alpine.DEB.2.21.9999.2001091126480.135239@viisi.sifive.com> (raw) In-Reply-To: <20200109031516.29639-1-greentime.hu@sifive.com> On Thu, 9 Jan 2020, Greentime Hu wrote: > The code in secondary_park is currently placed in the .init section. The > kernel reclaims and clears this code when it finishes booting. That > causes the cores parked in it to go to somewhere unpredictable, so we > move this function out of init to make sure the cores stay looping there. > > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > Reviewed-by: Anup Patel <anup@brainfault.org> Thanks, the following is what's been queued for v5.5-rc. - Paul From: Greentime Hu <greentime.hu@sifive.com> Date: Thu, 9 Jan 2020 11:15:16 +0800 Subject: [PATCH] riscv: make sure the cores stay looping in .Lsecondary_park The code in secondary_park is currently placed in the .init section. The kernel reclaims and clears this code when it finishes booting. That causes the cores parked in it to go to somewhere unpredictable, so we move this function out of init to make sure the cores stay looping there. Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Cc: Andreas Schwab <schwab@suse.de> Cc: stable@vger.kernel.org Fixes: 76d2a0493a17d ("RISC-V: Init and Halt Code") Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> --- arch/riscv/kernel/head.S | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 797802c73dee..c9cc44ef7184 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -209,11 +209,6 @@ relocate: tail smp_callin #endif -.align 2 -.Lsecondary_park: - /* We lack SMP support or have too many harts, so park this hart */ - wfi - j .Lsecondary_park END(_start) #ifdef CONFIG_RISCV_M_MODE @@ -295,6 +290,13 @@ ENTRY(reset_regs) END(reset_regs) #endif /* CONFIG_RISCV_M_MODE */ +.section ".text", "ax",@progbits +.align 2 +.Lsecondary_park: + /* We lack SMP support or have too many harts, so park this hart */ + wfi + j .Lsecondary_park + __PAGE_ALIGNED_BSS /* Empty zero page */ .balign PAGE_SIZE -- 2.25.0.rc2
next prev parent reply other threads:[~2020-01-09 19:27 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-09 3:15 [PATCH v3] riscv: make sure the cores stay looping in .Lsecondary_park Greentime Hu 2020-01-09 19:27 ` Paul Walmsley [this message] 2020-01-09 19:27 ` Paul Walmsley 2020-01-12 18:12 ` Paul Walmsley 2020-01-12 18:12 ` Paul Walmsley 2020-01-14 3:48 ` Greentime Hu 2020-01-14 3:48 ` Greentime Hu 2020-01-14 22:55 ` Paul Walmsley 2020-01-14 22:55 ` Paul Walmsley 2020-01-15 7:06 ` Greentime Hu 2020-01-15 7:06 ` Greentime Hu
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