Re: [PATCH v2 1/2] xen/arm: smccc: add support for SMCCCv1.2 extended input/output registers

[Stefano Stabellini <sstabellini@kernel.org>]

On Sat, 11 Jun 2022, Julien Grall wrote:
> Hi Stefano,
> 
> On 11/06/2022 01:41, Stefano Stabellini wrote:
> > On Thu, 9 Jun 2022, Jens Wiklander wrote:
> > > +    /* Store the registers x0 - x17 into the result structure */
> > > +    stp	x0, x1, [x19, #0]
> > > +    stp	x2, x3, [x19, #16]
> > > +    stp	x4, x5, [x19, #32]
> > > +    stp	x6, x7, [x19, #48]
> > > +    stp	x8, x9, [x19, #64]
> > > +    stp	x10, x11, [x19, #80]
> > > +    stp	x12, x13, [x19, #96]
> > > +    stp	x14, x15, [x19, #112]
> > > +    stp	x16, x17, [x19, #128]
> > 
> > I noticed that in the original commit the offsets are declared as
> > ARM_SMCCC_1_2_REGS_X0_OFFS, etc. In Xen we could add them to
> > xen/arch/arm/arm64/asm-offsets.c given that they are only used in asm.
> > 
> > That said, there isn't a huge value in declaring them given that they
> > are always read and written in order and there is nothing else in the
> > struct, so I am fine either way.
> 
> While we don't support big-endian in Xen (yet?), the offsets will be inverted.
> 
> Furthermore, I prefer to avoid open-coded value (in particular when they are
> related to offset). They are unlikely going to change, but at least we have
> the compiler that will compute them for us (so less chance for a problem).

I am OK with that