From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [PATCH v9 11/15] drm/i915/icl: Define Panel power ctrl register
Date: Thu, 1 Nov 2018 17:34:05 +0200 [thread overview]
Message-ID: <b0ecc76ac5b19dbb20c1ccf1b17f9d37ae969acf.1541086315.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1541086315.git.jani.nikula@intel.com>
In-Reply-To: <cover.1541086315.git.jani.nikula@intel.com>
From: Madhav Chauhan <madhav.chauhan@intel.com>
There are two panel power sequencers. Each register
has two addressable instances. This patch defines
both the instances of Panel power control register
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9d58a9ff4f76..dbd8eef8aa8c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4596,6 +4596,17 @@ enum {
#define _PP_STATUS 0x61200
#define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS)
#define PP_ON (1 << 31)
+
+#define _PP_CONTROL_1 0xc7204
+#define _PP_CONTROL_2 0xc7304
+#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \
+ _PP_CONTROL_2)
+#define POWER_CYCLE_DELAY_MASK (0x1f << 4)
+#define POWER_CYCLE_DELAY_SHIFT 4
+#define VDD_OVERRIDE_FORCE (1 << 3)
+#define BACKLIGHT_ENABLE (1 << 2)
+#define PWR_DOWN_ON_RESET (1 << 1)
+#define PWR_STATE_TARGET (1 << 0)
/*
* Indicates that all dependencies of the panel are on:
*
--
2.11.0
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next prev parent reply other threads:[~2018-11-01 15:33 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-01 15:33 [PATCH v9 00/15] drm/i915/icl: dsi enabling Jani Nikula
2018-11-01 15:33 ` [PATCH v9 01/15] drm/i915/icl: Allocate DSI encoder/connector Jani Nikula
2018-11-02 6:45 ` Madhav Chauhan
2018-11-01 15:33 ` [PATCH v9 02/15] drm/i915/icl: Fill DSI ports info Jani Nikula
2018-11-01 15:33 ` [PATCH v9 03/15] drm/i915/icl: Allocate DSI hosts and imlement host transfer Jani Nikula
2018-11-02 6:49 ` Madhav Chauhan
2018-11-01 15:33 ` [PATCH v9 04/15] drm/i915/icl: Add get config functionality for DSI Jani Nikula
2018-11-02 6:43 ` Kulkarni, Vandita
2018-11-02 10:55 ` Jani Nikula
2018-11-01 15:33 ` [PATCH v9 05/15] drm/i915/icl: Get HW state for DSI encoder Jani Nikula
2018-11-01 17:02 ` Imre Deak
2018-11-01 15:34 ` [PATCH v9 06/15] drm/i915/icl: Add DSI encoder remaining functions Jani Nikula
2018-11-01 15:34 ` [PATCH v9 07/15] drm/i915/icl: Configure DSI Dual link mode Jani Nikula
2018-11-01 15:34 ` [PATCH v9 08/15] drm/i915/icl: Consider DSI for getting transcoder state Jani Nikula
2018-11-02 7:53 ` Madhav Chauhan
2018-11-01 15:34 ` [PATCH v9 09/15] drm/i915/icl: Get pipe timings for DSI Jani Nikula
2018-11-02 7:54 ` Madhav Chauhan
2018-11-01 15:34 ` [PATCH v9 10/15] drm/i915/icl: Define missing bitfield for shortplug reg Jani Nikula
2018-11-01 15:34 ` Jani Nikula [this message]
2018-11-01 15:34 ` [PATCH v9 12/15] drm/i915/icl: Define display GPIO pins for DSI Jani Nikula
2018-11-01 15:34 ` [PATCH v9 13/15] drm/i915/icl: add dummy DSI GPIO element execution function Jani Nikula
2018-11-01 15:34 ` [PATCH v9 14/15] HACK: drm/i915/icl: Add changes to program DSI panel GPIOs Jani Nikula
2018-11-01 15:34 ` [PATCH v9 15/15] HACK: drm/i915/icl: Configure backlight functions for DSI Jani Nikula
2018-11-01 15:37 ` [PATCH v9 00/15] drm/i915/icl: dsi enabling Jani Nikula
2018-11-01 16:44 ` ✗ Fi.CI.BAT: failure for drm/i915/icl: dsi enabling (rev4) Patchwork
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