Re: [PATCH v9 09/15] drm/i915/icl: Get pipe timings for DSI

[Madhav Chauhan <madhav.chauhan@intel.com>]

On 11/1/2018 9:04 PM, Jani Nikula wrote:
> From: Madhav Chauhan <madhav.chauhan@intel.com>
>
> Transcoder timings for Gen11 DSI encoder
> is available at pipe level unlike in older platform
> where port specific registers need to be accessed.
>
> v2 by Jani:
>   - get timings for (!dsi || icl) instead of (dsi && icl).

Looks ok.

Regards,
Madhav

>
> Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7337d579cbb6..9137675283d1 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9549,7 +9549,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>   	if (!active)
>   		goto out;
>   
> -	if (!transcoder_is_dsi(pipe_config->cpu_transcoder)) {
> +	if (!transcoder_is_dsi(pipe_config->cpu_transcoder) ||
> +	    IS_ICELAKE(dev_priv)) {
>   		haswell_get_ddi_port_state(crtc, pipe_config);
>   		intel_get_pipe_timings(crtc, pipe_config);
>   	}

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx