[PATCH 1/3] dt-bindings: nvmem: qfprom: add sdm670 compatible

[PATCH 1/3] dt-bindings: nvmem: qfprom: add sdm670 compatible

[Richard Acayan]

There is some configuration in SDM670's QFPROM. Add the compatible for
it.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes since v1:
 - add ack tag

 Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
index 2eab2f46cb65..01ec2143a3b5 100644
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
@@ -27,6 +27,7 @@ properties:
           - qcom,sc7180-qfprom
           - qcom,sc7280-qfprom
           - qcom,sdm630-qfprom
+          - qcom,sdm670-qfprom
           - qcom,sdm845-qfprom
           - qcom,sm6115-qfprom
       - const: qcom,qfprom
-- 
2.38.1

[PATCH 2/3] arm64: dts: qcom: sdm670: add qfprom node

[Richard Acayan]

Some hardware quirks and capabilities can be determined by reading the
fuse-programmable read-only memory. Add the QFPROM node so consumers
know if they need to do anything extra to support the hardware.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
Changes since v1:
 - offset address by 0x4000 and zero-pad regs

 arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index f93705bc549f..c78156e03d93 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -731,6 +731,13 @@ gcc: clock-controller@100000 {
 			#power-domain-cells = <1>;
 		};
 
+		qfprom: qfprom@784000 {
+			compatible = "qcom,sdm670-qfprom", "qcom,qfprom";
+			reg = <0 0x00784000 0 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		sdhc_1: mmc@7c4000 {
 			compatible = "qcom,sdm670-sdhci", "qcom,sdhci-msm-v5";
 			reg = <0 0x007c4000 0 0x1000>,
-- 
2.38.1

Re: [PATCH 2/3] arm64: dts: qcom: sdm670: add qfprom node

[Konrad Dybcio]

On 07/12/2022 00:17, Richard Acayan wrote:
> Some hardware quirks and capabilities can be determined by reading the
> fuse-programmable read-only memory. Add the QFPROM node so consumers
> know if they need to do anything extra to support the hardware.
> 
> Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
> Changes since v1:
>   - offset address by 0x4000 and zero-pad regs
> 
>   arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> index f93705bc549f..c78156e03d93 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -731,6 +731,13 @@ gcc: clock-controller@100000 {
>   			#power-domain-cells = <1>;
>   		};
>   
> +		qfprom: qfprom@784000 {
> +			compatible = "qcom,sdm670-qfprom", "qcom,qfprom";
> +			reg = <0 0x00784000 0 0x1000>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +		};
> +
>   		sdhc_1: mmc@7c4000 {
>   			compatible = "qcom,sdm670-sdhci", "qcom,sdhci-msm-v5";
>   			reg = <0 0x007c4000 0 0x1000>,

Re: [PATCH 2/3] arm64: dts: qcom: sdm670: add qfprom node

[Bjorn Andersson]

On Tue, Dec 06, 2022 at 06:17:30PM -0500, Richard Acayan wrote:
> Some hardware quirks and capabilities can be determined by reading the
> fuse-programmable read-only memory. Add the QFPROM node so consumers
> know if they need to do anything extra to support the hardware.
> 
> Signed-off-by: Richard Acayan <mailingradian@gmail.com>

Reviewed-by: Bjorn Andersson <andersson@kernel.org>

PS. Please include a "vN" in the []-part of subject when resubmitting
patches. In this case passing -v 2 to git format-patch would do the
trick for you.

I will pick this up after the upcoming merge window.

Thanks,
Bjorn

> ---
> Changes since v1:
>  - offset address by 0x4000 and zero-pad regs
> 
>  arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> index f93705bc549f..c78156e03d93 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -731,6 +731,13 @@ gcc: clock-controller@100000 {
>  			#power-domain-cells = <1>;
>  		};
>  
> +		qfprom: qfprom@784000 {
> +			compatible = "qcom,sdm670-qfprom", "qcom,qfprom";
> +			reg = <0 0x00784000 0 0x1000>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +		};
> +
>  		sdhc_1: mmc@7c4000 {
>  			compatible = "qcom,sdm670-sdhci", "qcom,sdhci-msm-v5";
>  			reg = <0 0x007c4000 0 0x1000>,
> -- 
> 2.38.1
> 

[PATCH 3/3] arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell

[Richard Acayan]

This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670
so there is proper tuning.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
Changes since v1:
 - remove "primary" indicator (SDM670 only has one USB controller)

 arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index c78156e03d93..fcea26ba7fe9 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -736,6 +736,11 @@ qfprom: qfprom@784000 {
 			reg = <0 0x00784000 0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			qusb2_hstx_trim: hstx-trim@1eb {
+				reg = <0x1eb 0x1>;
+				bits = <1 4>;
+			};
 		};
 
 		sdhc_1: mmc@7c4000 {
@@ -1418,6 +1423,8 @@ usb_1_hsphy: phy@88e2000 {
 
 			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
 
+			nvmem-cells = <&qusb2_hstx_trim>;
+
 			status = "disabled";
 		};
 
-- 
2.38.1

Re: [PATCH 3/3] arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell

[Konrad Dybcio]

On 07/12/2022 00:17, Richard Acayan wrote:
> This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670
> so there is proper tuning.
> 
> Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
> Changes since v1:
>   - remove "primary" indicator (SDM670 only has one USB controller)
> 
>   arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> index c78156e03d93..fcea26ba7fe9 100644
> --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
> @@ -736,6 +736,11 @@ qfprom: qfprom@784000 {
>   			reg = <0 0x00784000 0 0x1000>;
>   			#address-cells = <1>;
>   			#size-cells = <1>;
> +
> +			qusb2_hstx_trim: hstx-trim@1eb {
> +				reg = <0x1eb 0x1>;
> +				bits = <1 4>;
> +			};
>   		};
>   
>   		sdhc_1: mmc@7c4000 {
> @@ -1418,6 +1423,8 @@ usb_1_hsphy: phy@88e2000 {
>   
>   			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
>   
> +			nvmem-cells = <&qusb2_hstx_trim>;
> +
>   			status = "disabled";
>   		};
>   

Re: (subset) [PATCH 1/3] dt-bindings: nvmem: qfprom: add sdm670 compatible

[Bjorn Andersson]

On Tue, 6 Dec 2022 18:17:28 -0500, Richard Acayan wrote:
> There is some configuration in SDM670's QFPROM. Add the compatible for
> it.
> 
> 

Applied, thanks!

[2/3] arm64: dts: qcom: sdm670: add qfprom node
      commit: 7bff6f4351bf82c0b9279fc711b730d2d28b8b8c
[3/3] arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell
      commit: cb98187a6883c498b0702cedc1f59247e7857bea

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

[PATCH 1/3] dt-bindings: nvmem: qfprom: add sdm670 compatible

[Richard Acayan]

There is some configuration in SDM670's QFPROM. Add the compatible for
it.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
 Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
index 2eab2f46cb65..01ec2143a3b5 100644
--- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
@@ -27,6 +27,7 @@ properties:
           - qcom,sc7180-qfprom
           - qcom,sc7280-qfprom
           - qcom,sdm630-qfprom
+          - qcom,sdm670-qfprom
           - qcom,sdm845-qfprom
           - qcom,sm6115-qfprom
       - const: qcom,qfprom
-- 
2.38.1

[PATCH 3/3] arm64: dts: qcom: sdm670: add missing usb hstx nvmem cell

[Richard Acayan]

This nvmem cell is present on SDM670 as well as SDM845. Add it in SDM670
so there is proper tuning.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
 arch/arm64/boot/dts/qcom/sdm670.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 933ad2fabf3a..2a44cccc47ee 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -736,6 +736,11 @@ qfprom: qfprom@780000 {
 			reg = <0 0x780000 0 0x1000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+
+			qusb2p_hstx_trim: hstx-trim-primary@1eb {
+				reg = <0x1eb 0x1>;
+				bits = <1 4>;
+			};
 		};
 
 		sdhc_1: mmc@7c4000 {
@@ -1418,6 +1423,8 @@ usb_1_hsphy: phy@88e2000 {
 
 			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
 
+			nvmem-cells = <&qusb2p_hstx_trim>;
+
 			status = "disabled";
 		};
 
-- 
2.38.1