* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
@ 2018-04-20 13:51 Michal Simek
2018-04-20 13:51 ` [U-Boot] [PATCH 2/2] arm: zynqmp: Add ZynqMP minimal R5 support Michal Simek
2018-04-23 3:53 ` [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Lokesh Vutla
0 siblings, 2 replies; 8+ messages in thread
From: Michal Simek @ 2018-04-20 13:51 UTC (permalink / raw)
To: u-boot
This minimal support will be used by Xilinx ZynqMP R5 cpu.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/Kconfig | 6 ++++++
arch/arm/cpu/armv7r/Makefile | 4 ++++
arch/arm/cpu/armv7r/config.mk | 3 +++
arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
5 files changed, 54 insertions(+)
create mode 100644 arch/arm/cpu/armv7r/Makefile
create mode 100644 arch/arm/cpu/armv7r/config.mk
create mode 100644 arch/arm/cpu/armv7r/cpu.c
create mode 100644 arch/arm/cpu/armv7r/start.S
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5fbce03667d..b10804f55224 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -192,6 +192,10 @@ config CPU_V7M
select THUMB2_KERNEL
select SYS_CACHE_SHIFT_5
+config CPU_V7R
+ bool
+ select SYS_CACHE_SHIFT_6
+
config CPU_PXA
bool
select SYS_CACHE_SHIFT_5
@@ -209,6 +213,7 @@ config SYS_CPU
default "arm1176" if CPU_ARM1176
default "armv7" if CPU_V7
default "armv7m" if CPU_V7M
+ default "armv7r" if CPU_V7R
default "pxa" if CPU_PXA
default "sa1100" if CPU_SA1100
default "armv8" if ARM64
@@ -223,6 +228,7 @@ config SYS_ARM_ARCH
default 6 if CPU_ARM1176
default 7 if CPU_V7
default 7 if CPU_V7M
+ default 7 if CPU_V7R
default 5 if CPU_PXA
default 4 if CPU_SA1100
default 8 if ARM64
diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
new file mode 100644
index 000000000000..3c66976dfa62
--- /dev/null
+++ b/arch/arm/cpu/armv7r/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+extra-y := start.o
+obj-y += cpu.o
diff --git a/arch/arm/cpu/armv7r/config.mk b/arch/arm/cpu/armv7r/config.mk
new file mode 100644
index 000000000000..224d191ff846
--- /dev/null
+++ b/arch/arm/cpu/armv7r/config.mk
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+PLATFORM_CPPFLAGS += -mcpu=cortex-r5 -DARMR5
diff --git a/arch/arm/cpu/armv7r/cpu.c b/arch/arm/cpu/armv7r/cpu.c
new file mode 100644
index 000000000000..e384a530c5e0
--- /dev/null
+++ b/arch/arm/cpu/armv7r/cpu.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
+ */
+
+#include <common.h>
+
+/*
+ * This is called right before passing control to
+ * the Linux kernel point.
+ */
+int cleanup_before_linux(void)
+{
+ return 0;
+}
+
+/*
+ * Perform the low-level reset.
+ */
+void reset_cpu(ulong addr)
+{
+ while (1)
+ ;
+}
diff --git a/arch/arm/cpu/armv7r/start.S b/arch/arm/cpu/armv7r/start.S
new file mode 100644
index 000000000000..d6e8eecf54b7
--- /dev/null
+++ b/arch/arm/cpu/armv7r/start.S
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2015
+ * Kamil Lulko, <kamil.lulko@gmail.com>
+ *
+ */
+
+#include <asm/assembler.h>
+
+.globl reset
+.type reset, %function
+reset:
+ W(b) _main
+
+.globl c_runtime_cpu_setup
+c_runtime_cpu_setup:
+ mov pc, lr
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 2/2] arm: zynqmp: Add ZynqMP minimal R5 support
2018-04-20 13:51 [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Michal Simek
@ 2018-04-20 13:51 ` Michal Simek
2018-04-23 3:53 ` [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Lokesh Vutla
1 sibling, 0 replies; 8+ messages in thread
From: Michal Simek @ 2018-04-20 13:51 UTC (permalink / raw)
To: u-boot
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
U-Boot on R5 runs out of DDR with default configuration that's why
DDR needs to be partitioned if there is something else running on arm64.
Console is done via Cadence uart driver and the first Cadence Triple
Timer Counter is used for time.
This configuration with uart1 was tested on zcu100-revC.
U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)
Model: Xilinx ZynqMP R5
DRAM: 512 MiB
WARNING: Caches not enabled
MMC:
In: serial at ff010000
Out: serial at ff010000
Err: serial at ff010000
Net: Net Initialization Skipped
No ethernet found.
ZynqMP r5>
There are two ways how to run this on ZynqMP.
1. Run from ZynqMP arm64
tftpb 20000000 u-boot-r5.elf
setenv autostart no && bootelf -p 20000000
cpu 4 disable && cpu 4 release 10000000 lockstep
or
cpu 4 disable && cpu 4 release 10000000 split
2. Load via jtag when directly to R5
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes compare to RFC
- Use 500MHz instead of 600MHz
- Remove fpu compilation flags
- Split arm-r5 code and platform
---
MAINTAINERS | 6 +++
arch/arm/Kconfig | 10 ++++
arch/arm/Makefile | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/zynqmp-r5.dts | 73 ++++++++++++++++++++++++++++++
arch/arm/mach-zynqmp-r5/Kconfig | 27 +++++++++++
arch/arm/mach-zynqmp-r5/Makefile | 3 ++
arch/arm/mach-zynqmp-r5/cpu.c | 15 ++++++
board/xilinx/zynqmp_r5/MAINTAINERS | 7 +++
board/xilinx/zynqmp_r5/Makefile | 6 +++
board/xilinx/zynqmp_r5/board.c | 25 ++++++++++
configs/xilinx_zynqmp_r5_defconfig | 16 +++++++
drivers/serial/Kconfig | 2 +-
include/configs/xilinx_zynqmp_r5.h | 49 ++++++++++++++++++++
14 files changed, 241 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/zynqmp-r5.dts
create mode 100644 arch/arm/mach-zynqmp-r5/Kconfig
create mode 100644 arch/arm/mach-zynqmp-r5/Makefile
create mode 100644 arch/arm/mach-zynqmp-r5/cpu.c
create mode 100644 board/xilinx/zynqmp_r5/MAINTAINERS
create mode 100644 board/xilinx/zynqmp_r5/Makefile
create mode 100644 board/xilinx/zynqmp_r5/board.c
create mode 100644 configs/xilinx_zynqmp_r5_defconfig
create mode 100644 include/configs/xilinx_zynqmp_r5.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 147551f66fd3..e60d76dbad8a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -295,6 +295,12 @@ F: include/zynqmppl.h
F: tools/zynqimage.c
N: zynqmp
+ARM ZYNQMP R5
+M: Michal Simek <michal.simek@xilinx.com>
+S: Maintained
+T: git git://git.denx.de/u-boot-microblaze.git
+F: arch/arm/mach-zynqmp-r5/
+
BUILDMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b10804f55224..e09ab487b7d0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -771,6 +771,14 @@ config ARCH_ZYNQ
imply CMD_SPL
imply ARCH_EARLY_INIT_R
+config ARCH_ZYNQMP_R5
+ bool "Xilinx ZynqMP R5 based platform"
+ select CPU_V7R
+ select OF_CONTROL
+ select DM
+ select DM_SERIAL
+ select CLK
+
config ARCH_ZYNQMP
bool "Xilinx ZynqMP based platform"
select ARM64
@@ -1289,6 +1297,8 @@ source "arch/arm/cpu/armv7/vf610/Kconfig"
source "arch/arm/mach-zynq/Kconfig"
+source "arch/arm/mach-zynqmp-r5/Kconfig"
+
source "arch/arm/cpu/armv7/Kconfig"
source "arch/arm/cpu/armv8/zynqmp/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4fa8b38397d9..b4b45f3c6328 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -76,6 +76,7 @@ machine-$(CONFIG_ARCH_STM32MP) += stm32mp
machine-$(CONFIG_TEGRA) += tegra
machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
machine-$(CONFIG_ARCH_ZYNQ) += zynq
+machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1fb36b3ecdb3..d44a4310081e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,6 +165,8 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-zc1751-xm017-dc3.dtb \
zynqmp-zc1751-xm018-dc4.dtb \
zynqmp-zc1751-xm019-dc5.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
+ zynqmp-r5.dtb
dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
am335x-draco.dtb \
am335x-evm.dtb \
diff --git a/arch/arm/dts/zynqmp-r5.dts b/arch/arm/dts/zynqmp-r5.dts
new file mode 100644
index 000000000000..ba4d66a167c2
--- /dev/null
+++ b/arch/arm/dts/zynqmp-r5.dts
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx ZynqMP R5
+ *
+ * (C) Copyright 2018, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,zynqmp-r5";
+ model = "Xilinx ZynqMP R5";
+
+ cpus {
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ cpu at 0 {
+ compatible = "arm,cortex-r5";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart1;
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x10000000 0x20000000>;
+ };
+
+ chosen {
+ bootargs = "";
+ stdout-path = "serial0:115200n8";
+ };
+
+ clk100: clk100 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ amba {
+ u-boot,dm-pre-reloc;
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ttc0: timer at ff110000 {
+ compatible = "cdns,ttc";
+ status = "okay";
+ reg = <0xff110000 0x1000>;
+ timer-width = <32>;
+ clocks = <&clk100>;
+ };
+
+ uart1: serial at ff010000 {
+ u-boot,dm-pre-reloc;
+ compatible = "cdns,uart-r1p12", "xlnx,xuartps";
+ reg = <0xff010000 0x1000>;
+ clock-names = "uart_clk", "pclk";
+ clocks = <&clk100 &clk100>;
+ };
+ };
+};
diff --git a/arch/arm/mach-zynqmp-r5/Kconfig b/arch/arm/mach-zynqmp-r5/Kconfig
new file mode 100644
index 000000000000..5e0175413395
--- /dev/null
+++ b/arch/arm/mach-zynqmp-r5/Kconfig
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0
+
+if ARCH_ZYNQMP_R5
+
+config SYS_BOARD
+ string "Board name"
+ default "zynqmp_r5"
+
+config SYS_VENDOR
+ string "Vendor name"
+ default "xilinx"
+
+config SYS_SOC
+ default "zynqmp-r5"
+
+config SYS_CONFIG_NAME
+ string "Board configuration name"
+ default "xilinx_zynqmp_r5"
+ help
+ This option contains information about board configuration name.
+ Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
+ will be used for board configuration.
+
+config SYS_MALLOC_F_LEN
+ default 0x600
+
+endif
diff --git a/arch/arm/mach-zynqmp-r5/Makefile b/arch/arm/mach-zynqmp-r5/Makefile
new file mode 100644
index 000000000000..0d39e97dd371
--- /dev/null
+++ b/arch/arm/mach-zynqmp-r5/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += cpu.o
diff --git a/arch/arm/mach-zynqmp-r5/cpu.c b/arch/arm/mach-zynqmp-r5/cpu.c
new file mode 100644
index 000000000000..0d86e2d1c886
--- /dev/null
+++ b/arch/arm/mach-zynqmp-r5/cpu.c
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int arch_cpu_init(void)
+{
+ gd->cpu_clk = CONFIG_CPU_FREQ_HZ;
+
+ return 0;
+}
diff --git a/board/xilinx/zynqmp_r5/MAINTAINERS b/board/xilinx/zynqmp_r5/MAINTAINERS
new file mode 100644
index 000000000000..ac267649781a
--- /dev/null
+++ b/board/xilinx/zynqmp_r5/MAINTAINERS
@@ -0,0 +1,7 @@
+XILINX_ZYNQMP_R5 BOARDS
+M: Michal Simek <michal.simek@xilinx.com>
+S: Maintained
+F: arch/arm/dts/zynqmp-r5*
+F: board/xilinx/zynqmp_r5/
+F: include/configs/xilinx_zynqmp_r5_*
+F: configs/xilinx_zynqmp_r5_*
diff --git a/board/xilinx/zynqmp_r5/Makefile b/board/xilinx/zynqmp_r5/Makefile
new file mode 100644
index 000000000000..c5a3e3d328bd
--- /dev/null
+++ b/board/xilinx/zynqmp_r5/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
+#
+
+obj-y := board.o
diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c
new file mode 100644
index 000000000000..70fb20235498
--- /dev/null
+++ b/board/xilinx/zynqmp_r5/board.c
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
+
+int dram_init(void)
+{
+ if (fdtdec_setup_memory_size() != 0)
+ return -EINVAL;
+
+ return 0;
+}
diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig
new file mode 100644
index 000000000000..46715242e703
--- /dev/null
+++ b/configs/xilinx_zynqmp_r5_defconfig
@@ -0,0 +1,16 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQMP_R5=y
+CONFIG_SYS_TEXT_BASE=0x10000000
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="ZynqMP r5> "
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_EMBED=y
+CONFIG_DEBUG_UART_ZYNQ=y
+CONFIG_DEBUG_UART_BASE=0xff010000
+CONFIG_DEBUG_UART_CLOCK=100000000
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_TIMER=y
+CONFIG_CADENCE_TTC_TIMER=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 3d5b2bf15f08..3292edbaf240 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -617,7 +617,7 @@ config STM32_SERIAL
config ZYNQ_SERIAL
bool "Cadence (Xilinx Zynq) UART support"
- depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+ depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_ZYNQMP_R5)
help
This driver supports the Cadence UART. It is found e.g. in Xilinx
Zynq/ZynqMP.
diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h
new file mode 100644
index 000000000000..80bbf4d2159d
--- /dev/null
+++ b/include/configs/xilinx_zynqmp_r5.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
+ */
+
+#ifndef __CONFIG_ZYNQMP_R5_H
+#define __CONFIG_ZYNQMP_R5_H
+
+#define CONFIG_EXTRA_ENV_SETTINGS
+
+/* CPU clock */
+#define CONFIG_CPU_FREQ_HZ 500000000
+
+/* Serial drivers */
+/* The following table includes the supported baudrates */
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+
+# define CONFIG_ENV_SIZE (128 << 10)
+
+/* Allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Boot configuration */
+#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
+
+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
+
+#define CONFIG_NR_DRAM_BANKS 1
+
+#define CONFIG_SYS_MALLOC_LEN 0x1400000
+
+#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
+#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+
+/* Extend size of kernel image for uncompression */
+#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
+
+#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_ICACHE_OFF
+
+#endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */
--
2.17.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
2018-04-20 13:51 [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Michal Simek
2018-04-20 13:51 ` [U-Boot] [PATCH 2/2] arm: zynqmp: Add ZynqMP minimal R5 support Michal Simek
@ 2018-04-23 3:53 ` Lokesh Vutla
2018-04-23 6:26 ` Michal Simek
1 sibling, 1 reply; 8+ messages in thread
From: Lokesh Vutla @ 2018-04-23 3:53 UTC (permalink / raw)
To: u-boot
On Friday 20 April 2018 07:21 PM, Michal Simek wrote:
> This minimal support will be used by Xilinx ZynqMP R5 cpu.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
> arch/arm/Kconfig | 6 ++++++
> arch/arm/cpu/armv7r/Makefile | 4 ++++
> arch/arm/cpu/armv7r/config.mk | 3 +++
> arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
> arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
> 5 files changed, 54 insertions(+)
> create mode 100644 arch/arm/cpu/armv7r/Makefile
> create mode 100644 arch/arm/cpu/armv7r/config.mk
> create mode 100644 arch/arm/cpu/armv7r/cpu.c
> create mode 100644 arch/arm/cpu/armv7r/start.S
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index b5fbce03667d..b10804f55224 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -192,6 +192,10 @@ config CPU_V7M
> select THUMB2_KERNEL
> select SYS_CACHE_SHIFT_5
>
> +config CPU_V7R
> + bool
> + select SYS_CACHE_SHIFT_6
select HAS_THUMB2 might be a good option?
> +
> config CPU_PXA
> bool
> select SYS_CACHE_SHIFT_5
> @@ -209,6 +213,7 @@ config SYS_CPU
> default "arm1176" if CPU_ARM1176
> default "armv7" if CPU_V7
> default "armv7m" if CPU_V7M
> + default "armv7r" if CPU_V7R
> default "pxa" if CPU_PXA
> default "sa1100" if CPU_SA1100
> default "armv8" if ARM64
> @@ -223,6 +228,7 @@ config SYS_ARM_ARCH
> default 6 if CPU_ARM1176
> default 7 if CPU_V7
> default 7 if CPU_V7M
> + default 7 if CPU_V7R
> default 5 if CPU_PXA
> default 4 if CPU_SA1100
> default 8 if ARM64
I did a grep of CPU_V7, and you might want to update for CPU_V7R in the
following places:
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4fa8b38397..f4bc1f250d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7, -march=armv5))
+arch-$(CONFIG_CPU_V7R) =-march=armv7-r
arch-$(CONFIG_ARM64) =-march=armv8-a
# On Tegra systems we must build SPL for the armv4 core on the device
@@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7) =
+tune-$(CONFIG_CPU_V7R) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
> diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
> new file mode 100644
> index 000000000000..3c66976dfa62
> --- /dev/null
> +++ b/arch/arm/cpu/armv7r/Makefile
hmm..do we really need to create a separate folder? IIUC, the main
difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to
get it using Kconfigs.
Thanks and regards,
Lokesh
> @@ -0,0 +1,4 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +extra-y := start.o
> +obj-y += cpu.o
> diff --git a/arch/arm/cpu/armv7r/config.mk b/arch/arm/cpu/armv7r/config.mk
> new file mode 100644
> index 000000000000..224d191ff846
> --- /dev/null
> +++ b/arch/arm/cpu/armv7r/config.mk
> @@ -0,0 +1,3 @@
> +# SPDX-License-Identifier: GPL-2.0
> +
> +PLATFORM_CPPFLAGS += -mcpu=cortex-r5 -DARMR5
> diff --git a/arch/arm/cpu/armv7r/cpu.c b/arch/arm/cpu/armv7r/cpu.c
> new file mode 100644
> index 000000000000..e384a530c5e0
> --- /dev/null
> +++ b/arch/arm/cpu/armv7r/cpu.c
> @@ -0,0 +1,24 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
> + */
> +
> +#include <common.h>
> +
> +/*
> + * This is called right before passing control to
> + * the Linux kernel point.
> + */
> +int cleanup_before_linux(void)
> +{
> + return 0;
> +}
> +
> +/*
> + * Perform the low-level reset.
> + */
> +void reset_cpu(ulong addr)
> +{
> + while (1)
> + ;
> +}
> diff --git a/arch/arm/cpu/armv7r/start.S b/arch/arm/cpu/armv7r/start.S
> new file mode 100644
> index 000000000000..d6e8eecf54b7
> --- /dev/null
> +++ b/arch/arm/cpu/armv7r/start.S
> @@ -0,0 +1,17 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * (C) Copyright 2015
> + * Kamil Lulko, <kamil.lulko@gmail.com>
> + *
> + */
> +
> +#include <asm/assembler.h>
> +
> +.globl reset
> +.type reset, %function
> +reset:
> + W(b) _main
> +
> +.globl c_runtime_cpu_setup
> +c_runtime_cpu_setup:
> + mov pc, lr
>
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
2018-04-23 3:53 ` [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Lokesh Vutla
@ 2018-04-23 6:26 ` Michal Simek
2018-04-24 4:45 ` Lokesh Vutla
0 siblings, 1 reply; 8+ messages in thread
From: Michal Simek @ 2018-04-23 6:26 UTC (permalink / raw)
To: u-boot
On 23.4.2018 05:53, Lokesh Vutla wrote:
>
>
> On Friday 20 April 2018 07:21 PM, Michal Simek wrote:
>> This minimal support will be used by Xilinx ZynqMP R5 cpu.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
>> arch/arm/Kconfig | 6 ++++++
>> arch/arm/cpu/armv7r/Makefile | 4 ++++
>> arch/arm/cpu/armv7r/config.mk | 3 +++
>> arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
>> arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
>> 5 files changed, 54 insertions(+)
>> create mode 100644 arch/arm/cpu/armv7r/Makefile
>> create mode 100644 arch/arm/cpu/armv7r/config.mk
>> create mode 100644 arch/arm/cpu/armv7r/cpu.c
>> create mode 100644 arch/arm/cpu/armv7r/start.S
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index b5fbce03667d..b10804f55224 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -192,6 +192,10 @@ config CPU_V7M
>> select THUMB2_KERNEL
>> select SYS_CACHE_SHIFT_5
>>
>> +config CPU_V7R
>> + bool
>> + select SYS_CACHE_SHIFT_6
>
> select HAS_THUMB2 might be a good option?
I didn't enable it because I didn't test it.
It can be added when someone tests this.
>
>> +
>> config CPU_PXA
>> bool
>> select SYS_CACHE_SHIFT_5
>> @@ -209,6 +213,7 @@ config SYS_CPU
>> default "arm1176" if CPU_ARM1176
>> default "armv7" if CPU_V7
>> default "armv7m" if CPU_V7M
>> + default "armv7r" if CPU_V7R
>> default "pxa" if CPU_PXA
>> default "sa1100" if CPU_SA1100
>> default "armv8" if ARM64
>> @@ -223,6 +228,7 @@ config SYS_ARM_ARCH
>> default 6 if CPU_ARM1176
>> default 7 if CPU_V7
>> default 7 if CPU_V7M
>> + default 7 if CPU_V7R
>> default 5 if CPU_PXA
>> default 4 if CPU_SA1100
>> default 8 if ARM64
>
> I did a grep of CPU_V7, and you might want to update for CPU_V7R in the
> following places:
>
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 4fa8b38397..f4bc1f250d 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5
> arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
> arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
> $(call cc-option, -march=armv7, -march=armv5))
> +arch-$(CONFIG_CPU_V7R) =-march=armv7-r
I have setup PLATFORM_CPPFLAGS via config.mk
If both options are selected I am getting this compilation warning.
cc1: warning: switch -mcpu=cortex-r5 conflicts with -march=armv7-r switch
Not sure which one is better or if it is better to have this arch flag
via this makefile or as platform cppflags via config.mk.
I choose the second option because it seems to me better if this is in
subfolder. But not a problem to use different flag and put it to this
Makefile.
The same style is used for cpu_v7m.
> arch-$(CONFIG_ARM64) =-march=armv8-a
>
> # On Tegra systems we must build SPL for the armv4 core on the device
> @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
> tune-$(CONFIG_CPU_ARM1136) =
> tune-$(CONFIG_CPU_ARM1176) =
> tune-$(CONFIG_CPU_V7) =
> +tune-$(CONFIG_CPU_V7R) =
Again as above. I used v7m as pattern and there is also empty tune
parameter. Is there any good reason to have it empty?
> tune-$(CONFIG_ARM64) =
>
> # Evaluate tune cc-option calls now
>
>
>> diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
>> new file mode 100644
>> index 000000000000..3c66976dfa62
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7r/Makefile
>
> hmm..do we really need to create a separate folder? IIUC, the main
> difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to
> get it using Kconfigs.
I have used V7 for the initial port and then was checking V7M which is
already there and used it as pattern for writing this patch.
I have debugged V7 and found that I need to disable CONFIG_HAS_VBAR
that's why I have created new symbol as for V7M.
Definitely I am open to hear your suggestions.
Thanks,
Michal
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
2018-04-23 6:26 ` Michal Simek
@ 2018-04-24 4:45 ` Lokesh Vutla
2018-04-24 12:24 ` Michal Simek
0 siblings, 1 reply; 8+ messages in thread
From: Lokesh Vutla @ 2018-04-24 4:45 UTC (permalink / raw)
To: u-boot
Hi Michal,
On Monday 23 April 2018 11:56 AM, Michal Simek wrote:
> On 23.4.2018 05:53, Lokesh Vutla wrote:
>>
>>
>> On Friday 20 April 2018 07:21 PM, Michal Simek wrote:
>>> This minimal support will be used by Xilinx ZynqMP R5 cpu.
>>>
>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>> ---
>>>
>>> arch/arm/Kconfig | 6 ++++++
>>> arch/arm/cpu/armv7r/Makefile | 4 ++++
>>> arch/arm/cpu/armv7r/config.mk | 3 +++
>>> arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
>>> arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
>>> 5 files changed, 54 insertions(+)
>>> create mode 100644 arch/arm/cpu/armv7r/Makefile
>>> create mode 100644 arch/arm/cpu/armv7r/config.mk
>>> create mode 100644 arch/arm/cpu/armv7r/cpu.c
>>> create mode 100644 arch/arm/cpu/armv7r/start.S
>>>
>>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>>> index b5fbce03667d..b10804f55224 100644
>>> --- a/arch/arm/Kconfig
>>> +++ b/arch/arm/Kconfig
>>> @@ -192,6 +192,10 @@ config CPU_V7M
>>> select THUMB2_KERNEL
>>> select SYS_CACHE_SHIFT_5
>>>
>>> +config CPU_V7R
>>> + bool
>>> + select SYS_CACHE_SHIFT_6
>>
>> select HAS_THUMB2 might be a good option?
>
> I didn't enable it because I didn't test it.
> It can be added when someone tests this.
>
>>
>>> +
>>> config CPU_PXA
>>> bool
>>> select SYS_CACHE_SHIFT_5
>>> @@ -209,6 +213,7 @@ config SYS_CPU
>>> default "arm1176" if CPU_ARM1176
>>> default "armv7" if CPU_V7
>>> default "armv7m" if CPU_V7M
>>> + default "armv7r" if CPU_V7R
>>> default "pxa" if CPU_PXA
>>> default "sa1100" if CPU_SA1100
>>> default "armv8" if ARM64
>>> @@ -223,6 +228,7 @@ config SYS_ARM_ARCH
>>> default 6 if CPU_ARM1176
>>> default 7 if CPU_V7
>>> default 7 if CPU_V7M
>>> + default 7 if CPU_V7R
>>> default 5 if CPU_PXA
>>> default 4 if CPU_SA1100
>>> default 8 if ARM64
>>
>> I did a grep of CPU_V7, and you might want to update for CPU_V7R in the
>> following places:
>>
>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>> index 4fa8b38397..f4bc1f250d 100644
>> --- a/arch/arm/Makefile
>> +++ b/arch/arm/Makefile
>> @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5
>> arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
>> arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
>> $(call cc-option, -march=armv7, -march=armv5))
>> +arch-$(CONFIG_CPU_V7R) =-march=armv7-r
>
> I have setup PLATFORM_CPPFLAGS via config.mk
>
> If both options are selected I am getting this compilation warning.
> cc1: warning: switch -mcpu=cortex-r5 conflicts with -march=armv7-r switch
hmm..that's strange. I guess it should be reported to gcc? Something
similar has been reported for a15 as well[1].
But looking at the implementation of armv7 we just included march. may
be we should stick to it?
>
> Not sure which one is better or if it is better to have this arch flag
> via this makefile or as platform cppflags via config.mk.
> I choose the second option because it seems to me better if this is in
> subfolder. But not a problem to use different flag and put it to this
> Makefile.
>
> The same style is used for cpu_v7m.
v7-r is very much close to v7. I would prefer to compare with v7
implementation than v7-m :)
>
>> arch-$(CONFIG_ARM64) =-march=armv8-a
>>
>> # On Tegra systems we must build SPL for the armv4 core on the device
>> @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
>> tune-$(CONFIG_CPU_ARM1136) =
>> tune-$(CONFIG_CPU_ARM1176) =
>> tune-$(CONFIG_CPU_V7) =
>> +tune-$(CONFIG_CPU_V7R) =
>
> Again as above. I used v7m as pattern and there is also empty tune
> parameter. Is there any good reason to have it empty?
>
>> tune-$(CONFIG_ARM64) =
>>
>> # Evaluate tune cc-option calls now
>>
>>
>>> diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
>>> new file mode 100644
>>> index 000000000000..3c66976dfa62
>>> --- /dev/null
>>> +++ b/arch/arm/cpu/armv7r/Makefile
>>
>> hmm..do we really need to create a separate folder? IIUC, the main
>> difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to
>> get it using Kconfigs.
>
> I have used V7 for the initial port and then was checking V7M which is
> already there and used it as pattern for writing this patch.
>
> I have debugged V7 and found that I need to disable CONFIG_HAS_VBAR
> that's why I have created new symbol as for V7M.
We should be able to create a kconfig symbol for that and select
accordingly. Kernel does it the same way.
>
> Definitely I am open to hear your suggestion
I just did a couple of quick experiments and able to get v7-r support
along with v7 support. let me know if you would like to take a look at
it. Then Ill pick your patch 1/2 and post the series.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57907
Thanks and regards,
Lokesh
>
> Thanks,
> Michal
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
2018-04-24 4:45 ` Lokesh Vutla
@ 2018-04-24 12:24 ` Michal Simek
2018-04-24 12:49 ` Lokesh Vutla
0 siblings, 1 reply; 8+ messages in thread
From: Michal Simek @ 2018-04-24 12:24 UTC (permalink / raw)
To: u-boot
Hi,
On 24.4.2018 06:45, Lokesh Vutla wrote:
> Hi Michal,
>
> On Monday 23 April 2018 11:56 AM, Michal Simek wrote:
>> On 23.4.2018 05:53, Lokesh Vutla wrote:
>>>
>>>
>>> On Friday 20 April 2018 07:21 PM, Michal Simek wrote:
>>>> This minimal support will be used by Xilinx ZynqMP R5 cpu.
>>>>
>>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>>> ---
>>>>
>>>> arch/arm/Kconfig | 6 ++++++
>>>> arch/arm/cpu/armv7r/Makefile | 4 ++++
>>>> arch/arm/cpu/armv7r/config.mk | 3 +++
>>>> arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
>>>> arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
>>>> 5 files changed, 54 insertions(+)
>>>> create mode 100644 arch/arm/cpu/armv7r/Makefile
>>>> create mode 100644 arch/arm/cpu/armv7r/config.mk
>>>> create mode 100644 arch/arm/cpu/armv7r/cpu.c
>>>> create mode 100644 arch/arm/cpu/armv7r/start.S
>>>>
>>>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>>>> index b5fbce03667d..b10804f55224 100644
>>>> --- a/arch/arm/Kconfig
>>>> +++ b/arch/arm/Kconfig
>>>> @@ -192,6 +192,10 @@ config CPU_V7M
>>>> select THUMB2_KERNEL
>>>> select SYS_CACHE_SHIFT_5
>>>>
>>>> +config CPU_V7R
>>>> + bool
>>>> + select SYS_CACHE_SHIFT_6
>>>
>>> select HAS_THUMB2 might be a good option?
>>
>> I didn't enable it because I didn't test it.
>> It can be added when someone tests this.
>>
>>>
>>>> +
>>>> config CPU_PXA
>>>> bool
>>>> select SYS_CACHE_SHIFT_5
>>>> @@ -209,6 +213,7 @@ config SYS_CPU
>>>> default "arm1176" if CPU_ARM1176
>>>> default "armv7" if CPU_V7
>>>> default "armv7m" if CPU_V7M
>>>> + default "armv7r" if CPU_V7R
>>>> default "pxa" if CPU_PXA
>>>> default "sa1100" if CPU_SA1100
>>>> default "armv8" if ARM64
>>>> @@ -223,6 +228,7 @@ config SYS_ARM_ARCH
>>>> default 6 if CPU_ARM1176
>>>> default 7 if CPU_V7
>>>> default 7 if CPU_V7M
>>>> + default 7 if CPU_V7R
>>>> default 5 if CPU_PXA
>>>> default 4 if CPU_SA1100
>>>> default 8 if ARM64
>>>
>>> I did a grep of CPU_V7, and you might want to update for CPU_V7R in the
>>> following places:
>>>
>>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>>> index 4fa8b38397..f4bc1f250d 100644
>>> --- a/arch/arm/Makefile
>>> +++ b/arch/arm/Makefile
>>> @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5
>>> arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
>>> arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
>>> $(call cc-option, -march=armv7, -march=armv5))
>>> +arch-$(CONFIG_CPU_V7R) =-march=armv7-r
>>
>> I have setup PLATFORM_CPPFLAGS via config.mk
>>
>> If both options are selected I am getting this compilation warning.
>> cc1: warning: switch -mcpu=cortex-r5 conflicts with -march=armv7-r switch
>
> hmm..that's strange. I guess it should be reported to gcc? Something
> similar has been reported for a15 as well[1].
>
> But looking at the implementation of armv7 we just included march. may
> be we should stick to it?
As I said I have not a problem to add there -march=armv7-r instead of
-mcpu=cortex-r5.
>> Not sure which one is better or if it is better to have this arch flag
>> via this makefile or as platform cppflags via config.mk.
>> I choose the second option because it seems to me better if this is in
>> subfolder. But not a problem to use different flag and put it to this
>> Makefile.
>>
>> The same style is used for cpu_v7m.
>
> v7-r is very much close to v7. I would prefer to compare with v7
> implementation than v7-m :)
I started with symlink to v7. And I didn't play with MPU. Anyway both
ways works for me.
>>
>>> arch-$(CONFIG_ARM64) =-march=armv8-a
>>>
>>> # On Tegra systems we must build SPL for the armv4 core on the device
>>> @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
>>> tune-$(CONFIG_CPU_ARM1136) =
>>> tune-$(CONFIG_CPU_ARM1176) =
>>> tune-$(CONFIG_CPU_V7) =
>>> +tune-$(CONFIG_CPU_V7R) =
>>
>> Again as above. I used v7m as pattern and there is also empty tune
>> parameter. Is there any good reason to have it empty?
>>
>>> tune-$(CONFIG_ARM64) =
>>>
>>> # Evaluate tune cc-option calls now
>>>
>>>
>>>> diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
>>>> new file mode 100644
>>>> index 000000000000..3c66976dfa62
>>>> --- /dev/null
>>>> +++ b/arch/arm/cpu/armv7r/Makefile
>>>
>>> hmm..do we really need to create a separate folder? IIUC, the main
>>> difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to
>>> get it using Kconfigs.
>>
>> I have used V7 for the initial port and then was checking V7M which is
>> already there and used it as pattern for writing this patch.
>>
>> I have debugged V7 and found that I need to disable CONFIG_HAS_VBAR
>> that's why I have created new symbol as for V7M.
>
> We should be able to create a kconfig symbol for that and select
> accordingly. Kernel does it the same way.
What kernel Kconfig option are you talking about? (I didn't look at
Linux running on R5 but it is reasonable step).
It is really a question if adding new Kconfig symbol for VBAR is the
right thing to do. I would need to add VBAR to every platform which has
CPU_V7.
>>
>> Definitely I am open to hear your suggestion
> I just did a couple of quick experiments and able to get v7-r support
> along with v7 support. let me know if you would like to take a look at
> it. Then Ill pick your patch 1/2 and post the series.
I am definitely confident that this will work because I used that in
past. Definitely feel free to send it and I will take a look at retest
on R5.
Thanks,
Michal
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
2018-04-24 12:24 ` Michal Simek
@ 2018-04-24 12:49 ` Lokesh Vutla
2018-04-24 12:53 ` Michal Simek
0 siblings, 1 reply; 8+ messages in thread
From: Lokesh Vutla @ 2018-04-24 12:49 UTC (permalink / raw)
To: u-boot
Hi Michal,
On Tuesday 24 April 2018 05:54 PM, Michal Simek wrote:
> Hi,
>
> On 24.4.2018 06:45, Lokesh Vutla wrote:
>> Hi Michal,
>>
>> On Monday 23 April 2018 11:56 AM, Michal Simek wrote:
>>> On 23.4.2018 05:53, Lokesh Vutla wrote:
>>>>
>>>>
>>>> On Friday 20 April 2018 07:21 PM, Michal Simek wrote:
>>>>> This minimal support will be used by Xilinx ZynqMP R5 cpu.
>>>>>
>>>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>>>> ---
>>>>>
>>>>> arch/arm/Kconfig | 6 ++++++
>>>>> arch/arm/cpu/armv7r/Makefile | 4 ++++
>>>>> arch/arm/cpu/armv7r/config.mk | 3 +++
>>>>> arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
>>>>> arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
>>>>> 5 files changed, 54 insertions(+)
>>>>> create mode 100644 arch/arm/cpu/armv7r/Makefile
>>>>> create mode 100644 arch/arm/cpu/armv7r/config.mk
>>>>> create mode 100644 arch/arm/cpu/armv7r/cpu.c
>>>>> create mode 100644 arch/arm/cpu/armv7r/start.S
>>>>>
>>>>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>>>>> index b5fbce03667d..b10804f55224 100644
>>>>> --- a/arch/arm/Kconfig
>>>>> +++ b/arch/arm/Kconfig
>>>>> @@ -192,6 +192,10 @@ config CPU_V7M
>>>>> select THUMB2_KERNEL
>>>>> select SYS_CACHE_SHIFT_5
>>>>>
>>>>> +config CPU_V7R
>>>>> + bool
>>>>> + select SYS_CACHE_SHIFT_6
>>>>
>>>> select HAS_THUMB2 might be a good option?
>>>
>>> I didn't enable it because I didn't test it.
>>> It can be added when someone tests this.
>>>
>>>>
>>>>> +
>>>>> config CPU_PXA
>>>>> bool
>>>>> select SYS_CACHE_SHIFT_5
>>>>> @@ -209,6 +213,7 @@ config SYS_CPU
>>>>> default "arm1176" if CPU_ARM1176
>>>>> default "armv7" if CPU_V7
>>>>> default "armv7m" if CPU_V7M
>>>>> + default "armv7r" if CPU_V7R
>>>>> default "pxa" if CPU_PXA
>>>>> default "sa1100" if CPU_SA1100
>>>>> default "armv8" if ARM64
>>>>> @@ -223,6 +228,7 @@ config SYS_ARM_ARCH
>>>>> default 6 if CPU_ARM1176
>>>>> default 7 if CPU_V7
>>>>> default 7 if CPU_V7M
>>>>> + default 7 if CPU_V7R
>>>>> default 5 if CPU_PXA
>>>>> default 4 if CPU_SA1100
>>>>> default 8 if ARM64
>>>>
>>>> I did a grep of CPU_V7, and you might want to update for CPU_V7R in the
>>>> following places:
>>>>
>>>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>>>> index 4fa8b38397..f4bc1f250d 100644
>>>> --- a/arch/arm/Makefile
>>>> +++ b/arch/arm/Makefile
>>>> @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5
>>>> arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
>>>> arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
>>>> $(call cc-option, -march=armv7, -march=armv5))
>>>> +arch-$(CONFIG_CPU_V7R) =-march=armv7-r
>>>
>>> I have setup PLATFORM_CPPFLAGS via config.mk
>>>
>>> If both options are selected I am getting this compilation warning.
>>> cc1: warning: switch -mcpu=cortex-r5 conflicts with -march=armv7-r switch
>>
>> hmm..that's strange. I guess it should be reported to gcc? Something
>> similar has been reported for a15 as well[1].
>>
>> But looking at the implementation of armv7 we just included march. may
>> be we should stick to it?
>
> As I said I have not a problem to add there -march=armv7-r instead of
> -mcpu=cortex-r5.
>
>
>
>>> Not sure which one is better or if it is better to have this arch flag
>>> via this makefile or as platform cppflags via config.mk.
>>> I choose the second option because it seems to me better if this is in
>>> subfolder. But not a problem to use different flag and put it to this
>>> Makefile.
>>>
>>> The same style is used for cpu_v7m.
>>
>> v7-r is very much close to v7. I would prefer to compare with v7
>> implementation than v7-m :)
>
> I started with symlink to v7. And I didn't play with MPU. Anyway both
> ways works for me.
>
>
>>>
>>>> arch-$(CONFIG_ARM64) =-march=armv8-a
>>>>
>>>> # On Tegra systems we must build SPL for the armv4 core on the device
>>>> @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
>>>> tune-$(CONFIG_CPU_ARM1136) =
>>>> tune-$(CONFIG_CPU_ARM1176) =
>>>> tune-$(CONFIG_CPU_V7) =
>>>> +tune-$(CONFIG_CPU_V7R) =
>>>
>>> Again as above. I used v7m as pattern and there is also empty tune
>>> parameter. Is there any good reason to have it empty?
>>>
>>>> tune-$(CONFIG_ARM64) =
>>>>
>>>> # Evaluate tune cc-option calls now
>>>>
>>>>
>>>>> diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
>>>>> new file mode 100644
>>>>> index 000000000000..3c66976dfa62
>>>>> --- /dev/null
>>>>> +++ b/arch/arm/cpu/armv7r/Makefile
>>>>
>>>> hmm..do we really need to create a separate folder? IIUC, the main
>>>> difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to
>>>> get it using Kconfigs.
>>>
>>> I have used V7 for the initial port and then was checking V7M which is
>>> already there and used it as pattern for writing this patch.
>>>
>>> I have debugged V7 and found that I need to disable CONFIG_HAS_VBAR
>>> that's why I have created new symbol as for V7M.
>>
>> We should be able to create a kconfig symbol for that and select
>> accordingly. Kernel does it the same way.
>
> What kernel Kconfig option are you talking about? (I didn't look at
> Linux running on R5 but it is reasonable step).
>
> It is really a question if adding new Kconfig symbol for VBAR is the
> right thing to do. I would need to add VBAR to every platform which has
> CPU_V7.
>
>
>>>
>>> Definitely I am open to hear your suggestion
>> I just did a couple of quick experiments and able to get v7-r support
>> along with v7 support. let me know if you would like to take a look at
>> it. Then Ill pick your patch 1/2 and post the series.
>
> I am definitely confident that this will work because I used that in
> past. Definitely feel free to send it and I will take a look at retest
> on R5.
Sorry, I did not mean this patch does not work. It definitely works. I
am trying to tell that with some kconfig changes we should be able to
re-use armv7 folder instead of creating new folder. Apologies if my
reply has communicated wrongly.
Will post an RFC series for R5 support.
Thanks and regards,
Lokesh
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5
2018-04-24 12:49 ` Lokesh Vutla
@ 2018-04-24 12:53 ` Michal Simek
0 siblings, 0 replies; 8+ messages in thread
From: Michal Simek @ 2018-04-24 12:53 UTC (permalink / raw)
To: u-boot
On 24.4.2018 14:49, Lokesh Vutla wrote:
> Hi Michal,
>
> On Tuesday 24 April 2018 05:54 PM, Michal Simek wrote:
>> Hi,
>>
>> On 24.4.2018 06:45, Lokesh Vutla wrote:
>>> Hi Michal,
>>>
>>> On Monday 23 April 2018 11:56 AM, Michal Simek wrote:
>>>> On 23.4.2018 05:53, Lokesh Vutla wrote:
>>>>>
>>>>>
>>>>> On Friday 20 April 2018 07:21 PM, Michal Simek wrote:
>>>>>> This minimal support will be used by Xilinx ZynqMP R5 cpu.
>>>>>>
>>>>>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>>>>>> ---
>>>>>>
>>>>>> arch/arm/Kconfig | 6 ++++++
>>>>>> arch/arm/cpu/armv7r/Makefile | 4 ++++
>>>>>> arch/arm/cpu/armv7r/config.mk | 3 +++
>>>>>> arch/arm/cpu/armv7r/cpu.c | 24 ++++++++++++++++++++++++
>>>>>> arch/arm/cpu/armv7r/start.S | 17 +++++++++++++++++
>>>>>> 5 files changed, 54 insertions(+)
>>>>>> create mode 100644 arch/arm/cpu/armv7r/Makefile
>>>>>> create mode 100644 arch/arm/cpu/armv7r/config.mk
>>>>>> create mode 100644 arch/arm/cpu/armv7r/cpu.c
>>>>>> create mode 100644 arch/arm/cpu/armv7r/start.S
>>>>>>
>>>>>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>>>>>> index b5fbce03667d..b10804f55224 100644
>>>>>> --- a/arch/arm/Kconfig
>>>>>> +++ b/arch/arm/Kconfig
>>>>>> @@ -192,6 +192,10 @@ config CPU_V7M
>>>>>> select THUMB2_KERNEL
>>>>>> select SYS_CACHE_SHIFT_5
>>>>>>
>>>>>> +config CPU_V7R
>>>>>> + bool
>>>>>> + select SYS_CACHE_SHIFT_6
>>>>>
>>>>> select HAS_THUMB2 might be a good option?
>>>>
>>>> I didn't enable it because I didn't test it.
>>>> It can be added when someone tests this.
>>>>
>>>>>
>>>>>> +
>>>>>> config CPU_PXA
>>>>>> bool
>>>>>> select SYS_CACHE_SHIFT_5
>>>>>> @@ -209,6 +213,7 @@ config SYS_CPU
>>>>>> default "arm1176" if CPU_ARM1176
>>>>>> default "armv7" if CPU_V7
>>>>>> default "armv7m" if CPU_V7M
>>>>>> + default "armv7r" if CPU_V7R
>>>>>> default "pxa" if CPU_PXA
>>>>>> default "sa1100" if CPU_SA1100
>>>>>> default "armv8" if ARM64
>>>>>> @@ -223,6 +228,7 @@ config SYS_ARM_ARCH
>>>>>> default 6 if CPU_ARM1176
>>>>>> default 7 if CPU_V7
>>>>>> default 7 if CPU_V7M
>>>>>> + default 7 if CPU_V7R
>>>>>> default 5 if CPU_PXA
>>>>>> default 4 if CPU_SA1100
>>>>>> default 8 if ARM64
>>>>>
>>>>> I did a grep of CPU_V7, and you might want to update for CPU_V7R in the
>>>>> following places:
>>>>>
>>>>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>>>>> index 4fa8b38397..f4bc1f250d 100644
>>>>> --- a/arch/arm/Makefile
>>>>> +++ b/arch/arm/Makefile
>>>>> @@ -18,6 +18,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5
>>>>> arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
>>>>> arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \
>>>>> $(call cc-option, -march=armv7, -march=armv5))
>>>>> +arch-$(CONFIG_CPU_V7R) =-march=armv7-r
>>>>
>>>> I have setup PLATFORM_CPPFLAGS via config.mk
>>>>
>>>> If both options are selected I am getting this compilation warning.
>>>> cc1: warning: switch -mcpu=cortex-r5 conflicts with -march=armv7-r switch
>>>
>>> hmm..that's strange. I guess it should be reported to gcc? Something
>>> similar has been reported for a15 as well[1].
>>>
>>> But looking at the implementation of armv7 we just included march. may
>>> be we should stick to it?
>>
>> As I said I have not a problem to add there -march=armv7-r instead of
>> -mcpu=cortex-r5.
>>
>>
>>
>>>> Not sure which one is better or if it is better to have this arch flag
>>>> via this makefile or as platform cppflags via config.mk.
>>>> I choose the second option because it seems to me better if this is in
>>>> subfolder. But not a problem to use different flag and put it to this
>>>> Makefile.
>>>>
>>>> The same style is used for cpu_v7m.
>>>
>>> v7-r is very much close to v7. I would prefer to compare with v7
>>> implementation than v7-m :)
>>
>> I started with symlink to v7. And I didn't play with MPU. Anyway both
>> ways works for me.
>>
>>
>>>>
>>>>> arch-$(CONFIG_ARM64) =-march=armv8-a
>>>>>
>>>>> # On Tegra systems we must build SPL for the armv4 core on the device
>>>>> @@ -41,6 +42,7 @@ tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
>>>>> tune-$(CONFIG_CPU_ARM1136) =
>>>>> tune-$(CONFIG_CPU_ARM1176) =
>>>>> tune-$(CONFIG_CPU_V7) =
>>>>> +tune-$(CONFIG_CPU_V7R) =
>>>>
>>>> Again as above. I used v7m as pattern and there is also empty tune
>>>> parameter. Is there any good reason to have it empty?
>>>>
>>>>> tune-$(CONFIG_ARM64) =
>>>>>
>>>>> # Evaluate tune cc-option calls now
>>>>>
>>>>>
>>>>>> diff --git a/arch/arm/cpu/armv7r/Makefile b/arch/arm/cpu/armv7r/Makefile
>>>>>> new file mode 100644
>>>>>> index 000000000000..3c66976dfa62
>>>>>> --- /dev/null
>>>>>> +++ b/arch/arm/cpu/armv7r/Makefile
>>>>>
>>>>> hmm..do we really need to create a separate folder? IIUC, the main
>>>>> difference between V7 and V7R is MMU vs MPU. IMHO, we should be able to
>>>>> get it using Kconfigs.
>>>>
>>>> I have used V7 for the initial port and then was checking V7M which is
>>>> already there and used it as pattern for writing this patch.
>>>>
>>>> I have debugged V7 and found that I need to disable CONFIG_HAS_VBAR
>>>> that's why I have created new symbol as for V7M.
>>>
>>> We should be able to create a kconfig symbol for that and select
>>> accordingly. Kernel does it the same way.
>>
>> What kernel Kconfig option are you talking about? (I didn't look at
>> Linux running on R5 but it is reasonable step).
>>
>> It is really a question if adding new Kconfig symbol for VBAR is the
>> right thing to do. I would need to add VBAR to every platform which has
>> CPU_V7.
>>
>>
>>>>
>>>> Definitely I am open to hear your suggestion
>>> I just did a couple of quick experiments and able to get v7-r support
>>> along with v7 support. let me know if you would like to take a look at
>>> it. Then Ill pick your patch 1/2 and post the series.
>>
>> I am definitely confident that this will work because I used that in
>> past. Definitely feel free to send it and I will take a look at retest
>> on R5.
>
> Sorry, I did not mean this patch does not work. It definitely works. I
> am trying to tell that with some kconfig changes we should be able to
> re-use armv7 folder instead of creating new folder. Apologies if my
> reply has communicated wrongly.
I know that it will work. Please send it and I will take a look. The
same is for v7m which can be also squashed with v7 + some Kconfig options.
Thanks,
Michal
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-04-24 12:53 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-20 13:51 [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Michal Simek
2018-04-20 13:51 ` [U-Boot] [PATCH 2/2] arm: zynqmp: Add ZynqMP minimal R5 support Michal Simek
2018-04-23 3:53 ` [U-Boot] [PATCH 1/2] arm: Add minimal support for Cortex-R5 Lokesh Vutla
2018-04-23 6:26 ` Michal Simek
2018-04-24 4:45 ` Lokesh Vutla
2018-04-24 12:24 ` Michal Simek
2018-04-24 12:49 ` Lokesh Vutla
2018-04-24 12:53 ` Michal Simek
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.