[PATCH 00/22] xen/arm: Bunch of clean-ups

[PATCH 00/22] xen/arm: Bunch of clean-ups

[Julien Grall]

Hi all,

This patch series is a bunch of clean-ups I have collected the past few weeks.

The main goal is to reduce the scope of some includes and reduce the size of
processor.h by moving some parts in new/current headers.

Cheers,

Julien Grall (22):
  xen/arm: traps: Constify show_registers parameters
  xen/arm: regs: Convert guest_mode to a static inline helper
  xen/arm: Remove __init from prototype
  xen/arm: bugs: Move do_bug_frame to traps.h
  xen/arm: Consolidate CPU identification in cpufeature.{c,h}
  xen/arm: Move VABORT_GEN_BY_GUEST to traps.h and turned into inline
  xen/arm: gic-3: Remove unused includes
  xen/arm: gic-v3: Re-order includes in alphabetical order
  xen/arm: Move HSR defines in a new header hsr.h
  xen/arm: Move SYSREG accessors in sysregs.h
  xen/arm: Move out of processor.h traps related variable/function
  xen/arm: Only include stringify.h when necessary
  xen/arm: Only include vreg.h when necessary
  xen/arm: Remove unnecessary includes in asm/vgic.h
  xen/arm: Remove unnecessary includes in asm/mmio.h
  xen/arm: Remove unnecessary includes in traps.c
  xen/arm: Remove unnecessary includes in asm/p2m.h
  xen/arm: Remove unnecessary includes in asm-arm/acpi.h
  xen/arm: Remove unnecessary include in asm-arm/atomic.h
  xen/arm: Remove unnecessary includes in asm/current.h
  xen/arm: platform: Don't include p2m.h in exynos5 and omap5
  xen/arm: Move vgic_* helpers from gic.h to vgic.h

 xen/arch/arm/Makefile                 |   1 -
 xen/arch/arm/acpi/lib.c               |   1 +
 xen/arch/arm/arm32/entry.S            |   1 +
 xen/arch/arm/arm32/proc-v7.S          |   1 +
 xen/arch/arm/arm32/traps.c            |   1 +
 xen/arch/arm/arm64/traps.c            |   1 +
 xen/arch/arm/bootfdt.c                |   2 +-
 xen/arch/arm/cpu.c                    |  68 -------
 xen/arch/arm/cpuerrata.c              |   1 +
 xen/arch/arm/cpufeature.c             |  42 ++++
 xen/arch/arm/device.c                 |   1 +
 xen/arch/arm/gic-v3-lpi.c             |   1 +
 xen/arch/arm/gic-v3.c                 |  28 ++-
 xen/arch/arm/platforms/exynos5.c      |   1 -
 xen/arch/arm/platforms/omap5.c        |   1 -
 xen/arch/arm/psci.c                   |   1 +
 xen/arch/arm/traps.c                  |  25 ++-
 xen/arch/arm/vcpreg.c                 |   1 +
 xen/arch/arm/vgic-v2.c                |   1 +
 xen/arch/arm/vgic-v3-its.c            |   1 +
 xen/arch/arm/vpl011.c                 |   1 +
 xen/include/asm-arm/acpi.h            |   8 +-
 xen/include/asm-arm/alternative.h     |   3 +-
 xen/include/asm-arm/arm32/processor.h |  62 ------
 xen/include/asm-arm/arm32/sysregs.h   |  75 ++++++++
 xen/include/asm-arm/arm64/hsr.h       | 122 ++++++++++++
 xen/include/asm-arm/arm64/processor.h |  27 ---
 xen/include/asm-arm/arm64/sysregs.h   | 132 +++----------
 xen/include/asm-arm/atomic.h          |   2 -
 xen/include/asm-arm/bug.h             |   4 -
 xen/include/asm-arm/cpregs.h          |   2 -
 xen/include/asm-arm/cpufeature.h      | 134 +++++++++++++
 xen/include/asm-arm/current.h         |   2 -
 xen/include/asm-arm/device.h          |  10 +-
 xen/include/asm-arm/event.h           |   1 -
 xen/include/asm-arm/gic.h             |   3 -
 xen/include/asm-arm/hsr.h             | 217 +++++++++++++++++++++
 xen/include/asm-arm/mmio.h            |   4 +-
 xen/include/asm-arm/p2m.h             |   3 -
 xen/include/asm-arm/page.h            |   1 +
 xen/include/asm-arm/percpu.h          |   8 +-
 xen/include/asm-arm/platform.h        |   7 +-
 xen/include/asm-arm/processor.h       | 352 +---------------------------------
 xen/include/asm-arm/regs.h            |  22 ++-
 xen/include/asm-arm/setup.h           |   9 +-
 xen/include/asm-arm/sysregs.h         |  22 +++
 xen/include/asm-arm/time.h            |   2 +
 xen/include/asm-arm/traps.h           |  15 ++
 xen/include/asm-arm/vgic.h            |   9 +-
 xen/include/asm-arm/vpl011.h          |   1 -
 xen/include/xen/device_tree.h         |   5 +-
 51 files changed, 732 insertions(+), 713 deletions(-)
 delete mode 100644 xen/arch/arm/cpu.c
 create mode 100644 xen/include/asm-arm/arm32/sysregs.h
 create mode 100644 xen/include/asm-arm/arm64/hsr.h
 create mode 100644 xen/include/asm-arm/hsr.h
 create mode 100644 xen/include/asm-arm/sysregs.h

-- 
2.11.0


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[PATCH 01/22] xen/arm: traps: Constify show_registers parameters

[Julien Grall]

show_registers helpers are not meant to modify any parameters.
So constify them.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/traps.c            | 14 +++++++-------
 xen/include/asm-arm/processor.h |  2 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 51d2e42c77..9eec51ea90 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -787,8 +787,8 @@ static const char *mode_string(uint32_t cpsr)
     return mode_strings[mode] ? : "Unknown";
 }
 
-static void show_registers_32(struct cpu_user_regs *regs,
-                              struct reg_ctxt *ctxt,
+static void show_registers_32(const struct cpu_user_regs *regs,
+                              const struct reg_ctxt *ctxt,
                               int guest_mode,
                               const struct vcpu *v)
 {
@@ -864,8 +864,8 @@ static void show_registers_32(struct cpu_user_regs *regs,
 }
 
 #ifdef CONFIG_ARM_64
-static void show_registers_64(struct cpu_user_regs *regs,
-                              struct reg_ctxt *ctxt,
+static void show_registers_64(const struct cpu_user_regs *regs,
+                              const struct reg_ctxt *ctxt,
                               int guest_mode,
                               const struct vcpu *v)
 {
@@ -925,8 +925,8 @@ static void show_registers_64(struct cpu_user_regs *regs,
 }
 #endif
 
-static void _show_registers(struct cpu_user_regs *regs,
-                            struct reg_ctxt *ctxt,
+static void _show_registers(const struct cpu_user_regs *regs,
+                            const struct reg_ctxt *ctxt,
                             int guest_mode,
                             const struct vcpu *v)
 {
@@ -981,7 +981,7 @@ static void _show_registers(struct cpu_user_regs *regs,
     printk("\n");
 }
 
-void show_registers(struct cpu_user_regs *regs)
+void show_registers(const struct cpu_user_regs *regs)
 {
     struct reg_ctxt ctxt;
     ctxt.sctlr_el1 = READ_SYSREG(SCTLR_EL1);
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 8016cf306f..efa33b4665 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -794,7 +794,7 @@ void init_traps(void);
 void panic_PAR(uint64_t par);
 
 void show_execution_state(struct cpu_user_regs *regs);
-void show_registers(struct cpu_user_regs *regs);
+void show_registers(const struct cpu_user_regs *regs);
 //#define dump_execution_state() run_in_exception_handler(show_execution_state)
 #define dump_execution_state() WARN()
 
-- 
2.11.0


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Re: [PATCH 01/22] xen/arm: traps: Constify show_registers parameters

[Andrii Anisov]

Hello Julien,


On 18.10.18 16:20, Julien Grall wrote:
> show_registers helpers are not meant to modify any parameters.
> So constify them.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---
>   xen/arch/arm/traps.c            | 14 +++++++-------
>   xen/include/asm-arm/processor.h |  2 +-
>   2 files changed, 8 insertions(+), 8 deletions(-)
The file xen/arch/arm/traps.c has a bunch of show functions except for 
registers. For stack, trace, etc. So maybe constify their parameters 
right away?

-- 

*Andrii Anisov*


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Re: [PATCH 01/22] xen/arm: traps: Constify show_registers parameters

[Julien Grall]

On 10/24/18 3:03 PM, Andrii Anisov wrote:
> Hello Julien,

Hi,

> 
> 
> On 18.10.18 16:20, Julien Grall wrote:
>> show_registers helpers are not meant to modify any parameters.
>> So constify them.
>>
>> Signed-off-by: Julien Grall <julien.grall@arm.com>
>> ---
>>    xen/arch/arm/traps.c            | 14 +++++++-------
>>    xen/include/asm-arm/processor.h |  2 +-
>>    2 files changed, 8 insertions(+), 8 deletions(-)
> The file xen/arch/arm/traps.c has a bunch of show functions except for
> registers. For stack, trace, etc. So maybe constify their parameters
> right away?

Good idea. I will update the series.

Cheers,

-- 
Julien Grall

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[PATCH 02/22] xen/arm: regs: Convert guest_mode to a static inline helper

[Julien Grall]

At the same time, switch the parameter guest_mode from int to bool

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/traps.c       |  6 +++---
 xen/include/asm-arm/regs.h | 22 ++++++++++++----------
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 9eec51ea90..1b0b27434f 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -789,7 +789,7 @@ static const char *mode_string(uint32_t cpsr)
 
 static void show_registers_32(const struct cpu_user_regs *regs,
                               const struct reg_ctxt *ctxt,
-                              int guest_mode,
+                              bool guest_mode,
                               const struct vcpu *v)
 {
 
@@ -866,7 +866,7 @@ static void show_registers_32(const struct cpu_user_regs *regs,
 #ifdef CONFIG_ARM_64
 static void show_registers_64(const struct cpu_user_regs *regs,
                               const struct reg_ctxt *ctxt,
-                              int guest_mode,
+                              bool guest_mode,
                               const struct vcpu *v)
 {
 
@@ -927,7 +927,7 @@ static void show_registers_64(const struct cpu_user_regs *regs,
 
 static void _show_registers(const struct cpu_user_regs *regs,
                             const struct reg_ctxt *ctxt,
-                            int guest_mode,
+                            bool guest_mode,
                             const struct vcpu *v)
 {
     print_xen_info();
diff --git a/xen/include/asm-arm/regs.h b/xen/include/asm-arm/regs.h
index 2440edb29a..ddc6eba9ce 100644
--- a/xen/include/asm-arm/regs.h
+++ b/xen/include/asm-arm/regs.h
@@ -5,8 +5,10 @@
 
 #ifndef __ASSEMBLY__
 
+#include <xen/lib.h>
 #include <xen/types.h>
 #include <public/xen.h>
+#include <asm/current.h>
 #include <asm/processor.h>
 
 #define psr_mode(psr,m) (((psr) & PSR_MODE_MASK) == m)
@@ -37,16 +39,16 @@
     (psr_mode((r)->cpsr,PSR_MODE_EL0t) || usr_mode(r))
 #endif
 
-#define guest_mode(r)                                                         \
-({                                                                            \
-    unsigned long diff = (char *)guest_cpu_user_regs() - (char *)(r);         \
-    /* Frame pointer must point into current CPU stack. */                    \
-    ASSERT(diff < STACK_SIZE);                                                \
-    /* If not a guest frame, it must be a hypervisor frame. */                \
-    ASSERT((diff == 0) || hyp_mode(r));                                       \
-    /* Return TRUE if it's a guest frame. */                                  \
-    (diff == 0);                                                              \
-})
+static inline bool guest_mode(const struct cpu_user_regs *r)
+{
+    unsigned long diff = (char *)guest_cpu_user_regs() - (char *)(r);
+    /* Frame pointer must point into current CPU stack. */
+    ASSERT(diff < STACK_SIZE);
+    /* If not a guest frame, it must be a hypervisor frame. */
+    ASSERT((diff == 0) || hyp_mode(r));
+    /* Return TRUE if it's a guest frame. */
+    return (diff == 0);
+}
 
 #define return_reg(v) ((v)->arch.cpu_info->guest_cpu_user_regs.r0)
 
-- 
2.11.0


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Re: [PATCH 02/22] xen/arm: regs: Convert guest_mode to a static inline helper

[Andrii Anisov]

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>

-- 

*Andrii Anisov*

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[PATCH 03/22] xen/arm: Remove __init from prototype

[Julien Grall]

In Xen, it is common to add __init to the declaration and not the
prototype. Remove the few __init on some prototypes which allows to
avoid the inclusion of init.h in headers.

With these changes, init.h is now required to be included on some c
files. Also, add __init where it was missing in declaration.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/acpi/lib.c           |  1 +
 xen/arch/arm/bootfdt.c            |  2 +-
 xen/arch/arm/cpuerrata.c          |  1 +
 xen/arch/arm/device.c             |  1 +
 xen/arch/arm/psci.c               |  1 +
 xen/include/asm-arm/acpi.h        |  7 +++----
 xen/include/asm-arm/alternative.h |  3 +--
 xen/include/asm-arm/device.h      | 10 ++++------
 xen/include/asm-arm/platform.h    |  7 +++----
 xen/include/asm-arm/setup.h       |  6 +++---
 xen/include/xen/device_tree.h     |  5 ++---
 11 files changed, 21 insertions(+), 23 deletions(-)

diff --git a/xen/arch/arm/acpi/lib.c b/xen/arch/arm/acpi/lib.c
index ada5298a38..4fc6e17322 100644
--- a/xen/arch/arm/acpi/lib.c
+++ b/xen/arch/arm/acpi/lib.c
@@ -22,6 +22,7 @@
  */
 
 #include <xen/acpi.h>
+#include <xen/init.h>
 #include <xen/mm.h>
 
 char *__acpi_map_table(paddr_t phys, unsigned long size)
diff --git a/xen/arch/arm/bootfdt.c b/xen/arch/arm/bootfdt.c
index 8eba42c7b9..44af11c0fd 100644
--- a/xen/arch/arm/bootfdt.c
+++ b/xen/arch/arm/bootfdt.c
@@ -349,7 +349,7 @@ size_t __init boot_fdt_info(const void *fdt, paddr_t paddr)
     return fdt_totalsize(fdt);
 }
 
-const char *boot_fdt_cmdline(const void *fdt)
+const __init char *boot_fdt_cmdline(const void *fdt)
 {
     int node;
     const struct fdt_property *prop;
diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
index 97a118293b..adf88e7bdc 100644
--- a/xen/arch/arm/cpuerrata.c
+++ b/xen/arch/arm/cpuerrata.c
@@ -1,5 +1,6 @@
 #include <xen/cpu.h>
 #include <xen/cpumask.h>
+#include <xen/init.h>
 #include <xen/mm.h>
 #include <xen/sizes.h>
 #include <xen/smp.h>
diff --git a/xen/arch/arm/device.c b/xen/arch/arm/device.c
index a0072c1563..70cd6c1a19 100644
--- a/xen/arch/arm/device.c
+++ b/xen/arch/arm/device.c
@@ -19,6 +19,7 @@
 
 #include <asm/device.h>
 #include <xen/errno.h>
+#include <xen/init.h>
 #include <xen/lib.h>
 
 extern const struct device_desc _sdevice[], _edevice[];
diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c
index a93121f43b..d23cb8e76e 100644
--- a/xen/arch/arm/psci.c
+++ b/xen/arch/arm/psci.c
@@ -19,6 +19,7 @@
 
 
 #include <xen/types.h>
+#include <xen/init.h>
 #include <xen/mm.h>
 #include <xen/smp.h>
 #include <asm/cpufeature.h>
diff --git a/xen/include/asm-arm/acpi.h b/xen/include/asm-arm/acpi.h
index c183b6bb6e..feec4fb0ac 100644
--- a/xen/include/asm-arm/acpi.h
+++ b/xen/include/asm-arm/acpi.h
@@ -23,7 +23,6 @@
 #ifndef _ASM_ARM_ACPI_H
 #define _ASM_ARM_ACPI_H
 
-#include <xen/init.h>
 #include <asm/page.h>
 #include <asm/setup.h>
 
@@ -43,9 +42,9 @@ typedef enum {
     TBL_MMAX,
 } EFI_MEM_RES;
 
-bool __init acpi_psci_present(void);
-bool __init acpi_psci_hvc_present(void);
-void __init acpi_smp_init_cpus(void);
+bool acpi_psci_present(void);
+bool acpi_psci_hvc_present(void);
+void acpi_smp_init_cpus(void);
 
 /*
  * This function returns the offset of a given ACPI/EFI table in the allocated
diff --git a/xen/include/asm-arm/alternative.h b/xen/include/asm-arm/alternative.h
index 9b4b02811b..dedb6dd001 100644
--- a/xen/include/asm-arm/alternative.h
+++ b/xen/include/asm-arm/alternative.h
@@ -7,7 +7,6 @@
 
 #ifndef __ASSEMBLY__
 
-#include <xen/init.h>
 #include <xen/types.h>
 #include <xen/stringify.h>
 
@@ -28,7 +27,7 @@ typedef void (*alternative_cb_t)(const struct alt_instr *alt,
 				 const uint32_t *origptr, uint32_t *updptr,
 				 int nr_inst);
 
-void __init apply_alternatives_all(void);
+void apply_alternatives_all(void);
 int apply_alternatives(const struct alt_instr *start, const struct alt_instr *end);
 
 #define ALTINSTR_ENTRY(feature, cb)					      \
diff --git a/xen/include/asm-arm/device.h b/xen/include/asm-arm/device.h
index 6734ae8efd..63a0f3631d 100644
--- a/xen/include/asm-arm/device.h
+++ b/xen/include/asm-arm/device.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_ARM_DEVICE_H
 #define __ASM_ARM_DEVICE_H
 
-#include <xen/init.h>
-
 enum device_type
 {
     DEV_DT,
@@ -68,8 +66,8 @@ struct acpi_device_desc {
  *
  *  Return 0 on success.
  */
-int __init acpi_device_init(enum device_class class,
-                            const void *data, int class_type);
+int acpi_device_init(enum device_class class,
+                     const void *data, int class_type);
 
 /**
  *  device_init - Initialize a device
@@ -79,8 +77,8 @@ int __init acpi_device_init(enum device_class class,
  *
  *  Return 0 on success.
  */
-int __init device_init(struct dt_device_node *dev, enum device_class class,
-                       const void *data);
+int device_init(struct dt_device_node *dev, enum device_class class,
+                const void *data);
 
 /**
  * device_get_type - Get the type of the device
diff --git a/xen/include/asm-arm/platform.h b/xen/include/asm-arm/platform.h
index 2591d7bb03..bf9258156c 100644
--- a/xen/include/asm-arm/platform.h
+++ b/xen/include/asm-arm/platform.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_ARM_PLATFORM_H
 #define __ASM_ARM_PLATFORM_H
 
-#include <xen/init.h>
 #include <xen/sched.h>
 #include <xen/mm.h>
 #include <xen/device_tree.h>
@@ -46,9 +45,9 @@ struct platform_desc {
  */
 #define PLATFORM_QUIRK_GIC_64K_STRIDE (1 << 0)
 
-void __init platform_init(void);
-int __init platform_init_time(void);
-int __init platform_specific_mapping(struct domain *d);
+void platform_init(void);
+int platform_init_time(void);
+int platform_specific_mapping(struct domain *d);
 #ifdef CONFIG_ARM_32
 int platform_smp_init(void);
 int platform_cpu_up(int cpu);
diff --git a/xen/include/asm-arm/setup.h b/xen/include/asm-arm/setup.h
index 0cc3330807..5f41ba0cba 100644
--- a/xen/include/asm-arm/setup.h
+++ b/xen/include/asm-arm/setup.h
@@ -74,14 +74,14 @@ void discard_initial_modules(void);
 void dt_unreserved_regions(paddr_t s, paddr_t e,
                            void (*cb)(paddr_t, paddr_t), int first);
 
-size_t __init boot_fdt_info(const void *fdt, paddr_t paddr);
-const char __init *boot_fdt_cmdline(const void *fdt);
+size_t boot_fdt_info(const void *fdt, paddr_t paddr);
+const char *boot_fdt_cmdline(const void *fdt);
 
 struct bootmodule *add_boot_module(bootmodule_kind kind,
                                    paddr_t start, paddr_t size,
                                    const char *cmdline);
 struct bootmodule *boot_module_find_by_kind(bootmodule_kind kind);
-const char * __init boot_module_kind_as_string(bootmodule_kind kind);
+const char *boot_module_kind_as_string(bootmodule_kind kind);
 
 #endif
 /*
diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h
index 91fa0b6f61..7408a6c48c 100644
--- a/xen/include/xen/device_tree.h
+++ b/xen/include/xen/device_tree.h
@@ -15,7 +15,6 @@
 #include <public/xen.h>
 #include <public/device_tree_defs.h>
 #include <xen/kernel.h>
-#include <xen/init.h>
 #include <xen/string.h>
 #include <xen/types.h>
 #include <xen/list.h>
@@ -169,7 +168,7 @@ int device_tree_for_each_node(const void *fdt,
  * Create a hierarchical device tree for the host DTB to be able
  * to retrieve parents.
  */
-void __init dt_unflatten_host_device_tree(void);
+void dt_unflatten_host_device_tree(void);
 
 /**
  * IRQ translation callback
@@ -204,7 +203,7 @@ extern const struct dt_device_node *dt_interrupt_controller;
  *
  * If found, return the interrupt controller device node.
  */
-struct dt_device_node * __init
+struct dt_device_node *
 dt_find_interrupt_controller(const struct dt_device_match *matches);
 
 #define dt_prop_cmp(s1, s2) strcmp((s1), (s2))
-- 
2.11.0


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Re: [PATCH 03/22] xen/arm: Remove __init from prototype

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> In Xen, it is common to add __init to the declaration and not the
> prototype. Remove the few __init on some prototypes which allows to
> avoid the inclusion of init.h in headers.
>
> With these changes, init.h is now required to be included on some c
> files. Also, add __init where it was missing in declaration.
>
> Signed-off-by: Julien Grall<julien.grall@arm.com>
A file xen/include/asm-arm/iommu.h also has prototypes with `__init`, 
but missed in your patch.

-- 

*Andrii Anisov*


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[PATCH 04/22] xen/arm: bugs: Move do_bug_frame to traps.h

[Julien Grall]

do_bug_frame is only necessary when trapping. This allows to remove
processor.h include.

However, time.h was missing an include resulting to compilation error if
processor.h is removed from bug.h.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/arm32/traps.c  | 1 +
 xen/include/asm-arm/bug.h   | 4 ----
 xen/include/asm-arm/time.h  | 2 ++
 xen/include/asm-arm/traps.h | 2 ++
 4 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/xen/arch/arm/arm32/traps.c b/xen/arch/arm/arm32/traps.c
index 4f27543dec..76f714a168 100644
--- a/xen/arch/arm/arm32/traps.c
+++ b/xen/arch/arm/arm32/traps.c
@@ -22,6 +22,7 @@
 #include <public/xen.h>
 
 #include <asm/processor.h>
+#include <asm/traps.h>
 
 void do_trap_reset(struct cpu_user_regs *regs)
 {
diff --git a/xen/include/asm-arm/bug.h b/xen/include/asm-arm/bug.h
index 4704e2d858..36c803357c 100644
--- a/xen/include/asm-arm/bug.h
+++ b/xen/include/asm-arm/bug.h
@@ -1,8 +1,6 @@
 #ifndef __ARM_BUG_H__
 #define __ARM_BUG_H__
 
-#include <asm/processor.h>
-
 #if defined(CONFIG_ARM_32)
 # include <asm/arm32/bug.h>
 #elif defined(CONFIG_ARM_64)
@@ -77,8 +75,6 @@ extern const struct bug_frame __start_bug_frames[],
                               __stop_bug_frames_1[],
                               __stop_bug_frames_2[];
 
-int do_bug_frame(struct cpu_user_regs *regs, vaddr_t pc);
-
 #endif /* __ARM_BUG_H__ */
 /*
  * Local variables:
diff --git a/xen/include/asm-arm/time.h b/xen/include/asm-arm/time.h
index 19a4515e72..ea88e76304 100644
--- a/xen/include/asm-arm/time.h
+++ b/xen/include/asm-arm/time.h
@@ -1,6 +1,8 @@
 #ifndef __ARM_TIME_H__
 #define __ARM_TIME_H__
 
+#include <asm/processor.h>
+
 #define DT_MATCH_TIMER                      \
     DT_MATCH_COMPATIBLE("arm,armv7-timer"), \
     DT_MATCH_COMPATIBLE("arm,armv8-timer")
diff --git a/xen/include/asm-arm/traps.h b/xen/include/asm-arm/traps.h
index 70b52d1d16..059aa370c3 100644
--- a/xen/include/asm-arm/traps.h
+++ b/xen/include/asm-arm/traps.h
@@ -43,6 +43,8 @@ void do_cp(struct cpu_user_regs *regs, const union hsr hsr);
 void do_trap_smc(struct cpu_user_regs *regs, const union hsr hsr);
 void do_trap_hvc_smccc(struct cpu_user_regs *regs);
 
+int do_bug_frame(struct cpu_user_regs *regs, vaddr_t pc);
+
 #endif /* __ASM_ARM_TRAPS__ */
 /*
  * Local variables:
-- 
2.11.0


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Re: [PATCH 04/22] xen/arm: bugs: Move do_bug_frame to traps.h

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> do_bug_frame is only necessary when trapping. This allows to remove
> processor.h include.
>
> However, time.h was missing an include resulting to compilation error if
> processor.h is removed from bug.h.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---
>   xen/arch/arm/arm32/traps.c  | 1 +
>   xen/include/asm-arm/bug.h   | 4 ----
>   xen/include/asm-arm/time.h  | 2 ++
>   xen/include/asm-arm/traps.h | 2 ++
>   4 files changed, 5 insertions(+), 4 deletions(-)

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>

-- 

*Andrii Anisov*


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[PATCH 05/22] xen/arm: Consolidate CPU identification in cpufeature.{c, h}

[Julien Grall]

At the moment, CPU Identification is spread accross cpu.c, cpufeature.c,
processor.h, cpufeature.h. It would be better to keep everything
together in a single place.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/Makefile            |   1 -
 xen/arch/arm/cpu.c               |  68 --------------------
 xen/arch/arm/cpufeature.c        |  42 ++++++++++++
 xen/arch/arm/vcpreg.c            |   1 +
 xen/include/asm-arm/cpufeature.h | 134 ++++++++++++++++++++++++++++++++++++++
 xen/include/asm-arm/processor.h  | 135 ---------------------------------------
 6 files changed, 177 insertions(+), 204 deletions(-)
 delete mode 100644 xen/arch/arm/cpu.c

diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 37fa8268b3..6d91ba7c46 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -6,7 +6,6 @@ subdir-$(CONFIG_ACPI) += acpi
 
 obj-$(CONFIG_HAS_ALTERNATIVE) += alternative.o
 obj-y += bootfdt.init.o
-obj-y += cpu.o
 obj-y += cpuerrata.o
 obj-y += cpufeature.o
 obj-y += decode.o
diff --git a/xen/arch/arm/cpu.c b/xen/arch/arm/cpu.c
deleted file mode 100644
index 9595f1d63a..0000000000
--- a/xen/arch/arm/cpu.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <xen/init.h>
-#include <xen/lib.h>
-#include <xen/sched.h>
-
-#include <asm/processor.h>
-
-void identify_cpu(struct cpuinfo_arm *c)
-{
-        c->midr.bits = READ_SYSREG32(MIDR_EL1);
-        c->mpidr.bits = READ_SYSREG(MPIDR_EL1);
-
-#ifdef CONFIG_ARM_64
-        c->pfr64.bits[0] = READ_SYSREG64(ID_AA64PFR0_EL1);
-        c->pfr64.bits[1] = READ_SYSREG64(ID_AA64PFR1_EL1);
-
-        c->dbg64.bits[0] = READ_SYSREG64(ID_AA64DFR0_EL1);
-        c->dbg64.bits[1] = READ_SYSREG64(ID_AA64DFR1_EL1);
-
-        c->aux64.bits[0] = READ_SYSREG64(ID_AA64AFR0_EL1);
-        c->aux64.bits[1] = READ_SYSREG64(ID_AA64AFR1_EL1);
-
-        c->mm64.bits[0]  = READ_SYSREG64(ID_AA64MMFR0_EL1);
-        c->mm64.bits[1]  = READ_SYSREG64(ID_AA64MMFR1_EL1);
-
-        c->isa64.bits[0] = READ_SYSREG64(ID_AA64ISAR0_EL1);
-        c->isa64.bits[1] = READ_SYSREG64(ID_AA64ISAR1_EL1);
-#endif
-
-        c->pfr32.bits[0] = READ_SYSREG32(ID_PFR0_EL1);
-        c->pfr32.bits[1] = READ_SYSREG32(ID_PFR1_EL1);
-
-        c->dbg32.bits[0] = READ_SYSREG32(ID_DFR0_EL1);
-
-        c->aux32.bits[0] = READ_SYSREG32(ID_AFR0_EL1);
-
-        c->mm32.bits[0]  = READ_SYSREG32(ID_MMFR0_EL1);
-        c->mm32.bits[1]  = READ_SYSREG32(ID_MMFR1_EL1);
-        c->mm32.bits[2]  = READ_SYSREG32(ID_MMFR2_EL1);
-        c->mm32.bits[3]  = READ_SYSREG32(ID_MMFR3_EL1);
-
-        c->isa32.bits[0] = READ_SYSREG32(ID_ISAR0_EL1);
-        c->isa32.bits[1] = READ_SYSREG32(ID_ISAR1_EL1);
-        c->isa32.bits[2] = READ_SYSREG32(ID_ISAR2_EL1);
-        c->isa32.bits[3] = READ_SYSREG32(ID_ISAR3_EL1);
-        c->isa32.bits[4] = READ_SYSREG32(ID_ISAR4_EL1);
-        c->isa32.bits[5] = READ_SYSREG32(ID_ISAR5_EL1);
-}
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c
index 3aaff4c0e6..44126dbf07 100644
--- a/xen/arch/arm/cpufeature.c
+++ b/xen/arch/arm/cpufeature.c
@@ -97,6 +97,48 @@ int enable_nonboot_cpu_caps(const struct arm_cpu_capabilities *caps)
     return rc;
 }
 
+void identify_cpu(struct cpuinfo_arm *c)
+{
+        c->midr.bits = READ_SYSREG32(MIDR_EL1);
+        c->mpidr.bits = READ_SYSREG(MPIDR_EL1);
+
+#ifdef CONFIG_ARM_64
+        c->pfr64.bits[0] = READ_SYSREG64(ID_AA64PFR0_EL1);
+        c->pfr64.bits[1] = READ_SYSREG64(ID_AA64PFR1_EL1);
+
+        c->dbg64.bits[0] = READ_SYSREG64(ID_AA64DFR0_EL1);
+        c->dbg64.bits[1] = READ_SYSREG64(ID_AA64DFR1_EL1);
+
+        c->aux64.bits[0] = READ_SYSREG64(ID_AA64AFR0_EL1);
+        c->aux64.bits[1] = READ_SYSREG64(ID_AA64AFR1_EL1);
+
+        c->mm64.bits[0]  = READ_SYSREG64(ID_AA64MMFR0_EL1);
+        c->mm64.bits[1]  = READ_SYSREG64(ID_AA64MMFR1_EL1);
+
+        c->isa64.bits[0] = READ_SYSREG64(ID_AA64ISAR0_EL1);
+        c->isa64.bits[1] = READ_SYSREG64(ID_AA64ISAR1_EL1);
+#endif
+
+        c->pfr32.bits[0] = READ_SYSREG32(ID_PFR0_EL1);
+        c->pfr32.bits[1] = READ_SYSREG32(ID_PFR1_EL1);
+
+        c->dbg32.bits[0] = READ_SYSREG32(ID_DFR0_EL1);
+
+        c->aux32.bits[0] = READ_SYSREG32(ID_AFR0_EL1);
+
+        c->mm32.bits[0]  = READ_SYSREG32(ID_MMFR0_EL1);
+        c->mm32.bits[1]  = READ_SYSREG32(ID_MMFR1_EL1);
+        c->mm32.bits[2]  = READ_SYSREG32(ID_MMFR2_EL1);
+        c->mm32.bits[3]  = READ_SYSREG32(ID_MMFR3_EL1);
+
+        c->isa32.bits[0] = READ_SYSREG32(ID_ISAR0_EL1);
+        c->isa32.bits[1] = READ_SYSREG32(ID_ISAR1_EL1);
+        c->isa32.bits[2] = READ_SYSREG32(ID_ISAR2_EL1);
+        c->isa32.bits[3] = READ_SYSREG32(ID_ISAR3_EL1);
+        c->isa32.bits[4] = READ_SYSREG32(ID_ISAR4_EL1);
+        c->isa32.bits[5] = READ_SYSREG32(ID_ISAR5_EL1);
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/arm/vcpreg.c b/xen/arch/arm/vcpreg.c
index b04d996fd3..7b783e4bcc 100644
--- a/xen/arch/arm/vcpreg.c
+++ b/xen/arch/arm/vcpreg.c
@@ -18,6 +18,7 @@
 
 #include <xen/sched.h>
 
+#include <asm/cpufeature.h>
 #include <asm/cpregs.h>
 #include <asm/current.h>
 #include <asm/regs.h>
diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h
index 2d82264427..17de928467 100644
--- a/xen/include/asm-arm/cpufeature.h
+++ b/xen/include/asm-arm/cpufeature.h
@@ -104,6 +104,140 @@ void update_cpu_capabilities(const struct arm_cpu_capabilities *caps,
 void enable_cpu_capabilities(const struct arm_cpu_capabilities *caps);
 int enable_nonboot_cpu_caps(const struct arm_cpu_capabilities *caps);
 
+/*
+ * capabilities of CPUs
+ */
+struct cpuinfo_arm {
+    union {
+        uint32_t bits;
+        struct {
+            unsigned long revision:4;
+            unsigned long part_number:12;
+            unsigned long architecture:4;
+            unsigned long variant:4;
+            unsigned long implementer:8;
+        };
+    } midr;
+    union {
+        register_t bits;
+        struct {
+            unsigned long aff0:8;
+            unsigned long aff1:8;
+            unsigned long aff2:8;
+            unsigned long mt:1; /* Multi-thread, iff MP == 1 */
+            unsigned long __res0:5;
+            unsigned long up:1; /* UP system, iff MP == 1 */
+            unsigned long mp:1; /* MP extensions */
+
+#ifdef CONFIG_ARM_64
+            unsigned long aff3:8;
+            unsigned long __res1:24;
+#endif
+        };
+    } mpidr;
+
+#ifdef CONFIG_ARM_64
+    /* 64-bit CPUID registers. */
+    union {
+        uint64_t bits[2];
+        struct {
+            unsigned long el0:4;
+            unsigned long el1:4;
+            unsigned long el2:4;
+            unsigned long el3:4;
+            unsigned long fp:4;   /* Floating Point */
+            unsigned long simd:4; /* Advanced SIMD */
+            unsigned long gic:4;  /* GIC support */
+            unsigned long __res0:28;
+            unsigned long csv2:4;
+            unsigned long __res1:4;
+        };
+    } pfr64;
+
+    struct {
+        uint64_t bits[2];
+    } dbg64;
+
+    struct {
+        uint64_t bits[2];
+    } aux64;
+
+    union {
+        uint64_t bits[2];
+        struct {
+            unsigned long pa_range:4;
+            unsigned long asid_bits:4;
+            unsigned long bigend:4;
+            unsigned long secure_ns:4;
+            unsigned long bigend_el0:4;
+            unsigned long tgranule_16K:4;
+            unsigned long tgranule_64K:4;
+            unsigned long tgranule_4K:4;
+            unsigned long __res0:32;
+
+            unsigned long hafdbs:4;
+            unsigned long vmid_bits:4;
+            unsigned long vh:4;
+            unsigned long hpds:4;
+            unsigned long lo:4;
+            unsigned long pan:4;
+            unsigned long __res1:8;
+            unsigned long __res2:32;
+        };
+    } mm64;
+
+    struct {
+        uint64_t bits[2];
+    } isa64;
+
+#endif
+
+    /*
+     * 32-bit CPUID registers. On ARMv8 these describe the properties
+     * when running in 32-bit mode.
+     */
+    union {
+        uint32_t bits[2];
+        struct {
+            unsigned long arm:4;
+            unsigned long thumb:4;
+            unsigned long jazelle:4;
+            unsigned long thumbee:4;
+            unsigned long __res0:16;
+
+            unsigned long progmodel:4;
+            unsigned long security:4;
+            unsigned long mprofile:4;
+            unsigned long virt:4;
+            unsigned long gentimer:4;
+            unsigned long __res1:12;
+        };
+    } pfr32;
+
+    struct {
+        uint32_t bits[1];
+    } dbg32;
+
+    struct {
+        uint32_t bits[1];
+    } aux32;
+
+    struct {
+        uint32_t bits[4];
+    } mm32;
+
+    struct {
+        uint32_t bits[6];
+    } isa32;
+};
+
+extern struct cpuinfo_arm boot_cpu_data;
+
+extern void identify_cpu(struct cpuinfo_arm *);
+
+extern struct cpuinfo_arm cpu_data[];
+#define current_cpu_data cpu_data[smp_processor_id()]
+
 #endif /* __ASSEMBLY__ */
 
 #endif
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index efa33b4665..f7a2e9a3ad 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -350,141 +350,6 @@
 
 #ifndef __ASSEMBLY__
 
-struct cpuinfo_arm {
-    union {
-        uint32_t bits;
-        struct {
-            unsigned long revision:4;
-            unsigned long part_number:12;
-            unsigned long architecture:4;
-            unsigned long variant:4;
-            unsigned long implementer:8;
-        };
-    } midr;
-    union {
-        register_t bits;
-        struct {
-            unsigned long aff0:8;
-            unsigned long aff1:8;
-            unsigned long aff2:8;
-            unsigned long mt:1; /* Multi-thread, iff MP == 1 */
-            unsigned long __res0:5;
-            unsigned long up:1; /* UP system, iff MP == 1 */
-            unsigned long mp:1; /* MP extensions */
-
-#ifdef CONFIG_ARM_64
-            unsigned long aff3:8;
-            unsigned long __res1:24;
-#endif
-        };
-    } mpidr;
-
-#ifdef CONFIG_ARM_64
-    /* 64-bit CPUID registers. */
-    union {
-        uint64_t bits[2];
-        struct {
-            unsigned long el0:4;
-            unsigned long el1:4;
-            unsigned long el2:4;
-            unsigned long el3:4;
-            unsigned long fp:4;   /* Floating Point */
-            unsigned long simd:4; /* Advanced SIMD */
-            unsigned long gic:4;  /* GIC support */
-            unsigned long __res0:28;
-            unsigned long csv2:4;
-            unsigned long __res1:4;
-        };
-    } pfr64;
-
-    struct {
-        uint64_t bits[2];
-    } dbg64;
-
-    struct {
-        uint64_t bits[2];
-    } aux64;
-
-    union {
-        uint64_t bits[2];
-        struct {
-            unsigned long pa_range:4;
-            unsigned long asid_bits:4;
-            unsigned long bigend:4;
-            unsigned long secure_ns:4;
-            unsigned long bigend_el0:4;
-            unsigned long tgranule_16K:4;
-            unsigned long tgranule_64K:4;
-            unsigned long tgranule_4K:4;
-            unsigned long __res0:32;
-
-            unsigned long hafdbs:4;
-            unsigned long vmid_bits:4;
-            unsigned long vh:4;
-            unsigned long hpds:4;
-            unsigned long lo:4;
-            unsigned long pan:4;
-            unsigned long __res1:8;
-            unsigned long __res2:32;
-        };
-    } mm64;
-
-    struct {
-        uint64_t bits[2];
-    } isa64;
-
-#endif
-
-    /*
-     * 32-bit CPUID registers. On ARMv8 these describe the properties
-     * when running in 32-bit mode.
-     */
-    union {
-        uint32_t bits[2];
-        struct {
-            unsigned long arm:4;
-            unsigned long thumb:4;
-            unsigned long jazelle:4;
-            unsigned long thumbee:4;
-            unsigned long __res0:16;
-
-            unsigned long progmodel:4;
-            unsigned long security:4;
-            unsigned long mprofile:4;
-            unsigned long virt:4;
-            unsigned long gentimer:4;
-            unsigned long __res1:12;
-        };
-    } pfr32;
-
-    struct {
-        uint32_t bits[1];
-    } dbg32;
-
-    struct {
-        uint32_t bits[1];
-    } aux32;
-
-    struct {
-        uint32_t bits[4];
-    } mm32;
-
-    struct {
-        uint32_t bits[6];
-    } isa32;
-};
-
-/*
- * capabilities of CPUs
- */
-
-extern struct cpuinfo_arm boot_cpu_data;
-
-extern void identify_cpu(struct cpuinfo_arm *);
-
-extern struct cpuinfo_arm cpu_data[];
-#define current_cpu_data cpu_data[smp_processor_id()]
-
 extern register_t __cpu_logical_map[];
 #define cpu_logical_map(cpu) __cpu_logical_map[cpu]
 
-- 
2.11.0


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Re: [PATCH 05/22] xen/arm: Consolidate CPU identification in cpufeature.{c, h}

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> At the moment, CPU Identification is spread accross cpu.c, cpufeature.c,
> processor.h, cpufeature.h. It would be better to keep everything
> together in a single place.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>


-- 

*Andrii Anisov*



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[PATCH 06/22] xen/arm: Move VABORT_GEN_BY_GUEST to traps.h and turned into inline

[Julien Grall]

The macro VABORT_GEN_BY_GUEST is only used by the trap code. So move it
to trap.h.

While moving the code, convert is to a static inline to allow typecheck.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/processor.h | 10 ----------
 xen/include/asm-arm/traps.h     | 10 ++++++++++
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index f7a2e9a3ad..5b6bd0c38c 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -683,16 +683,6 @@ void do_trap_guest_serror(struct cpu_user_regs *regs);
 
 register_t get_default_hcr_flags(void);
 
-/* Functions for pending virtual abort checking window. */
-void abort_guest_exit_start(void);
-void abort_guest_exit_end(void);
-
-#define VABORT_GEN_BY_GUEST(r)  \
-( \
-    ( (unsigned long)abort_guest_exit_start == (r)->pc ) || \
-    ( (unsigned long)abort_guest_exit_end == (r)->pc ) \
-)
-
 /*
  * Synchronize SError unless the feature is selected.
  * This is relying on the SErrors are currently unmasked.
diff --git a/xen/include/asm-arm/traps.h b/xen/include/asm-arm/traps.h
index 059aa370c3..c12e9e4082 100644
--- a/xen/include/asm-arm/traps.h
+++ b/xen/include/asm-arm/traps.h
@@ -45,6 +45,16 @@ void do_trap_hvc_smccc(struct cpu_user_regs *regs);
 
 int do_bug_frame(struct cpu_user_regs *regs, vaddr_t pc);
 
+/* Functions for pending virtual abort checking window. */
+void abort_guest_exit_start(void);
+void abort_guest_exit_end(void);
+
+static inline bool VABORT_GEN_BY_GUEST(const struct cpu_user_regs *regs)
+{
+    return ((unsigned long)abort_guest_exit_start == regs->pc) ||
+        (unsigned long)abort_guest_exit_end == regs->pc;
+}
+
 #endif /* __ASM_ARM_TRAPS__ */
 /*
  * Local variables:
-- 
2.11.0


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Re: [PATCH 06/22] xen/arm: Move VABORT_GEN_BY_GUEST to traps.h and turned into inline

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> The macro VABORT_GEN_BY_GUEST is only used by the trap code. So move it
> to trap.h.
>
> While moving the code, convert is to a static inline to allow typecheck.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

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[PATCH 07/22] xen/arm: gic-3: Remove unused includes

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/gic-v3.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index 2952335d05..8ff4e0f08e 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -23,7 +23,6 @@
 
 #include <xen/lib.h>
 #include <xen/init.h>
-#include <xen/cpu.h>
 #include <xen/mm.h>
 #include <xen/irq.h>
 #include <xen/iocap.h>
@@ -33,18 +32,14 @@
 #include <xen/device_tree.h>
 #include <xen/sizes.h>
 #include <xen/libfdt/libfdt.h>
-#include <xen/sort.h>
 #include <xen/acpi.h>
 #include <acpi/actables.h>
-#include <asm/p2m.h>
-#include <asm/domain.h>
 #include <asm/io.h>
 #include <asm/device.h>
 #include <asm/gic.h>
 #include <asm/gic_v3_defs.h>
 #include <asm/gic_v3_its.h>
 #include <asm/cpufeature.h>
-#include <asm/acpi.h>
 
 /* Global state */
 static struct {
-- 
2.11.0


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Re: [PATCH 07/22] xen/arm: gic-3: Remove unused includes

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

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[PATCH 08/22] xen/arm: gic-v3: Re-order includes in alphabetical order

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/gic-v3.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index 8ff4e0f08e..a7ce94789c 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -21,25 +21,27 @@
  * GNU General Public License for more details.
  */
 
-#include <xen/lib.h>
+#include <xen/acpi.h>
+#include <xen/delay.h>
+#include <xen/device_tree.h>
+#include <xen/errno.h>
 #include <xen/init.h>
-#include <xen/mm.h>
-#include <xen/irq.h>
 #include <xen/iocap.h>
+#include <xen/irq.h>
+#include <xen/lib.h>
+#include <xen/libfdt/libfdt.h>
+#include <xen/mm.h>
 #include <xen/sched.h>
-#include <xen/errno.h>
-#include <xen/delay.h>
-#include <xen/device_tree.h>
 #include <xen/sizes.h>
-#include <xen/libfdt/libfdt.h>
-#include <xen/acpi.h>
+
 #include <acpi/actables.h>
-#include <asm/io.h>
+
+#include <asm/cpufeature.h>
 #include <asm/device.h>
 #include <asm/gic.h>
 #include <asm/gic_v3_defs.h>
 #include <asm/gic_v3_its.h>
-#include <asm/cpufeature.h>
+#include <asm/io.h>
 
 /* Global state */
 static struct {
-- 
2.11.0


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Re: [PATCH 08/22] xen/arm: gic-v3: Re-order includes in alphabetical order

[Andrii Anisov]

Hello Julien,


In case you are ordering those includes in the alphabetical order, 
shouldn't be `asm/...` includes placed above `xen/...`?

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Re: [PATCH 08/22] xen/arm: gic-v3: Re-order includes in alphabetical order

[Julien Grall]

On 10/23/18 1:52 PM, Andrii Anisov wrote:
> Hello Julien,

Hi,

> 
> In case you are ordering those includes in the alphabetical order,
> shouldn't be `asm/...` includes placed above `xen/...`?

The common headers (e.g xen/) should be placed before architecture 
specific (asm/). They should then be ordered alphabetically among 
themselves.

Cheers,

-- 
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Re: [PATCH 08/22] xen/arm: gic-v3: Re-order includes in alphabetical order

[Andrii Anisov]

Hello Julien,


On 23.10.18 16:26, Julien Grall wrote:
> The common headers (e.g xen/) should be placed before architecture 
> specific (asm/). They should then be ordered alphabetically among 
> themselves.
Yep, I see the point.

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Re: [PATCH 08/22] xen/arm: gic-v3: Re-order includes in alphabetical order

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

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Re: [PATCH 08/22] xen/arm: gic-v3: Re-order includes in alphabetical order

[Andrii Anisov]

[-- Attachment #1.1: Type: text/plain, Size: 186 bytes --]


On 18.10.18 16:20, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

--

*Andrii Anisov*



[-- Attachment #1.2: Type: text/html, Size: 706 bytes --]

[-- Attachment #2: Type: text/plain, Size: 157 bytes --]

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[PATCH 09/22] xen/arm: Move HSR defines in a new header hsr.h

[Julien Grall]

The HSR defines are pretty much self-contained and not necessary to be
included everywhere in Xen. So move them in a new header hsr.h.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/arm64/traps.c          |   1 +
 xen/arch/arm/traps.c                |   1 +
 xen/include/asm-arm/arm64/hsr.h     | 122 ++++++++++++++++++++
 xen/include/asm-arm/arm64/sysregs.h | 109 ------------------
 xen/include/asm-arm/hsr.h           | 217 ++++++++++++++++++++++++++++++++++++
 xen/include/asm-arm/mmio.h          |   2 +
 xen/include/asm-arm/processor.h     | 199 ---------------------------------
 xen/include/asm-arm/traps.h         |   1 +
 8 files changed, 344 insertions(+), 308 deletions(-)
 create mode 100644 xen/include/asm-arm/arm64/hsr.h
 create mode 100644 xen/include/asm-arm/hsr.h

diff --git a/xen/arch/arm/arm64/traps.c b/xen/arch/arm/arm64/traps.c
index e5240190e6..babfc1d884 100644
--- a/xen/arch/arm/arm64/traps.c
+++ b/xen/arch/arm/arm64/traps.c
@@ -18,6 +18,7 @@
 
 #include <xen/lib.h>
 
+#include <asm/hsr.h>
 #include <asm/system.h>
 #include <asm/processor.h>
 
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 1b0b27434f..0dd664cc08 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -43,6 +43,7 @@
 #include <asm/debugger.h>
 #include <asm/event.h>
 #include <asm/flushtlb.h>
+#include <asm/hsr.h>
 #include <asm/mmio.h>
 #include <asm/monitor.h>
 #include <asm/psci.h>
diff --git a/xen/include/asm-arm/arm64/hsr.h b/xen/include/asm-arm/arm64/hsr.h
new file mode 100644
index 0000000000..ca931dd2fe
--- /dev/null
+++ b/xen/include/asm-arm/arm64/hsr.h
@@ -0,0 +1,122 @@
+#ifndef __ASM_ARM_ARM64_HSR_H
+#define __ASM_ARM_ARM64_HSR_H
+
+/* AArch 64 System Register Encodings */
+#define __HSR_SYSREG_c0  0
+#define __HSR_SYSREG_c1  1
+#define __HSR_SYSREG_c2  2
+#define __HSR_SYSREG_c3  3
+#define __HSR_SYSREG_c4  4
+#define __HSR_SYSREG_c5  5
+#define __HSR_SYSREG_c6  6
+#define __HSR_SYSREG_c7  7
+#define __HSR_SYSREG_c8  8
+#define __HSR_SYSREG_c9  9
+#define __HSR_SYSREG_c10 10
+#define __HSR_SYSREG_c11 11
+#define __HSR_SYSREG_c12 12
+#define __HSR_SYSREG_c13 13
+#define __HSR_SYSREG_c14 14
+#define __HSR_SYSREG_c15 15
+
+#define __HSR_SYSREG_0   0
+#define __HSR_SYSREG_1   1
+#define __HSR_SYSREG_2   2
+#define __HSR_SYSREG_3   3
+#define __HSR_SYSREG_4   4
+#define __HSR_SYSREG_5   5
+#define __HSR_SYSREG_6   6
+#define __HSR_SYSREG_7   7
+
+/* These are used to decode traps with HSR.EC==HSR_EC_SYSREG */
+#define HSR_SYSREG(op0,op1,crn,crm,op2) \
+    (((__HSR_SYSREG_##op0) << HSR_SYSREG_OP0_SHIFT) | \
+     ((__HSR_SYSREG_##op1) << HSR_SYSREG_OP1_SHIFT) | \
+     ((__HSR_SYSREG_##crn) << HSR_SYSREG_CRN_SHIFT) | \
+     ((__HSR_SYSREG_##crm) << HSR_SYSREG_CRM_SHIFT) | \
+     ((__HSR_SYSREG_##op2) << HSR_SYSREG_OP2_SHIFT))
+
+#define HSR_SYSREG_DCISW          HSR_SYSREG(1,0,c7,c6,2)
+#define HSR_SYSREG_DCCSW          HSR_SYSREG(1,0,c7,c10,2)
+#define HSR_SYSREG_DCCISW         HSR_SYSREG(1,0,c7,c14,2)
+
+#define HSR_SYSREG_MDSCR_EL1      HSR_SYSREG(2,0,c0,c2,2)
+#define HSR_SYSREG_MDRAR_EL1      HSR_SYSREG(2,0,c1,c0,0)
+#define HSR_SYSREG_OSLAR_EL1      HSR_SYSREG(2,0,c1,c0,4)
+#define HSR_SYSREG_OSLSR_EL1      HSR_SYSREG(2,0,c1,c1,4)
+#define HSR_SYSREG_OSDLR_EL1      HSR_SYSREG(2,0,c1,c3,4)
+#define HSR_SYSREG_DBGPRCR_EL1    HSR_SYSREG(2,0,c1,c4,4)
+#define HSR_SYSREG_MDCCSR_EL0     HSR_SYSREG(2,3,c0,c1,0)
+
+#define HSR_SYSREG_DBGBVRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,4)
+#define HSR_SYSREG_DBGBCRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,5)
+#define HSR_SYSREG_DBGWVRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,6)
+#define HSR_SYSREG_DBGWCRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,7)
+
+#define HSR_SYSREG_DBG_CASES(REG) case HSR_SYSREG_##REG##n_EL1(0):  \
+                                  case HSR_SYSREG_##REG##n_EL1(1):  \
+                                  case HSR_SYSREG_##REG##n_EL1(2):  \
+                                  case HSR_SYSREG_##REG##n_EL1(3):  \
+                                  case HSR_SYSREG_##REG##n_EL1(4):  \
+                                  case HSR_SYSREG_##REG##n_EL1(5):  \
+                                  case HSR_SYSREG_##REG##n_EL1(6):  \
+                                  case HSR_SYSREG_##REG##n_EL1(7):  \
+                                  case HSR_SYSREG_##REG##n_EL1(8):  \
+                                  case HSR_SYSREG_##REG##n_EL1(9):  \
+                                  case HSR_SYSREG_##REG##n_EL1(10): \
+                                  case HSR_SYSREG_##REG##n_EL1(11): \
+                                  case HSR_SYSREG_##REG##n_EL1(12): \
+                                  case HSR_SYSREG_##REG##n_EL1(13): \
+                                  case HSR_SYSREG_##REG##n_EL1(14): \
+                                  case HSR_SYSREG_##REG##n_EL1(15)
+
+#define HSR_SYSREG_SCTLR_EL1      HSR_SYSREG(3,0,c1, c0,0)
+#define HSR_SYSREG_ACTLR_EL1      HSR_SYSREG(3,0,c1, c0,1)
+#define HSR_SYSREG_TTBR0_EL1      HSR_SYSREG(3,0,c2, c0,0)
+#define HSR_SYSREG_TTBR1_EL1      HSR_SYSREG(3,0,c2, c0,1)
+#define HSR_SYSREG_TCR_EL1        HSR_SYSREG(3,0,c2, c0,2)
+#define HSR_SYSREG_AFSR0_EL1      HSR_SYSREG(3,0,c5, c1,0)
+#define HSR_SYSREG_AFSR1_EL1      HSR_SYSREG(3,0,c5, c1,1)
+#define HSR_SYSREG_ESR_EL1        HSR_SYSREG(3,0,c5, c2,0)
+#define HSR_SYSREG_FAR_EL1        HSR_SYSREG(3,0,c6, c0,0)
+#define HSR_SYSREG_PMINTENSET_EL1 HSR_SYSREG(3,0,c9,c14,1)
+#define HSR_SYSREG_PMINTENCLR_EL1 HSR_SYSREG(3,0,c9,c14,2)
+#define HSR_SYSREG_MAIR_EL1       HSR_SYSREG(3,0,c10,c2,0)
+#define HSR_SYSREG_AMAIR_EL1      HSR_SYSREG(3,0,c10,c3,0)
+#define HSR_SYSREG_ICC_SGI1R_EL1  HSR_SYSREG(3,0,c12,c11,5)
+#define HSR_SYSREG_ICC_ASGI1R_EL1 HSR_SYSREG(3,1,c12,c11,6)
+#define HSR_SYSREG_ICC_SGI0R_EL1  HSR_SYSREG(3,2,c12,c11,7)
+#define HSR_SYSREG_ICC_SRE_EL1    HSR_SYSREG(3,0,c12,c12,5)
+#define HSR_SYSREG_CONTEXTIDR_EL1 HSR_SYSREG(3,0,c13,c0,1)
+
+#define HSR_SYSREG_PMCR_EL0       HSR_SYSREG(3,3,c9,c12,0)
+#define HSR_SYSREG_PMCNTENSET_EL0 HSR_SYSREG(3,3,c9,c12,1)
+#define HSR_SYSREG_PMCNTENCLR_EL0 HSR_SYSREG(3,3,c9,c12,2)
+#define HSR_SYSREG_PMOVSCLR_EL0   HSR_SYSREG(3,3,c9,c12,3)
+#define HSR_SYSREG_PMSWINC_EL0    HSR_SYSREG(3,3,c9,c12,4)
+#define HSR_SYSREG_PMSELR_EL0     HSR_SYSREG(3,3,c9,c12,5)
+#define HSR_SYSREG_PMCEID0_EL0    HSR_SYSREG(3,3,c9,c12,6)
+#define HSR_SYSREG_PMCEID1_EL0    HSR_SYSREG(3,3,c9,c12,7)
+
+#define HSR_SYSREG_PMCCNTR_EL0    HSR_SYSREG(3,3,c9,c13,0)
+#define HSR_SYSREG_PMXEVTYPER_EL0 HSR_SYSREG(3,3,c9,c13,1)
+#define HSR_SYSREG_PMXEVCNTR_EL0  HSR_SYSREG(3,3,c9,c13,2)
+
+#define HSR_SYSREG_PMUSERENR_EL0  HSR_SYSREG(3,3,c9,c14,0)
+#define HSR_SYSREG_PMOVSSET_EL0   HSR_SYSREG(3,3,c9,c14,3)
+
+#define HSR_SYSREG_CNTPCT_EL0     HSR_SYSREG(3,3,c14,c0,0)
+#define HSR_SYSREG_CNTP_TVAL_EL0  HSR_SYSREG(3,3,c14,c2,0)
+#define HSR_SYSREG_CNTP_CTL_EL0   HSR_SYSREG(3,3,c14,c2,1)
+#define HSR_SYSREG_CNTP_CVAL_EL0  HSR_SYSREG(3,3,c14,c2,2)
+
+#endif /* __ASM_ARM_ARM64_HSR_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/arm64/sysregs.h b/xen/include/asm-arm/arm64/sysregs.h
index 1811234249..f510925a2a 100644
--- a/xen/include/asm-arm/arm64/sysregs.h
+++ b/xen/include/asm-arm/arm64/sysregs.h
@@ -3,115 +3,6 @@
 
 #include <xen/stringify.h>
 
-/* AArch 64 System Register Encodings */
-#define __HSR_SYSREG_c0  0
-#define __HSR_SYSREG_c1  1
-#define __HSR_SYSREG_c2  2
-#define __HSR_SYSREG_c3  3
-#define __HSR_SYSREG_c4  4
-#define __HSR_SYSREG_c5  5
-#define __HSR_SYSREG_c6  6
-#define __HSR_SYSREG_c7  7
-#define __HSR_SYSREG_c8  8
-#define __HSR_SYSREG_c9  9
-#define __HSR_SYSREG_c10 10
-#define __HSR_SYSREG_c11 11
-#define __HSR_SYSREG_c12 12
-#define __HSR_SYSREG_c13 13
-#define __HSR_SYSREG_c14 14
-#define __HSR_SYSREG_c15 15
-
-#define __HSR_SYSREG_0   0
-#define __HSR_SYSREG_1   1
-#define __HSR_SYSREG_2   2
-#define __HSR_SYSREG_3   3
-#define __HSR_SYSREG_4   4
-#define __HSR_SYSREG_5   5
-#define __HSR_SYSREG_6   6
-#define __HSR_SYSREG_7   7
-
-/* These are used to decode traps with HSR.EC==HSR_EC_SYSREG */
-#define HSR_SYSREG(op0,op1,crn,crm,op2) \
-    (((__HSR_SYSREG_##op0) << HSR_SYSREG_OP0_SHIFT) | \
-     ((__HSR_SYSREG_##op1) << HSR_SYSREG_OP1_SHIFT) | \
-     ((__HSR_SYSREG_##crn) << HSR_SYSREG_CRN_SHIFT) | \
-     ((__HSR_SYSREG_##crm) << HSR_SYSREG_CRM_SHIFT) | \
-     ((__HSR_SYSREG_##op2) << HSR_SYSREG_OP2_SHIFT))
-
-#define HSR_SYSREG_DCISW          HSR_SYSREG(1,0,c7,c6,2)
-#define HSR_SYSREG_DCCSW          HSR_SYSREG(1,0,c7,c10,2)
-#define HSR_SYSREG_DCCISW         HSR_SYSREG(1,0,c7,c14,2)
-
-#define HSR_SYSREG_MDSCR_EL1      HSR_SYSREG(2,0,c0,c2,2)
-#define HSR_SYSREG_MDRAR_EL1      HSR_SYSREG(2,0,c1,c0,0)
-#define HSR_SYSREG_OSLAR_EL1      HSR_SYSREG(2,0,c1,c0,4)
-#define HSR_SYSREG_OSLSR_EL1      HSR_SYSREG(2,0,c1,c1,4)
-#define HSR_SYSREG_OSDLR_EL1      HSR_SYSREG(2,0,c1,c3,4)
-#define HSR_SYSREG_DBGPRCR_EL1    HSR_SYSREG(2,0,c1,c4,4)
-#define HSR_SYSREG_MDCCSR_EL0     HSR_SYSREG(2,3,c0,c1,0)
-
-#define HSR_SYSREG_DBGBVRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,4)
-#define HSR_SYSREG_DBGBCRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,5)
-#define HSR_SYSREG_DBGWVRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,6)
-#define HSR_SYSREG_DBGWCRn_EL1(n) HSR_SYSREG(2,0,c0,c##n,7)
-
-#define HSR_SYSREG_DBG_CASES(REG) case HSR_SYSREG_##REG##n_EL1(0):  \
-                                  case HSR_SYSREG_##REG##n_EL1(1):  \
-                                  case HSR_SYSREG_##REG##n_EL1(2):  \
-                                  case HSR_SYSREG_##REG##n_EL1(3):  \
-                                  case HSR_SYSREG_##REG##n_EL1(4):  \
-                                  case HSR_SYSREG_##REG##n_EL1(5):  \
-                                  case HSR_SYSREG_##REG##n_EL1(6):  \
-                                  case HSR_SYSREG_##REG##n_EL1(7):  \
-                                  case HSR_SYSREG_##REG##n_EL1(8):  \
-                                  case HSR_SYSREG_##REG##n_EL1(9):  \
-                                  case HSR_SYSREG_##REG##n_EL1(10): \
-                                  case HSR_SYSREG_##REG##n_EL1(11): \
-                                  case HSR_SYSREG_##REG##n_EL1(12): \
-                                  case HSR_SYSREG_##REG##n_EL1(13): \
-                                  case HSR_SYSREG_##REG##n_EL1(14): \
-                                  case HSR_SYSREG_##REG##n_EL1(15)
-
-#define HSR_SYSREG_SCTLR_EL1      HSR_SYSREG(3,0,c1, c0,0)
-#define HSR_SYSREG_ACTLR_EL1      HSR_SYSREG(3,0,c1, c0,1)
-#define HSR_SYSREG_TTBR0_EL1      HSR_SYSREG(3,0,c2, c0,0)
-#define HSR_SYSREG_TTBR1_EL1      HSR_SYSREG(3,0,c2, c0,1)
-#define HSR_SYSREG_TCR_EL1        HSR_SYSREG(3,0,c2, c0,2)
-#define HSR_SYSREG_AFSR0_EL1      HSR_SYSREG(3,0,c5, c1,0)
-#define HSR_SYSREG_AFSR1_EL1      HSR_SYSREG(3,0,c5, c1,1)
-#define HSR_SYSREG_ESR_EL1        HSR_SYSREG(3,0,c5, c2,0)
-#define HSR_SYSREG_FAR_EL1        HSR_SYSREG(3,0,c6, c0,0)
-#define HSR_SYSREG_PMINTENSET_EL1 HSR_SYSREG(3,0,c9,c14,1)
-#define HSR_SYSREG_PMINTENCLR_EL1 HSR_SYSREG(3,0,c9,c14,2)
-#define HSR_SYSREG_MAIR_EL1       HSR_SYSREG(3,0,c10,c2,0)
-#define HSR_SYSREG_AMAIR_EL1      HSR_SYSREG(3,0,c10,c3,0)
-#define HSR_SYSREG_ICC_SGI1R_EL1  HSR_SYSREG(3,0,c12,c11,5)
-#define HSR_SYSREG_ICC_ASGI1R_EL1 HSR_SYSREG(3,1,c12,c11,6)
-#define HSR_SYSREG_ICC_SGI0R_EL1  HSR_SYSREG(3,2,c12,c11,7)
-#define HSR_SYSREG_ICC_SRE_EL1    HSR_SYSREG(3,0,c12,c12,5)
-#define HSR_SYSREG_CONTEXTIDR_EL1 HSR_SYSREG(3,0,c13,c0,1)
-
-#define HSR_SYSREG_PMCR_EL0       HSR_SYSREG(3,3,c9,c12,0)
-#define HSR_SYSREG_PMCNTENSET_EL0 HSR_SYSREG(3,3,c9,c12,1)
-#define HSR_SYSREG_PMCNTENCLR_EL0 HSR_SYSREG(3,3,c9,c12,2)
-#define HSR_SYSREG_PMOVSCLR_EL0   HSR_SYSREG(3,3,c9,c12,3)
-#define HSR_SYSREG_PMSWINC_EL0    HSR_SYSREG(3,3,c9,c12,4)
-#define HSR_SYSREG_PMSELR_EL0     HSR_SYSREG(3,3,c9,c12,5)
-#define HSR_SYSREG_PMCEID0_EL0    HSR_SYSREG(3,3,c9,c12,6)
-#define HSR_SYSREG_PMCEID1_EL0    HSR_SYSREG(3,3,c9,c12,7)
-
-#define HSR_SYSREG_PMCCNTR_EL0    HSR_SYSREG(3,3,c9,c13,0)
-#define HSR_SYSREG_PMXEVTYPER_EL0 HSR_SYSREG(3,3,c9,c13,1)
-#define HSR_SYSREG_PMXEVCNTR_EL0  HSR_SYSREG(3,3,c9,c13,2)
-
-#define HSR_SYSREG_PMUSERENR_EL0  HSR_SYSREG(3,3,c9,c14,0)
-#define HSR_SYSREG_PMOVSSET_EL0   HSR_SYSREG(3,3,c9,c14,3)
-
-#define HSR_SYSREG_CNTPCT_EL0     HSR_SYSREG(3,3,c14,c0,0)
-#define HSR_SYSREG_CNTP_TVAL_EL0  HSR_SYSREG(3,3,c14,c2,0)
-#define HSR_SYSREG_CNTP_CTL_EL0   HSR_SYSREG(3,3,c14,c2,1)
-#define HSR_SYSREG_CNTP_CVAL_EL0  HSR_SYSREG(3,3,c14,c2,2)
-
 /*
  * GIC System register assembly aliases picked from kernel
  */
diff --git a/xen/include/asm-arm/hsr.h b/xen/include/asm-arm/hsr.h
new file mode 100644
index 0000000000..29d4531f40
--- /dev/null
+++ b/xen/include/asm-arm/hsr.h
@@ -0,0 +1,217 @@
+#ifndef __ASM_ARM_HSR_H
+#define __ASM_ARM_HSR_H
+
+#include <xen/types.h>
+
+#if defined(CONFIG_ARM_64)
+# include <asm/arm64/hsr.h>
+#endif
+
+/* HSR data abort size definition */
+enum dabt_size {
+    DABT_BYTE        = 0,
+    DABT_HALF_WORD   = 1,
+    DABT_WORD        = 2,
+    DABT_DOUBLE_WORD = 3,
+};
+
+union hsr {
+    uint32_t bits;
+    struct {
+        unsigned long iss:25;  /* Instruction Specific Syndrome */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    };
+
+    /* Common to all conditional exception classes (0x0N, except 0x00). */
+    struct hsr_cond {
+        unsigned long iss:20;  /* Instruction Specific Syndrome */
+        unsigned long cc:4;    /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } cond;
+
+    struct hsr_wfi_wfe {
+        unsigned long ti:1;    /* Trapped instruction */
+        unsigned long sbzp:19;
+        unsigned long cc:4;    /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } wfi_wfe;
+
+    /* reg, reg0, reg1 are 4 bits on AArch32, the fifth bit is sbzp. */
+    struct hsr_cp32 {
+        unsigned long read:1;  /* Direction */
+        unsigned long crm:4;   /* CRm */
+        unsigned long reg:5;   /* Rt */
+        unsigned long crn:4;   /* CRn */
+        unsigned long op1:3;   /* Op1 */
+        unsigned long op2:3;   /* Op2 */
+        unsigned long cc:4;    /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } cp32; /* HSR_EC_CP15_32, CP14_32, CP10 */
+
+    struct hsr_cp64 {
+        unsigned long read:1;   /* Direction */
+        unsigned long crm:4;    /* CRm */
+        unsigned long reg1:5;   /* Rt1 */
+        unsigned long reg2:5;   /* Rt2 */
+        unsigned long sbzp2:1;
+        unsigned long op1:4;    /* Op1 */
+        unsigned long cc:4;     /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;    /* Instruction length */
+        unsigned long ec:6;     /* Exception Class */
+    } cp64; /* HSR_EC_CP15_64, HSR_EC_CP14_64 */
+
+     struct hsr_cp {
+        unsigned long coproc:4; /* Number of coproc accessed */
+        unsigned long sbz0p:1;
+        unsigned long tas:1;    /* Trapped Advanced SIMD */
+        unsigned long res0:14;
+        unsigned long cc:4;     /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;    /* Instruction length */
+        unsigned long ec:6;     /* Exception Class */
+    } cp; /* HSR_EC_CP */
+
+    /*
+     * This encoding is valid only for ARMv8 (ARM DDI 0487B.a, pages D7-2271 and
+     * G6-4957). On ARMv7, encoding ISS for EC=0x13 is defined as UNK/SBZP
+     * (ARM DDI 0406C.c page B3-1431). UNK/SBZP means that hardware implements
+     * this field as Read-As-Zero. ARMv8 is backwards compatible with ARMv7:
+     * reading CCKNOWNPASS on ARMv7 will return 0, which means that condition
+     * check was passed or instruction was unconditional.
+     */
+    struct hsr_smc32 {
+        unsigned long res0:19;  /* Reserved */
+        unsigned long ccknownpass:1; /* Instruction passed conditional check */
+        unsigned long cc:4;    /* Condition Code */
+        unsigned long ccvalid:1;/* CC Valid */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } smc32; /* HSR_EC_SMC32 */
+
+#ifdef CONFIG_ARM_64
+    struct hsr_sysreg {
+        unsigned long read:1;   /* Direction */
+        unsigned long crm:4;    /* CRm */
+        unsigned long reg:5;    /* Rt */
+        unsigned long crn:4;    /* CRn */
+        unsigned long op1:3;    /* Op1 */
+        unsigned long op2:3;    /* Op2 */
+        unsigned long op0:2;    /* Op0 */
+        unsigned long res0:3;
+        unsigned long len:1;    /* Instruction length */
+        unsigned long ec:6;
+    } sysreg; /* HSR_EC_SYSREG */
+#endif
+
+    struct hsr_iabt {
+        unsigned long ifsc:6;  /* Instruction fault status code */
+        unsigned long res0:1;  /* RES0 */
+        unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
+        unsigned long res1:1;  /* RES0 */
+        unsigned long eat:1;   /* External abort type */
+        unsigned long fnv:1;   /* FAR not Valid */
+        unsigned long res2:14;
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } iabt; /* HSR_EC_INSTR_ABORT_* */
+
+    struct hsr_dabt {
+        unsigned long dfsc:6;  /* Data Fault Status Code */
+        unsigned long write:1; /* Write / not Read */
+        unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
+        unsigned long cache:1; /* Cache Maintenance */
+        unsigned long eat:1;   /* External Abort Type */
+        unsigned long fnv:1;   /* FAR not Valid */
+#ifdef CONFIG_ARM_32
+        unsigned long sbzp0:5;
+#else
+        unsigned long sbzp0:3;
+        unsigned long ar:1;    /* Acquire Release */
+        unsigned long sf:1;    /* Sixty Four bit register */
+#endif
+        unsigned long reg:5;   /* Register */
+        unsigned long sign:1;  /* Sign extend */
+        unsigned long size:2;  /* Access Size */
+        unsigned long valid:1; /* Syndrome Valid */
+        unsigned long len:1;   /* Instruction length */
+        unsigned long ec:6;    /* Exception Class */
+    } dabt; /* HSR_EC_DATA_ABORT_* */
+
+    /* Contain the common bits between DABT and IABT */
+    struct hsr_xabt {
+        unsigned long fsc:6;    /* Fault status code */
+        unsigned long pad1:1;   /* Not common */
+        unsigned long s1ptw:1;  /* Stage 2 fault during stage 1 translation */
+        unsigned long pad2:1;   /* Not common */
+        unsigned long eat:1;    /* External abort type */
+        unsigned long fnv:1;    /* FAR not Valid */
+        unsigned long pad3:14;  /* Not common */
+        unsigned long len:1;    /* Instruction length */
+        unsigned long ec:6;     /* Exception Class */
+    } xabt;
+
+#ifdef CONFIG_ARM_64
+    struct hsr_brk {
+        unsigned long comment:16;   /* Comment */
+        unsigned long res0:9;
+        unsigned long len:1;        /* Instruction length */
+        unsigned long ec:6;         /* Exception Class */
+    } brk;
+#endif
+};
+
+/* HSR.EC == HSR_CP{15,14,10}_32 */
+#define HSR_CP32_OP2_MASK (0x000e0000)
+#define HSR_CP32_OP2_SHIFT (17)
+#define HSR_CP32_OP1_MASK (0x0001c000)
+#define HSR_CP32_OP1_SHIFT (14)
+#define HSR_CP32_CRN_MASK (0x00003c00)
+#define HSR_CP32_CRN_SHIFT (10)
+#define HSR_CP32_CRM_MASK (0x0000001e)
+#define HSR_CP32_CRM_SHIFT (1)
+#define HSR_CP32_REGS_MASK (HSR_CP32_OP1_MASK|HSR_CP32_OP2_MASK|\
+                            HSR_CP32_CRN_MASK|HSR_CP32_CRM_MASK)
+
+/* HSR.EC == HSR_CP{15,14}_64 */
+#define HSR_CP64_OP1_MASK (0x000f0000)
+#define HSR_CP64_OP1_SHIFT (16)
+#define HSR_CP64_CRM_MASK (0x0000001e)
+#define HSR_CP64_CRM_SHIFT (1)
+#define HSR_CP64_REGS_MASK (HSR_CP64_OP1_MASK|HSR_CP64_CRM_MASK)
+
+/* HSR.EC == HSR_SYSREG */
+#define HSR_SYSREG_OP0_MASK (0x00300000)
+#define HSR_SYSREG_OP0_SHIFT (20)
+#define HSR_SYSREG_OP1_MASK (0x0001c000)
+#define HSR_SYSREG_OP1_SHIFT (14)
+#define HSR_SYSREG_CRN_MASK (0x00003c00)
+#define HSR_SYSREG_CRN_SHIFT (10)
+#define HSR_SYSREG_CRM_MASK (0x0000001e)
+#define HSR_SYSREG_CRM_SHIFT (1)
+#define HSR_SYSREG_OP2_MASK (0x000e0000)
+#define HSR_SYSREG_OP2_SHIFT (17)
+#define HSR_SYSREG_REGS_MASK (HSR_SYSREG_OP0_MASK|HSR_SYSREG_OP1_MASK|\
+                              HSR_SYSREG_CRN_MASK|HSR_SYSREG_CRM_MASK|\
+                              HSR_SYSREG_OP2_MASK)
+
+/* HSR.EC == HSR_{HVC32, HVC64, SMC64, SVC32, SVC64} */
+#define HSR_XXC_IMM_MASK     (0xffff)
+
+#endif /* __ASM_ARM_HSR_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/mmio.h b/xen/include/asm-arm/mmio.h
index c8dadb5006..3ed3f82bf7 100644
--- a/xen/include/asm-arm/mmio.h
+++ b/xen/include/asm-arm/mmio.h
@@ -21,6 +21,8 @@
 
 #include <xen/lib.h>
 #include <xen/rwlock.h>
+
+#include <asm/hsr.h>
 #include <asm/processor.h>
 #include <asm/regs.h>
 
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 5b6bd0c38c..3592aa36d8 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -353,207 +353,8 @@
 extern register_t __cpu_logical_map[];
 #define cpu_logical_map(cpu) __cpu_logical_map[cpu]
 
-/* HSR data abort size definition */
-enum dabt_size {
-    DABT_BYTE        = 0,
-    DABT_HALF_WORD   = 1,
-    DABT_WORD        = 2,
-    DABT_DOUBLE_WORD = 3,
-};
-
-union hsr {
-    uint32_t bits;
-    struct {
-        unsigned long iss:25;  /* Instruction Specific Syndrome */
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    };
-
-    /* Common to all conditional exception classes (0x0N, except 0x00). */
-    struct hsr_cond {
-        unsigned long iss:20;  /* Instruction Specific Syndrome */
-        unsigned long cc:4;    /* Condition Code */
-        unsigned long ccvalid:1;/* CC Valid */
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    } cond;
-
-    struct hsr_wfi_wfe {
-        unsigned long ti:1;    /* Trapped instruction */
-        unsigned long sbzp:19;
-        unsigned long cc:4;    /* Condition Code */
-        unsigned long ccvalid:1;/* CC Valid */
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    } wfi_wfe;
-
-    /* reg, reg0, reg1 are 4 bits on AArch32, the fifth bit is sbzp. */
-    struct hsr_cp32 {
-        unsigned long read:1;  /* Direction */
-        unsigned long crm:4;   /* CRm */
-        unsigned long reg:5;   /* Rt */
-        unsigned long crn:4;   /* CRn */
-        unsigned long op1:3;   /* Op1 */
-        unsigned long op2:3;   /* Op2 */
-        unsigned long cc:4;    /* Condition Code */
-        unsigned long ccvalid:1;/* CC Valid */
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    } cp32; /* HSR_EC_CP15_32, CP14_32, CP10 */
-
-    struct hsr_cp64 {
-        unsigned long read:1;   /* Direction */
-        unsigned long crm:4;    /* CRm */
-        unsigned long reg1:5;   /* Rt1 */
-        unsigned long reg2:5;   /* Rt2 */
-        unsigned long sbzp2:1;
-        unsigned long op1:4;    /* Op1 */
-        unsigned long cc:4;     /* Condition Code */
-        unsigned long ccvalid:1;/* CC Valid */
-        unsigned long len:1;    /* Instruction length */
-        unsigned long ec:6;     /* Exception Class */
-    } cp64; /* HSR_EC_CP15_64, HSR_EC_CP14_64 */
-
-     struct hsr_cp {
-        unsigned long coproc:4; /* Number of coproc accessed */
-        unsigned long sbz0p:1;
-        unsigned long tas:1;    /* Trapped Advanced SIMD */
-        unsigned long res0:14;
-        unsigned long cc:4;     /* Condition Code */
-        unsigned long ccvalid:1;/* CC Valid */
-        unsigned long len:1;    /* Instruction length */
-        unsigned long ec:6;     /* Exception Class */
-    } cp; /* HSR_EC_CP */
-
-    /*
-     * This encoding is valid only for ARMv8 (ARM DDI 0487B.a, pages D7-2271 and
-     * G6-4957). On ARMv7, encoding ISS for EC=0x13 is defined as UNK/SBZP
-     * (ARM DDI 0406C.c page B3-1431). UNK/SBZP means that hardware implements
-     * this field as Read-As-Zero. ARMv8 is backwards compatible with ARMv7:
-     * reading CCKNOWNPASS on ARMv7 will return 0, which means that condition
-     * check was passed or instruction was unconditional.
-     */
-    struct hsr_smc32 {
-        unsigned long res0:19;  /* Reserved */
-        unsigned long ccknownpass:1; /* Instruction passed conditional check */
-        unsigned long cc:4;    /* Condition Code */
-        unsigned long ccvalid:1;/* CC Valid */
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    } smc32; /* HSR_EC_SMC32 */
-
-#ifdef CONFIG_ARM_64
-    struct hsr_sysreg {
-        unsigned long read:1;   /* Direction */
-        unsigned long crm:4;    /* CRm */
-        unsigned long reg:5;    /* Rt */
-        unsigned long crn:4;    /* CRn */
-        unsigned long op1:3;    /* Op1 */
-        unsigned long op2:3;    /* Op2 */
-        unsigned long op0:2;    /* Op0 */
-        unsigned long res0:3;
-        unsigned long len:1;    /* Instruction length */
-        unsigned long ec:6;
-    } sysreg; /* HSR_EC_SYSREG */
-#endif
-
-    struct hsr_iabt {
-        unsigned long ifsc:6;  /* Instruction fault status code */
-        unsigned long res0:1;  /* RES0 */
-        unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
-        unsigned long res1:1;  /* RES0 */
-        unsigned long eat:1;   /* External abort type */
-        unsigned long fnv:1;   /* FAR not Valid */
-        unsigned long res2:14;
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    } iabt; /* HSR_EC_INSTR_ABORT_* */
-
-    struct hsr_dabt {
-        unsigned long dfsc:6;  /* Data Fault Status Code */
-        unsigned long write:1; /* Write / not Read */
-        unsigned long s1ptw:1; /* Stage 2 fault during stage 1 translation */
-        unsigned long cache:1; /* Cache Maintenance */
-        unsigned long eat:1;   /* External Abort Type */
-        unsigned long fnv:1;   /* FAR not Valid */
-#ifdef CONFIG_ARM_32
-        unsigned long sbzp0:5;
-#else
-        unsigned long sbzp0:3;
-        unsigned long ar:1;    /* Acquire Release */
-        unsigned long sf:1;    /* Sixty Four bit register */
-#endif
-        unsigned long reg:5;   /* Register */
-        unsigned long sign:1;  /* Sign extend */
-        unsigned long size:2;  /* Access Size */
-        unsigned long valid:1; /* Syndrome Valid */
-        unsigned long len:1;   /* Instruction length */
-        unsigned long ec:6;    /* Exception Class */
-    } dabt; /* HSR_EC_DATA_ABORT_* */
-
-    /* Contain the common bits between DABT and IABT */
-    struct hsr_xabt {
-        unsigned long fsc:6;    /* Fault status code */
-        unsigned long pad1:1;   /* Not common */
-        unsigned long s1ptw:1;  /* Stage 2 fault during stage 1 translation */
-        unsigned long pad2:1;   /* Not common */
-        unsigned long eat:1;    /* External abort type */
-        unsigned long fnv:1;    /* FAR not Valid */
-        unsigned long pad3:14;  /* Not common */
-        unsigned long len:1;    /* Instruction length */
-        unsigned long ec:6;     /* Exception Class */
-    } xabt;
-
-#ifdef CONFIG_ARM_64
-    struct hsr_brk {
-        unsigned long comment:16;   /* Comment */
-        unsigned long res0:9;
-        unsigned long len:1;        /* Instruction length */
-        unsigned long ec:6;         /* Exception Class */
-    } brk;
-#endif
-
-
-};
 #endif
 
-/* HSR.EC == HSR_CP{15,14,10}_32 */
-#define HSR_CP32_OP2_MASK (0x000e0000)
-#define HSR_CP32_OP2_SHIFT (17)
-#define HSR_CP32_OP1_MASK (0x0001c000)
-#define HSR_CP32_OP1_SHIFT (14)
-#define HSR_CP32_CRN_MASK (0x00003c00)
-#define HSR_CP32_CRN_SHIFT (10)
-#define HSR_CP32_CRM_MASK (0x0000001e)
-#define HSR_CP32_CRM_SHIFT (1)
-#define HSR_CP32_REGS_MASK (HSR_CP32_OP1_MASK|HSR_CP32_OP2_MASK|\
-                            HSR_CP32_CRN_MASK|HSR_CP32_CRM_MASK)
-
-/* HSR.EC == HSR_CP{15,14}_64 */
-#define HSR_CP64_OP1_MASK (0x000f0000)
-#define HSR_CP64_OP1_SHIFT (16)
-#define HSR_CP64_CRM_MASK (0x0000001e)
-#define HSR_CP64_CRM_SHIFT (1)
-#define HSR_CP64_REGS_MASK (HSR_CP64_OP1_MASK|HSR_CP64_CRM_MASK)
-
-/* HSR.EC == HSR_SYSREG */
-#define HSR_SYSREG_OP0_MASK (0x00300000)
-#define HSR_SYSREG_OP0_SHIFT (20)
-#define HSR_SYSREG_OP1_MASK (0x0001c000)
-#define HSR_SYSREG_OP1_SHIFT (14)
-#define HSR_SYSREG_CRN_MASK (0x00003c00)
-#define HSR_SYSREG_CRN_SHIFT (10)
-#define HSR_SYSREG_CRM_MASK (0x0000001e)
-#define HSR_SYSREG_CRM_SHIFT (1)
-#define HSR_SYSREG_OP2_MASK (0x000e0000)
-#define HSR_SYSREG_OP2_SHIFT (17)
-#define HSR_SYSREG_REGS_MASK (HSR_SYSREG_OP0_MASK|HSR_SYSREG_OP1_MASK|\
-                              HSR_SYSREG_CRN_MASK|HSR_SYSREG_CRM_MASK|\
-                              HSR_SYSREG_OP2_MASK)
-
-/* HSR.EC == HSR_{HVC32, HVC64, SMC64, SVC32, SVC64} */
-#define HSR_XXC_IMM_MASK     (0xffff)
-
 /* Physical Address Register */
 #define PAR_F           (_AC(1,U)<<0)
 
diff --git a/xen/include/asm-arm/traps.h b/xen/include/asm-arm/traps.h
index c12e9e4082..8b6f09b6b8 100644
--- a/xen/include/asm-arm/traps.h
+++ b/xen/include/asm-arm/traps.h
@@ -1,6 +1,7 @@
 #ifndef __ASM_ARM_TRAPS__
 #define __ASM_ARM_TRAPS__
 
+#include <asm/hsr.h>
 #include <asm/processor.h>
 
 #if defined(CONFIG_ARM_32)
-- 
2.11.0


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Re: [PATCH 09/22] xen/arm: Move HSR defines in a new header hsr.h

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> The HSR defines are pretty much self-contained and not necessary to be
> included everywhere in Xen. So move them in a new header hsr.h.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>


Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>

-- 

*Andrii Anisov*



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[PATCH 10/22] xen/arm: Move SYSREG accessors in sysregs.h

[Julien Grall]

System registers accessors are self-contained and should not be included
everywhere in Xen. Move the accessors in sysregs.h and include the file
when necessary.

With that change, it is not necessary to include processor.h in time.h.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/arm32/entry.S            |  1 +
 xen/arch/arm/arm32/proc-v7.S          |  1 +
 xen/arch/arm/gic-v3-lpi.c             |  1 +
 xen/arch/arm/gic-v3.c                 |  1 +
 xen/include/asm-arm/arm32/processor.h | 62 -----------------------------
 xen/include/asm-arm/arm32/sysregs.h   | 74 +++++++++++++++++++++++++++++++++++
 xen/include/asm-arm/arm64/processor.h | 25 ------------
 xen/include/asm-arm/arm64/sysregs.h   | 23 +++++++++++
 xen/include/asm-arm/page.h            |  1 +
 xen/include/asm-arm/percpu.h          |  8 +---
 xen/include/asm-arm/sysregs.h         | 22 +++++++++++
 xen/include/asm-arm/time.h            |  2 +-
 12 files changed, 126 insertions(+), 95 deletions(-)
 create mode 100644 xen/include/asm-arm/arm32/sysregs.h
 create mode 100644 xen/include/asm-arm/sysregs.h

diff --git a/xen/arch/arm/arm32/entry.S b/xen/arch/arm/arm32/entry.S
index f6908e3f16..0b4cd19abd 100644
--- a/xen/arch/arm/arm32/entry.S
+++ b/xen/arch/arm/arm32/entry.S
@@ -1,4 +1,5 @@
 #include <asm/asm_defns.h>
+#include <asm/sysregs.h>
 #include <asm/regs.h>
 #include <asm/alternative.h>
 #include <public/xen.h>
diff --git a/xen/arch/arm/arm32/proc-v7.S b/xen/arch/arm/arm32/proc-v7.S
index 2f3ff1e6c9..80a250d8e8 100644
--- a/xen/arch/arm/arm32/proc-v7.S
+++ b/xen/arch/arm/arm32/proc-v7.S
@@ -19,6 +19,7 @@
 
 #include <asm/asm_defns.h>
 #include <asm/arm32/processor.h>
+#include <asm/sysregs.h>
 
 ca15mp_init:
 ca7mp_init:
diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c
index efd5cd62fb..e8c6e159ca 100644
--- a/xen/arch/arm/gic-v3-lpi.c
+++ b/xen/arch/arm/gic-v3-lpi.c
@@ -30,6 +30,7 @@
 #include <asm/gic_v3_its.h>
 #include <asm/io.h>
 #include <asm/page.h>
+#include <asm/sysregs.h>
 
 /*
  * There could be a lot of LPIs on the host side, and they always go to
diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index a7ce94789c..264a981bab 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -42,6 +42,7 @@
 #include <asm/gic_v3_defs.h>
 #include <asm/gic_v3_its.h>
 #include <asm/io.h>
+#include <asm/sysregs.h>
 
 /* Global state */
 static struct {
diff --git a/xen/include/asm-arm/arm32/processor.h b/xen/include/asm-arm/arm32/processor.h
index fb330812af..4e679f3273 100644
--- a/xen/include/asm-arm/arm32/processor.h
+++ b/xen/include/asm-arm/arm32/processor.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_ARM_ARM32_PROCESSOR_H
 #define __ASM_ARM_ARM32_PROCESSOR_H
 
-#include <asm/cpregs.h>
-
 #define ACTLR_CAXX_SMP      (1<<6)
 
 #ifndef __ASSEMBLY__
@@ -60,66 +58,6 @@ struct cpu_user_regs
 
 #endif
 
-/* Layout as used in assembly, with src/dest registers mixed in */
-#define __CP32(r, coproc, opc1, crn, crm, opc2) coproc, opc1, r, crn, crm, opc2
-#define __CP64(r1, r2, coproc, opc, crm) coproc, opc, r1, r2, crm
-#define CP32(r, name...) __CP32(r, name)
-#define CP64(r, name...) __CP64(r, name)
-
-/* Stringified for inline assembly */
-#define LOAD_CP32(r, name...)  "mrc " __stringify(CP32(%r, name)) ";"
-#define STORE_CP32(r, name...) "mcr " __stringify(CP32(%r, name)) ";"
-#define LOAD_CP64(r, name...)  "mrrc " __stringify(CP64(%r, %H##r, name)) ";"
-#define STORE_CP64(r, name...) "mcrr " __stringify(CP64(%r, %H##r, name)) ";"
-
-/* Issue a CP operation which takes no argument,
- * uses r0 as a placeholder register. */
-#define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
-
-#ifndef __ASSEMBLY__
-
-/* C wrappers */
-#define READ_CP32(name...) ({                                   \
-    register uint32_t _r;                                       \
-    asm volatile(LOAD_CP32(0, name) : "=r" (_r));               \
-    _r; })
-
-#define WRITE_CP32(v, name...) do {                             \
-    register uint32_t _r = (v);                                 \
-    asm volatile(STORE_CP32(0, name) : : "r" (_r));             \
-} while (0)
-
-#define READ_CP64(name...) ({                                   \
-    register uint64_t _r;                                       \
-    asm volatile(LOAD_CP64(0, name) : "=r" (_r));               \
-    _r; })
-
-#define WRITE_CP64(v, name...) do {                             \
-    register uint64_t _r = (v);                                 \
-    asm volatile(STORE_CP64(0, name) : : "r" (_r));             \
-} while (0)
-
-/*
- * C wrappers for accessing system registers.
- *
- * Registers come in 3 types:
- * - those which are always 32-bit regardless of AArch32 vs AArch64
- *   (use {READ,WRITE}_SYSREG32).
- * - those which are always 64-bit regardless of AArch32 vs AArch64
- *   (use {READ,WRITE}_SYSREG64).
- * - those which vary between AArch32 and AArch64 (use {READ,WRITE}_SYSREG).
- */
-#define READ_SYSREG32(R...)     READ_CP32(R)
-#define WRITE_SYSREG32(V, R...) WRITE_CP32(V, R)
-
-#define READ_SYSREG64(R...)     READ_CP64(R)
-#define WRITE_SYSREG64(V, R...) WRITE_CP64(V, R)
-
-#define READ_SYSREG(R...)       READ_SYSREG32(R)
-#define WRITE_SYSREG(V, R...)   WRITE_SYSREG32(V, R)
-
-#endif /* __ASSEMBLY__ */
-
 #endif /* __ASM_ARM_ARM32_PROCESSOR_H */
 /*
  * Local variables:
diff --git a/xen/include/asm-arm/arm32/sysregs.h b/xen/include/asm-arm/arm32/sysregs.h
new file mode 100644
index 0000000000..b25b59a557
--- /dev/null
+++ b/xen/include/asm-arm/arm32/sysregs.h
@@ -0,0 +1,74 @@
+#ifndef __ASM_ARM_ARM32_SYSREGS_H
+#define __ASM_ARM_ARM32_SYSREGS_H
+
+#include <asm/cpregs.h>
+
+/* Layout as used in assembly, with src/dest registers mixed in */
+#define __CP32(r, coproc, opc1, crn, crm, opc2) coproc, opc1, r, crn, crm, opc2
+#define __CP64(r1, r2, coproc, opc, crm) coproc, opc, r1, r2, crm
+#define CP32(r, name...) __CP32(r, name)
+#define CP64(r, name...) __CP64(r, name)
+
+/* Stringified for inline assembly */
+#define LOAD_CP32(r, name...)  "mrc " __stringify(CP32(%r, name)) ";"
+#define STORE_CP32(r, name...) "mcr " __stringify(CP32(%r, name)) ";"
+#define LOAD_CP64(r, name...)  "mrrc " __stringify(CP64(%r, %H##r, name)) ";"
+#define STORE_CP64(r, name...) "mcrr " __stringify(CP64(%r, %H##r, name)) ";"
+
+/* Issue a CP operation which takes no argument,
+ * uses r0 as a placeholder register. */
+#define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
+
+#ifndef __ASSEMBLY__
+
+/* C wrappers */
+#define READ_CP32(name...) ({                                   \
+    register uint32_t _r;                                       \
+    asm volatile(LOAD_CP32(0, name) : "=r" (_r));               \
+    _r; })
+
+#define WRITE_CP32(v, name...) do {                             \
+    register uint32_t _r = (v);                                 \
+    asm volatile(STORE_CP32(0, name) : : "r" (_r));             \
+} while (0)
+
+#define READ_CP64(name...) ({                                   \
+    register uint64_t _r;                                       \
+    asm volatile(LOAD_CP64(0, name) : "=r" (_r));               \
+    _r; })
+
+#define WRITE_CP64(v, name...) do {                             \
+    register uint64_t _r = (v);                                 \
+    asm volatile(STORE_CP64(0, name) : : "r" (_r));             \
+} while (0)
+
+/*
+ * C wrappers for accessing system registers.
+ *
+ * Registers come in 3 types:
+ * - those which are always 32-bit regardless of AArch32 vs AArch64
+ *   (use {READ,WRITE}_SYSREG32).
+ * - those which are always 64-bit regardless of AArch32 vs AArch64
+ *   (use {READ,WRITE}_SYSREG64).
+ * - those which vary between AArch32 and AArch64 (use {READ,WRITE}_SYSREG).
+ */
+#define READ_SYSREG32(R...)     READ_CP32(R)
+#define WRITE_SYSREG32(V, R...) WRITE_CP32(V, R)
+
+#define READ_SYSREG64(R...)     READ_CP64(R)
+#define WRITE_SYSREG64(V, R...) WRITE_CP64(V, R)
+
+#define READ_SYSREG(R...)       READ_SYSREG32(R)
+#define WRITE_SYSREG(V, R...)   WRITE_SYSREG32(V, R)
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARM_ARM32_SYSREGS_H */
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/arm64/processor.h b/xen/include/asm-arm/arm64/processor.h
index c18ab7203d..765de1b74b 100644
--- a/xen/include/asm-arm/arm64/processor.h
+++ b/xen/include/asm-arm/arm64/processor.h
@@ -3,8 +3,6 @@
 
 #include <xen/stringify.h>
 
-#include <asm/arm64/sysregs.h>
-
 #ifndef __ASSEMBLY__
 
 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
@@ -89,29 +87,6 @@ struct cpu_user_regs
 
 #undef __DECL_REG
 
-/* Access to system registers */
-
-#define READ_SYSREG32(name) ({                          \
-    uint32_t _r;                                        \
-    asm volatile("mrs  %0, "__stringify(name) : "=r" (_r));         \
-    _r; })
-#define WRITE_SYSREG32(v, name) do {                    \
-    uint32_t _r = v;                                    \
-    asm volatile("msr "__stringify(name)", %0" : : "r" (_r));       \
-} while (0)
-
-#define WRITE_SYSREG64(v, name) do {                    \
-    uint64_t _r = v;                                    \
-    asm volatile("msr "__stringify(name)", %0" : : "r" (_r));       \
-} while (0)
-#define READ_SYSREG64(name) ({                          \
-    uint64_t _r;                                        \
-    asm volatile("mrs  %0, "__stringify(name) : "=r" (_r));         \
-    _r; })
-
-#define READ_SYSREG(name)     READ_SYSREG64(name)
-#define WRITE_SYSREG(v, name) WRITE_SYSREG64(v, name)
-
 #endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_ARM_ARM64_PROCESSOR_H */
diff --git a/xen/include/asm-arm/arm64/sysregs.h b/xen/include/asm-arm/arm64/sysregs.h
index f510925a2a..08585a969e 100644
--- a/xen/include/asm-arm/arm64/sysregs.h
+++ b/xen/include/asm-arm/arm64/sysregs.h
@@ -57,6 +57,29 @@
 #define ICH_AP1R2_EL2             __AP1Rx_EL2(2)
 #define ICH_AP1R3_EL2             __AP1Rx_EL2(3)
 
+/* Access to system registers */
+
+#define READ_SYSREG32(name) ({                          \
+    uint32_t _r;                                        \
+    asm volatile("mrs  %0, "__stringify(name) : "=r" (_r));         \
+    _r; })
+#define WRITE_SYSREG32(v, name) do {                    \
+    uint32_t _r = v;                                    \
+    asm volatile("msr "__stringify(name)", %0" : : "r" (_r));       \
+} while (0)
+
+#define WRITE_SYSREG64(v, name) do {                    \
+    uint64_t _r = v;                                    \
+    asm volatile("msr "__stringify(name)", %0" : : "r" (_r));       \
+} while (0)
+#define READ_SYSREG64(name) ({                          \
+    uint64_t _r;                                        \
+    asm volatile("mrs  %0, "__stringify(name) : "=r" (_r));         \
+    _r; })
+
+#define READ_SYSREG(name)     READ_SYSREG64(name)
+#define WRITE_SYSREG(v, name) WRITE_SYSREG64(v, name)
+
 #endif /* _ASM_ARM_ARM64_SYSREGS_H */
 
 /*
diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index bcdea970ca..1a1713ce02 100644
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -4,6 +4,7 @@
 #include <public/xen.h>
 #include <asm/processor.h>
 #include <asm/lpae.h>
+#include <asm/sysregs.h>
 
 #ifdef CONFIG_ARM_64
 #define PADDR_BITS              48
diff --git a/xen/include/asm-arm/percpu.h b/xen/include/asm-arm/percpu.h
index cdf64e0f77..6263e77251 100644
--- a/xen/include/asm-arm/percpu.h
+++ b/xen/include/asm-arm/percpu.h
@@ -4,13 +4,7 @@
 #ifndef __ASSEMBLY__
 
 #include <xen/types.h>
-#if defined(CONFIG_ARM_32)
-# include <asm/arm32/processor.h>
-#elif defined(CONFIG_ARM_64)
-# include <asm/arm64/processor.h>
-#else
-# error "unknown ARM variant"
-#endif
+#include <asm/sysregs.h>
 
 extern char __per_cpu_start[], __per_cpu_data_end[];
 extern unsigned long __per_cpu_offset[NR_CPUS];
diff --git a/xen/include/asm-arm/sysregs.h b/xen/include/asm-arm/sysregs.h
new file mode 100644
index 0000000000..5c5c51bbcd
--- /dev/null
+++ b/xen/include/asm-arm/sysregs.h
@@ -0,0 +1,22 @@
+#ifndef __ASM_ARM_SYSREGS_H
+#define __ASM_ARM_SYSREGS_H
+
+#if defined(CONFIG_ARM_32)
+# include <asm/arm32/sysregs.h>
+#elif defined(CONFIG_ARM_64)
+# include <asm/arm64/sysregs.h>
+#else
+# error "unknown ARM variant"
+#endif
+
+#endif /* __ASM_ARM_SYSREGS_H */
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
+
+
diff --git a/xen/include/asm-arm/time.h b/xen/include/asm-arm/time.h
index ea88e76304..9a7071a546 100644
--- a/xen/include/asm-arm/time.h
+++ b/xen/include/asm-arm/time.h
@@ -1,7 +1,7 @@
 #ifndef __ARM_TIME_H__
 #define __ARM_TIME_H__
 
-#include <asm/processor.h>
+#include <asm/sysregs.h>
 
 #define DT_MATCH_TIMER                      \
     DT_MATCH_COMPATIBLE("arm,armv7-timer"), \
-- 
2.11.0


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Re: [PATCH 10/22] xen/arm: Move SYSREG accessors in sysregs.h

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> System registers accessors are self-contained and should not be included
> everywhere in Xen. Move the accessors in sysregs.h and include the file
> when necessary.
>
> With that change, it is not necessary to include processor.h in time.h.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---


Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>


-- 

*Andrii Anisov*



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[PATCH 11/22] xen/arm: Move out of processor.h traps related variable/function

[Julien Grall]

do_unexpected_traps() is moved to traps.h while init_traps() and
hyp_traps_vectors() are moved to setup.h.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/processor.h | 6 ------
 xen/include/asm-arm/setup.h     | 3 +++
 xen/include/asm-arm/traps.h     | 2 ++
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 3592aa36d8..b05f17f35c 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -453,10 +453,6 @@ extern register_t __cpu_logical_map[];
 #endif
 
 #ifndef __ASSEMBLY__
-extern uint32_t hyp_traps_vector[];
-
-void init_traps(void);
-
 void panic_PAR(uint64_t par);
 
 void show_execution_state(struct cpu_user_regs *regs);
@@ -470,8 +466,6 @@ void show_registers(const struct cpu_user_regs *regs);
 #define cpu_to_core(_cpu)   (0)
 #define cpu_to_socket(_cpu) (0)
 
-void noreturn do_unexpected_trap(const char *msg, struct cpu_user_regs *regs);
-
 struct vcpu;
 void vcpu_regs_hyp_to_user(const struct vcpu *vcpu,
                            struct vcpu_guest_core_regs *regs);
diff --git a/xen/include/asm-arm/setup.h b/xen/include/asm-arm/setup.h
index 5f41ba0cba..11e1b2aacf 100644
--- a/xen/include/asm-arm/setup.h
+++ b/xen/include/asm-arm/setup.h
@@ -83,6 +83,9 @@ struct bootmodule *add_boot_module(bootmodule_kind kind,
 struct bootmodule *boot_module_find_by_kind(bootmodule_kind kind);
 const char *boot_module_kind_as_string(bootmodule_kind kind);
 
+extern uint32_t hyp_traps_vector[];
+void init_traps(void);
+
 #endif
 /*
  * Local variables:
diff --git a/xen/include/asm-arm/traps.h b/xen/include/asm-arm/traps.h
index 8b6f09b6b8..3d60160310 100644
--- a/xen/include/asm-arm/traps.h
+++ b/xen/include/asm-arm/traps.h
@@ -46,6 +46,8 @@ void do_trap_hvc_smccc(struct cpu_user_regs *regs);
 
 int do_bug_frame(struct cpu_user_regs *regs, vaddr_t pc);
 
+void noreturn do_unexpected_trap(const char *msg, struct cpu_user_regs *regs);
+
 /* Functions for pending virtual abort checking window. */
 void abort_guest_exit_start(void);
 void abort_guest_exit_end(void);
-- 
2.11.0


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Re: [PATCH 11/22] xen/arm: Move out of processor.h traps related variable/function

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> do_unexpected_traps() is moved to traps.h while init_traps() and
> hyp_traps_vectors() are moved to setup.h.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>

-- 

*Andrii Anisov*



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[PATCH 12/22] xen/arm: Only include stringify.h when necessary

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/arm32/sysregs.h   | 1 +
 xen/include/asm-arm/arm64/processor.h | 2 --
 xen/include/asm-arm/cpregs.h          | 2 --
 3 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/xen/include/asm-arm/arm32/sysregs.h b/xen/include/asm-arm/arm32/sysregs.h
index b25b59a557..25cdcbfa4e 100644
--- a/xen/include/asm-arm/arm32/sysregs.h
+++ b/xen/include/asm-arm/arm32/sysregs.h
@@ -1,6 +1,7 @@
 #ifndef __ASM_ARM_ARM32_SYSREGS_H
 #define __ASM_ARM_ARM32_SYSREGS_H
 
+#include <xen/stringify.h>
 #include <asm/cpregs.h>
 
 /* Layout as used in assembly, with src/dest registers mixed in */
diff --git a/xen/include/asm-arm/arm64/processor.h b/xen/include/asm-arm/arm64/processor.h
index 765de1b74b..81dfc5e615 100644
--- a/xen/include/asm-arm/arm64/processor.h
+++ b/xen/include/asm-arm/arm64/processor.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_ARM_ARM64_PROCESSOR_H
 #define __ASM_ARM_ARM64_PROCESSOR_H
 
-#include <xen/stringify.h>
-
 #ifndef __ASSEMBLY__
 
 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
index 07e5791983..97a3c6f1c1 100644
--- a/xen/include/asm-arm/cpregs.h
+++ b/xen/include/asm-arm/cpregs.h
@@ -1,8 +1,6 @@
 #ifndef __ASM_ARM_CPREGS_H
 #define __ASM_ARM_CPREGS_H
 
-#include <xen/stringify.h>
-
 /*
  * AArch32 Co-processor registers.
  *
-- 
2.11.0


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Re: [PATCH 12/22] xen/arm: Only include stringify.h when necessary

[Andrii Anisov]

On 18.10.18 16:20, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>


-- 

*Andrii Anisov*



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[PATCH 13/22] xen/arm: Only include vreg.h when necessary

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/vgic-v2.c       | 1 +
 xen/arch/arm/vgic-v3-its.c   | 1 +
 xen/arch/arm/vpl011.c        | 1 +
 xen/include/asm-arm/vgic.h   | 1 -
 xen/include/asm-arm/vpl011.h | 1 -
 5 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c
index f6c11f1e41..8526f9be04 100644
--- a/xen/arch/arm/vgic-v2.c
+++ b/xen/arch/arm/vgic-v2.c
@@ -31,6 +31,7 @@
 #include <asm/platform.h>
 #include <asm/vgic.h>
 #include <asm/vgic-emul.h>
+#include <asm/vreg.h>
 
 static struct {
     bool enabled;
diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index 9edd97c4e7..5b73c4ecd7 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -45,6 +45,7 @@
 #include <asm/gic_v3_its.h>
 #include <asm/vgic.h>
 #include <asm/vgic-emul.h>
+#include <asm/vreg.h>
 
 /*
  * Data structure to describe a virtual ITS.
diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
index a281eabd7e..117e41c760 100644
--- a/xen/arch/arm/vpl011.c
+++ b/xen/arch/arm/vpl011.c
@@ -33,6 +33,7 @@
 #include <asm/pl011-uart.h>
 #include <asm/vgic-emul.h>
 #include <asm/vpl011.h>
+#include <asm/vreg.h>
 
 /*
  * Since pl011 registers are 32-bit registers, all registers
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 374fdaa40d..760392f9ef 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -27,7 +27,6 @@
 #include <xen/rbtree.h>
 #include <asm/gic.h>
 #include <asm/mmio.h>
-#include <asm/vreg.h>
 
 struct pending_irq
 {
diff --git a/xen/include/asm-arm/vpl011.h b/xen/include/asm-arm/vpl011.h
index db95ff822f..a82869a53c 100644
--- a/xen/include/asm-arm/vpl011.h
+++ b/xen/include/asm-arm/vpl011.h
@@ -21,7 +21,6 @@
 
 #include <public/domctl.h>
 #include <public/io/ring.h>
-#include <asm/vreg.h>
 #include <xen/mm.h>
 
 /* helper macros */
-- 
2.11.0


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Re: [PATCH 13/22] xen/arm: Only include vreg.h when necessary

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---


Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>


-- 

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[PATCH 14/22] xen/arm: Remove unnecessary includes in asm/vgic.h

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/vgic.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 760392f9ef..0316d87f66 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -22,11 +22,8 @@
 #include <asm/new_vgic.h>
 #else
 
-#include <xen/bitops.h>
 #include <xen/radix-tree.h>
 #include <xen/rbtree.h>
-#include <asm/gic.h>
-#include <asm/mmio.h>
 
 struct pending_irq
 {
-- 
2.11.0


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Re: [PATCH 14/22] xen/arm: Remove unnecessary includes in asm/vgic.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>


-- 

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[PATCH 15/22] xen/arm: Remove unnecessary includes in asm/mmio.h

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/mmio.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/xen/include/asm-arm/mmio.h b/xen/include/asm-arm/mmio.h
index 3ed3f82bf7..8dbfb27682 100644
--- a/xen/include/asm-arm/mmio.h
+++ b/xen/include/asm-arm/mmio.h
@@ -23,8 +23,6 @@
 #include <xen/rwlock.h>
 
 #include <asm/hsr.h>
-#include <asm/processor.h>
-#include <asm/regs.h>
 
 #define MAX_IO_HANDLER  16
 
-- 
2.11.0


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Re: [PATCH 15/22] xen/arm: Remove unnecessary includes in asm/mmio.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

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[PATCH 16/22] xen/arm: Remove unnecessary includes in traps.c

[Julien Grall]

Also, include smccc.h instead of psci.h.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/traps.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 0dd664cc08..9c3be17df8 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -42,12 +42,10 @@
 #include <asm/cpufeature.h>
 #include <asm/debugger.h>
 #include <asm/event.h>
-#include <asm/flushtlb.h>
 #include <asm/hsr.h>
 #include <asm/mmio.h>
-#include <asm/monitor.h>
-#include <asm/psci.h>
 #include <asm/regs.h>
+#include <asm/smccc.h>
 #include <asm/traps.h>
 #include <asm/vgic.h>
 #include <asm/vtimer.h>
-- 
2.11.0


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Re: [PATCH 16/22] xen/arm: Remove unnecessary includes in traps.c

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Also, include smccc.h instead of psci.h.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

*Andrii Anisov*



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[PATCH 17/22] xen/arm: Remove unnecessary includes in asm/p2m.h

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/p2m.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h
index c03557544a..be58125fb7 100644
--- a/xen/include/asm-arm/p2m.h
+++ b/xen/include/asm-arm/p2m.h
@@ -5,10 +5,7 @@
 #include <xen/radix-tree.h>
 #include <xen/rwlock.h>
 #include <xen/mem_access.h>
-#include <public/vm_event.h> /* for vm_event_response_t */
-#include <public/memory.h>
 #include <xen/p2m-common.h>
-#include <public/memory.h>
 
 #define paddr_bits PADDR_BITS
 
-- 
2.11.0


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Re: [PATCH 17/22] xen/arm: Remove unnecessary includes in asm/p2m.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

*Andrii Anisov*



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[PATCH 18/22] xen/arm: Remove unnecessary includes in asm-arm/acpi.h

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/acpi.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/xen/include/asm-arm/acpi.h b/xen/include/asm-arm/acpi.h
index feec4fb0ac..50340281a9 100644
--- a/xen/include/asm-arm/acpi.h
+++ b/xen/include/asm-arm/acpi.h
@@ -23,7 +23,6 @@
 #ifndef _ASM_ARM_ACPI_H
 #define _ASM_ARM_ACPI_H
 
-#include <asm/page.h>
 #include <asm/setup.h>
 
 #define COMPILER_DEPENDENT_INT64   long long
-- 
2.11.0


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Re: [PATCH 18/22] xen/arm: Remove unnecessary includes in asm-arm/acpi.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

*Andrii Anisov*



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[PATCH 19/22] xen/arm: Remove unnecessary include in asm-arm/atomic.h

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/atomic.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/xen/include/asm-arm/atomic.h b/xen/include/asm-arm/atomic.h
index 50f2835e35..263e8c3b6c 100644
--- a/xen/include/asm-arm/atomic.h
+++ b/xen/include/asm-arm/atomic.h
@@ -2,8 +2,6 @@
 #define __ARCH_ARM_ATOMIC__
 
 #include <xen/atomic.h>
-#include <xen/prefetch.h>
-#include <asm/system.h>
 
 #define build_atomic_read(name, size, width, type, reg)\
 static inline type name(const volatile type *addr) \
-- 
2.11.0


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Re: [PATCH 19/22] xen/arm: Remove unnecessary include in asm-arm/atomic.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>


-- 

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[PATCH 20/22] xen/arm: Remove unnecessary includes in asm/current.h

[Julien Grall]

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/current.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/xen/include/asm-arm/current.h b/xen/include/asm-arm/current.h
index f9819b34fc..c4af66fbb9 100644
--- a/xen/include/asm-arm/current.h
+++ b/xen/include/asm-arm/current.h
@@ -2,9 +2,7 @@
 #define __ARM_CURRENT_H__
 
 #include <xen/percpu.h>
-#include <public/xen.h>
 
-#include <asm/percpu.h>
 #include <asm/processor.h>
 
 /* Tell whether the guest vCPU enabled Workaround 2 (i.e variant 4) */
-- 
2.11.0


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Re: [PATCH 20/22] xen/arm: Remove unnecessary includes in asm/current.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>


-- 

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[PATCH 21/22] xen/arm: platform: Don't include p2m.h in exynos5 and omap5

[Julien Grall]

None of the platforms are using the p2m helpers.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/platforms/exynos5.c | 1 -
 xen/arch/arm/platforms/omap5.c   | 1 -
 2 files changed, 2 deletions(-)

diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c
index e2c0b7b878..6560507092 100644
--- a/xen/arch/arm/platforms/exynos5.c
+++ b/xen/arch/arm/platforms/exynos5.c
@@ -17,7 +17,6 @@
  * GNU General Public License for more details.
  */
 
-#include <asm/p2m.h>
 #include <xen/device_tree.h>
 #include <xen/domain_page.h>
 #include <xen/mm.h>
diff --git a/xen/arch/arm/platforms/omap5.c b/xen/arch/arm/platforms/omap5.c
index 7dbba95756..aee24e4d28 100644
--- a/xen/arch/arm/platforms/omap5.c
+++ b/xen/arch/arm/platforms/omap5.c
@@ -17,7 +17,6 @@
  * GNU General Public License for more details.
  */
 
-#include <asm/p2m.h>
 #include <asm/platform.h>
 #include <asm/platforms/omap5.h>
 #include <xen/mm.h>
-- 
2.11.0


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Re: [PATCH 21/22] xen/arm: platform: Don't include p2m.h in exynos5 and omap5

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> None of the platforms are using the p2m helpers.
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> ---

Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>

-- 

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[PATCH 22/22] xen/arm: Move vgic_* helpers from gic.h to vgic.h

[Julien Grall]

Keep vgic_* helpers in a single place. At the same time remove gic.h
from event.h since the helpers has now been moved to vgic.h (included by
domain.h).

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/include/asm-arm/event.h | 1 -
 xen/include/asm-arm/gic.h   | 3 ---
 xen/include/asm-arm/vgic.h  | 5 +++++
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/xen/include/asm-arm/event.h b/xen/include/asm-arm/event.h
index 2f51864043..b14c166ad6 100644
--- a/xen/include/asm-arm/event.h
+++ b/xen/include/asm-arm/event.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_EVENT_H__
 #define __ASM_EVENT_H__
 
-#include <asm/gic.h>
 #include <asm/domain.h>
 
 void vcpu_kick(struct vcpu *v);
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index 22fa122e52..fab02f19f7 100644
--- a/xen/include/asm-arm/gic.h
+++ b/xen/include/asm-arm/gic.h
@@ -249,9 +249,7 @@ extern int gic_route_irq_to_guest(struct domain *, unsigned int virq,
 int gic_remove_irq_from_guest(struct domain *d, unsigned int virq,
                               struct irq_desc *desc);
 
-extern void vgic_sync_to_lrs(void);
 extern void gic_clear_pending_irqs(struct vcpu *v);
-extern int vgic_vcpu_pending_irq(struct vcpu *v);
 
 extern void init_maintenance_interrupt(void);
 extern void gic_raise_guest_irq(struct vcpu *v, unsigned int irq,
@@ -306,7 +304,6 @@ extern unsigned int gic_number_lines(void);
 /* IRQ translation function for the device tree */
 int gic_irq_xlate(const u32 *intspec, unsigned int intsize,
                   unsigned int *out_hwirq, unsigned int *out_type);
-void vgic_sync_from_lrs(struct vcpu *v);
 
 struct gic_info {
     /* GIC version */
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 0316d87f66..56ed5fe8fe 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -363,6 +363,11 @@ void vgic_v3_setup_hw(paddr_t dbase,
                       unsigned int intid_bits);
 #endif
 
+void vgic_sync_to_lrs(void);
+void vgic_sync_from_lrs(struct vcpu *v);
+
+int vgic_vcpu_pending_irq(struct vcpu *v);
+
 #endif /* __ASM_ARM_VGIC_H__ */
 
 /*
-- 
2.11.0


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Re: [PATCH 22/22] xen/arm: Move vgic_* helpers from gic.h to vgic.h

[Andrii Anisov]

On 18.10.18 16:21, Julien Grall wrote:
> Keep vgic_* helpers in a single place. At the same time remove gic.h
> from event.h since the helpers has now been moved to vgic.h (included by
> domain.h).
>
> Signed-off-by: Julien Grall <julien.grall@arm.com>


Reviewed-by: Andrii Anisov<andrii_anisov@epam.com>

-- 

*Andrii Anisov*



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