* [PATCH] sunxi: board: Fix UART PortF pinmux setup
@ 2022-05-06 0:37 Andre Przywara
2022-05-09 5:04 ` Samuel Holland
2022-05-24 16:14 ` Andre Przywara
0 siblings, 2 replies; 3+ messages in thread
From: Andre Przywara @ 2022-05-06 0:37 UTC (permalink / raw)
To: Jagan Teki; +Cc: Samuel Holland, Jernej Skrabec, u-boot, linux-sunxi
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
(usually used for the SD card) as UART0. Some SoCs use the mux value of
3 for this, while others use 4.
The combination of Kconfig symbols we currently use was not quite right:
we mis-configure the A31, A64, H6 and H616.
Going through the list in the pinctrl driver, there are only a few older
SoCs that use a value of 4, so revert the #ifdef clause, and name those
explicitly, instead of the other way around.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/mach-sunxi/board.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 173e946465d..8f7c894286d 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -87,15 +87,16 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
#endif
-#if (defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUN8I_R40)) || \
- defined(CONFIG_MACH_SUNIV)
- sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
- sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
-#else
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || \
+ defined(CONFIG_MACH_SUN7I) || defined(CONFIG_MACH_SUN8I_R40) || \
+ defined(CONFIG_MACH_SUN9I)
sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF_UART0);
+#else
+ sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
+ sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
#endif
- sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
+ sunxi_gpio_set_pull(SUNXI_GPF(4), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNIV)
sunxi_gpio_set_cfgpin(SUNXI_GPE(0), SUNIV_GPE_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPE(1), SUNIV_GPE_UART0);
--
2.35.3
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] sunxi: board: Fix UART PortF pinmux setup
2022-05-06 0:37 [PATCH] sunxi: board: Fix UART PortF pinmux setup Andre Przywara
@ 2022-05-09 5:04 ` Samuel Holland
2022-05-24 16:14 ` Andre Przywara
1 sibling, 0 replies; 3+ messages in thread
From: Samuel Holland @ 2022-05-09 5:04 UTC (permalink / raw)
To: Andre Przywara, Jagan Teki; +Cc: Jernej Skrabec, u-boot, linux-sunxi
On 5/5/22 7:37 PM, Andre Przywara wrote:
> When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
> (usually used for the SD card) as UART0. Some SoCs use the mux value of
> 3 for this, while others use 4.
>
> The combination of Kconfig symbols we currently use was not quite right:
> we mis-configure the A31, A64, H6 and H616.
>
> Going through the list in the pinctrl driver, there are only a few older
> SoCs that use a value of 4, so revert the #ifdef clause, and name those
> explicitly, instead of the other way around.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] sunxi: board: Fix UART PortF pinmux setup
2022-05-06 0:37 [PATCH] sunxi: board: Fix UART PortF pinmux setup Andre Przywara
2022-05-09 5:04 ` Samuel Holland
@ 2022-05-24 16:14 ` Andre Przywara
1 sibling, 0 replies; 3+ messages in thread
From: Andre Przywara @ 2022-05-24 16:14 UTC (permalink / raw)
To: Jagan Teki; +Cc: Samuel Holland, Jernej Skrabec, u-boot, linux-sunxi
On Fri, 6 May 2022 01:37:03 +0100
Andre Przywara <andre.przywara@arm.com> wrote:
> When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
> (usually used for the SD card) as UART0. Some SoCs use the mux value of
> 3 for this, while others use 4.
>
> The combination of Kconfig symbols we currently use was not quite right:
> we mis-configure the A31, A64, H6 and H616.
>
> Going through the list in the pinctrl driver, there are only a few older
> SoCs that use a value of 4, so revert the #ifdef clause, and name those
> explicitly, instead of the other way around.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Applied to sunxi/master.
Thanks,
Andre
> ---
> arch/arm/mach-sunxi/board.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index 173e946465d..8f7c894286d 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -87,15 +87,16 @@ static int gpio_init(void)
> sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
> sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
> #endif
> -#if (defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUN8I_R40)) || \
> - defined(CONFIG_MACH_SUNIV)
> - sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
> - sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
> -#else
> +#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || \
> + defined(CONFIG_MACH_SUN7I) || defined(CONFIG_MACH_SUN8I_R40) || \
> + defined(CONFIG_MACH_SUN9I)
> sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF_UART0);
> sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF_UART0);
> +#else
> + sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
> + sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
> #endif
> - sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
> + sunxi_gpio_set_pull(SUNXI_GPF(4), SUNXI_GPIO_PULL_UP);
> #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNIV)
> sunxi_gpio_set_cfgpin(SUNXI_GPE(0), SUNIV_GPE_UART0);
> sunxi_gpio_set_cfgpin(SUNXI_GPE(1), SUNIV_GPE_UART0);
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-05-24 16:16 UTC | newest]
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2022-05-06 0:37 [PATCH] sunxi: board: Fix UART PortF pinmux setup Andre Przywara
2022-05-09 5:04 ` Samuel Holland
2022-05-24 16:14 ` Andre Przywara
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