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From: Paolo Bonzini <pbonzini@redhat.com>
To: speck@linutronix.de
Subject: [MODERATED] Re: [PATCH v4 3/8] [PATCH v4 3/8] Linux Patch #3
Date: Mon, 25 Jun 2018 16:26:11 +0200	[thread overview]
Message-ID: <b785267d-32da-f92f-885e-8106bd228e38@redhat.com> (raw)
In-Reply-To: <20180623135445.641656585@localhost.localdomain>

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On 23/06/2018 15:54, speck for konrad.wilk_at_oracle.com wrote:
> +	if (static_cpu_has(X86_FEATURE_FLUSH_L1D)) {
> +		wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);
> +		return;
> +	}
> +
> +	/* FIXME: could this be boot_cpu_data.x86_cache_size * 2?  */
> +	size = PAGE_SIZE << L1D_CACHE_ORDER;

Regarding this "FIXME": Peter or Tim, do you know if loading 32KiB is
enough on pre-Skylake parts to clear the L1D cache?

Thanks,

Paolo


  reply	other threads:[~2018-06-25 14:26 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-23 13:54 [MODERATED] [PATCH v4 3/8] [PATCH v4 3/8] Linux Patch #3 konrad.wilk
2018-06-25 14:26 ` Paolo Bonzini [this message]
2018-06-25 16:32   ` [MODERATED] " Dave Hansen
2018-06-25 16:46     ` Paolo Bonzini
2018-06-25 17:26       ` Dave Hansen
2018-06-25 23:33       ` Andi Kleen
2018-06-26  6:41         ` Thomas Gleixner
2018-06-27 10:21 ` Thomas Gleixner
2018-06-27 16:08 ` [MODERATED] " Borislav Petkov

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