[PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[Chris Wilson]

__igt_spin_batch_new() may be used inside a background helper which is
competing against the GPU being reset. As such, we cannot even assert
that the spin->handle is busy immediately after submission as it may
have already been reset by another client writing to i915_wedged.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c | 17 ++++++++++++++---
 tests/pm_rps.c      |  4 +++-
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index ddd43451..4b20f23d 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -25,6 +25,7 @@
 #include <time.h>
 #include <signal.h>
 #include <pthread.h>
+#include <sys/poll.h>
 
 #include <i915_drm.h>
 
@@ -207,7 +208,6 @@ ___igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep,
 
 	spin->out_fence = emit_recursive_batch(spin, fd, ctx, engine, dep,
 					       out_fence);
-	igt_assert(gem_bo_busy(fd, spin->handle));
 
 	pthread_mutex_lock(&list_lock);
 	igt_list_add(&spin->link, &spin_list);
@@ -240,9 +240,14 @@ __igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
 igt_spin_t *
 igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
 {
+	igt_spin_t *spin;
+
 	igt_require_gem(fd);
 
-	return __igt_spin_batch_new(fd, ctx, engine, dep);
+	spin = __igt_spin_batch_new(fd, ctx, engine, dep);
+	igt_assert(gem_bo_busy(fd, spin->handle));
+
+	return spin;
 }
 
 igt_spin_t *
@@ -269,10 +274,16 @@ __igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
 igt_spin_t *
 igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
 {
+	igt_spin_t *spin;
+
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
-	return __igt_spin_batch_new_fence(fd, ctx, engine);
+	spin = __igt_spin_batch_new_fence(fd, ctx, engine);
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	igt_assert(poll(&(struct pollfd){spin->out_fence, POLLIN}, 1, 0) == 0);
+
+	return spin;
 }
 
 static void notify(union sigval arg)
diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f71976ed..006d084b 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -221,6 +221,8 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	igt_require_gem(drm_fd);
+
 	lh.exit = false;
 	lh.load = load;
 
@@ -233,7 +235,7 @@ static void load_helper_run(enum load load)
 
 		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
 
-		spin[0] = igt_spin_batch_new(drm_fd, 0, 0, 0);
+		spin[0] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
 		if (lh.load == HIGH)
 			spin[1] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
 		while (!lh.exit) {
-- 
2.16.2

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[igt-dev] [PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[Chris Wilson]

__igt_spin_batch_new() may be used inside a background helper which is
competing against the GPU being reset. As such, we cannot even assert
that the spin->handle is busy immediately after submission as it may
have already been reset by another client writing to i915_wedged.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c | 17 ++++++++++++++---
 tests/pm_rps.c      |  4 +++-
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index ddd43451..4b20f23d 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -25,6 +25,7 @@
 #include <time.h>
 #include <signal.h>
 #include <pthread.h>
+#include <sys/poll.h>
 
 #include <i915_drm.h>
 
@@ -207,7 +208,6 @@ ___igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep,
 
 	spin->out_fence = emit_recursive_batch(spin, fd, ctx, engine, dep,
 					       out_fence);
-	igt_assert(gem_bo_busy(fd, spin->handle));
 
 	pthread_mutex_lock(&list_lock);
 	igt_list_add(&spin->link, &spin_list);
@@ -240,9 +240,14 @@ __igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
 igt_spin_t *
 igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
 {
+	igt_spin_t *spin;
+
 	igt_require_gem(fd);
 
-	return __igt_spin_batch_new(fd, ctx, engine, dep);
+	spin = __igt_spin_batch_new(fd, ctx, engine, dep);
+	igt_assert(gem_bo_busy(fd, spin->handle));
+
+	return spin;
 }
 
 igt_spin_t *
@@ -269,10 +274,16 @@ __igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
 igt_spin_t *
 igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
 {
+	igt_spin_t *spin;
+
 	igt_require_gem(fd);
 	igt_require(gem_has_exec_fence(fd));
 
-	return __igt_spin_batch_new_fence(fd, ctx, engine);
+	spin = __igt_spin_batch_new_fence(fd, ctx, engine);
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	igt_assert(poll(&(struct pollfd){spin->out_fence, POLLIN}, 1, 0) == 0);
+
+	return spin;
 }
 
 static void notify(union sigval arg)
diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f71976ed..006d084b 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -221,6 +221,8 @@ static void load_helper_run(enum load load)
 		return;
 	}
 
+	igt_require_gem(drm_fd);
+
 	lh.exit = false;
 	lh.load = load;
 
@@ -233,7 +235,7 @@ static void load_helper_run(enum load load)
 
 		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
 
-		spin[0] = igt_spin_batch_new(drm_fd, 0, 0, 0);
+		spin[0] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
 		if (lh.load == HIGH)
 			spin[1] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
 		while (!lh.exit) {
-- 
2.16.2

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[PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently

[Chris Wilson]

If we do a global wait while trying to execute spinners in parallel,
it ends badly with a GPU hang.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_spin_batch.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/tests/gem_spin_batch.c b/tests/gem_spin_batch.c
index 026f9830..cffeb6d7 100644
--- a/tests/gem_spin_batch.c
+++ b/tests/gem_spin_batch.c
@@ -41,7 +41,7 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
 	struct timespec itv = { };
 	uint64_t elapsed;
 
-	spin = igt_spin_batch_new(fd, 0, engine, 0);
+	spin = __igt_spin_batch_new(fd, 0, engine, 0);
 	while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) {
 		igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0);
 
@@ -64,7 +64,6 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
 		 loops, (long long)elapsed, (long)(elapsed / timeout_100ms));
 
 	assert_within_epsilon(timeout_100ms * loops, elapsed, MAX_ERROR);
-	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
 }
 
 static void spin_exit_handler(int sig)
@@ -101,15 +100,18 @@ igt_main
 	}
 
 	for (e = intel_execution_engines; e->name; e++) {
-		if (e->exec_id == 0)
-			continue;
-
-		igt_subtest_f("basic-%s", e->name)
+		igt_subtest_f("basic-%s", e->name) {
+			intel_detect_and_clear_missed_interrupts(fd);
 			spin(fd, e->exec_id, 3);
+			igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+		}
 	}
 
-	igt_subtest("spin-each")
+	igt_subtest("spin-each") {
+		intel_detect_and_clear_missed_interrupts(fd);
 		spin_on_all_engines(fd, 3);
+		igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+	}
 
 	igt_fixture {
 		igt_stop_hang_detector();
-- 
2.16.2

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[igt-dev] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently

[Chris Wilson]

If we do a global wait while trying to execute spinners in parallel,
it ends badly with a GPU hang.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_spin_batch.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/tests/gem_spin_batch.c b/tests/gem_spin_batch.c
index 026f9830..cffeb6d7 100644
--- a/tests/gem_spin_batch.c
+++ b/tests/gem_spin_batch.c
@@ -41,7 +41,7 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
 	struct timespec itv = { };
 	uint64_t elapsed;
 
-	spin = igt_spin_batch_new(fd, 0, engine, 0);
+	spin = __igt_spin_batch_new(fd, 0, engine, 0);
 	while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) {
 		igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0);
 
@@ -64,7 +64,6 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
 		 loops, (long long)elapsed, (long)(elapsed / timeout_100ms));
 
 	assert_within_epsilon(timeout_100ms * loops, elapsed, MAX_ERROR);
-	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
 }
 
 static void spin_exit_handler(int sig)
@@ -101,15 +100,18 @@ igt_main
 	}
 
 	for (e = intel_execution_engines; e->name; e++) {
-		if (e->exec_id == 0)
-			continue;
-
-		igt_subtest_f("basic-%s", e->name)
+		igt_subtest_f("basic-%s", e->name) {
+			intel_detect_and_clear_missed_interrupts(fd);
 			spin(fd, e->exec_id, 3);
+			igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+		}
 	}
 
-	igt_subtest("spin-each")
+	igt_subtest("spin-each") {
+		intel_detect_and_clear_missed_interrupts(fd);
 		spin_on_all_engines(fd, 3);
+		igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
+	}
 
 	igt_fixture {
 		igt_stop_hang_detector();
-- 
2.16.2

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[PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once

[Chris Wilson]

Just a small variant to apply a continuous context-switch load to all
engines.
---
 tests/gem_ctx_switch.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index 79b1d74b..4c7c5391 100644
--- a/tests/gem_ctx_switch.c
+++ b/tests/gem_ctx_switch.c
@@ -133,6 +133,84 @@ static void single(int fd, uint32_t handle,
 		gem_context_destroy(fd, contexts[n]);
 }
 
+static void all(int fd, uint32_t handle, unsigned flags, int timeout)
+{
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	unsigned int engine[16], e;
+	const char *name[16];
+	uint32_t contexts[65];
+	unsigned int nengine;
+	int n;
+
+	nengine = 0;
+	for_each_engine(fd, e) {
+		if (e == 0 || e == I915_EXEC_BSD)
+			continue;
+
+		engine[nengine] = e;
+		name[nengine] = e__->name;
+		nengine++;
+	}
+	igt_require(nengine);
+
+	igt_require(__gem_context_create(fd, &contexts[0]) == 0);
+	for (n = 1; n < ARRAY_SIZE(contexts); n++)
+		contexts[n] = gem_context_create(fd);
+
+	memset(obj, 0, sizeof(obj));
+	obj[1].handle = handle;
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj + 1);
+	execbuf.buffer_count = 1;
+	execbuf.rsvd1 = contexts[0];
+	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
+	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
+	igt_require(__gem_execbuf(fd, &execbuf) == 0);
+	gem_sync(fd, handle);
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = 2;
+
+	for (int pot = 2; pot <= 64; pot *= 2) {
+		for (int nctx = pot - 1; nctx <= pot + 1; nctx++) {
+			igt_fork(child, nengine) {
+				struct timespec start, now;
+				unsigned int count = 0;
+
+				obj[0].handle = gem_create(fd, 4096);
+				execbuf.flags |= engine[child];
+				for (int loop = 0; loop < ARRAY_SIZE(contexts); loop++) {
+					execbuf.rsvd1 = contexts[loop];
+					gem_execbuf(fd, &execbuf);
+				}
+				gem_sync(fd, obj[0].handle);
+
+				clock_gettime(CLOCK_MONOTONIC, &start);
+				do {
+					for (int loop = 0; loop < 1024; loop++) {
+						execbuf.rsvd1 = contexts[loop % nctx];
+						gem_execbuf(fd, &execbuf);
+					}
+					count += 1024;
+					clock_gettime(CLOCK_MONOTONIC, &now);
+				} while (elapsed(&start, &now) < timeout);
+				gem_sync(fd, obj[0].handle);
+				clock_gettime(CLOCK_MONOTONIC, &now);
+				gem_close(fd, obj[0].handle);
+
+				igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
+					 nctx, child, name[child], count, elapsed(&start, &now)*1e6 / count,
+					 flags & INTERRUPTIBLE ? " (interruptible)" : "");
+			}
+			igt_waitchildren();
+		}
+	}
+
+	for (n = 0; n < ARRAY_SIZE(contexts); n++)
+		gem_context_destroy(fd, contexts[n]);
+}
+
 igt_main
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -175,6 +253,11 @@ igt_main
 			single(fd, light, e, INTERRUPTIBLE, ncpus, 150);
 	}
 
+	igt_subtest("basic-all")
+		all(fd, light, 0, 5);
+	igt_subtest("basic-all-heavy")
+		all(fd, heavy, 0, 20);
+
 	igt_fixture {
 		igt_stop_hang_detector();
 		gem_close(fd, heavy);
-- 
2.16.2

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[Intel-gfx] [PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once

[Chris Wilson]

Just a small variant to apply a continuous context-switch load to all
engines.
---
 tests/gem_ctx_switch.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)

diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index 79b1d74b..4c7c5391 100644
--- a/tests/gem_ctx_switch.c
+++ b/tests/gem_ctx_switch.c
@@ -133,6 +133,84 @@ static void single(int fd, uint32_t handle,
 		gem_context_destroy(fd, contexts[n]);
 }
 
+static void all(int fd, uint32_t handle, unsigned flags, int timeout)
+{
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	unsigned int engine[16], e;
+	const char *name[16];
+	uint32_t contexts[65];
+	unsigned int nengine;
+	int n;
+
+	nengine = 0;
+	for_each_engine(fd, e) {
+		if (e == 0 || e == I915_EXEC_BSD)
+			continue;
+
+		engine[nengine] = e;
+		name[nengine] = e__->name;
+		nengine++;
+	}
+	igt_require(nengine);
+
+	igt_require(__gem_context_create(fd, &contexts[0]) == 0);
+	for (n = 1; n < ARRAY_SIZE(contexts); n++)
+		contexts[n] = gem_context_create(fd);
+
+	memset(obj, 0, sizeof(obj));
+	obj[1].handle = handle;
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj + 1);
+	execbuf.buffer_count = 1;
+	execbuf.rsvd1 = contexts[0];
+	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
+	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
+	igt_require(__gem_execbuf(fd, &execbuf) == 0);
+	gem_sync(fd, handle);
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = 2;
+
+	for (int pot = 2; pot <= 64; pot *= 2) {
+		for (int nctx = pot - 1; nctx <= pot + 1; nctx++) {
+			igt_fork(child, nengine) {
+				struct timespec start, now;
+				unsigned int count = 0;
+
+				obj[0].handle = gem_create(fd, 4096);
+				execbuf.flags |= engine[child];
+				for (int loop = 0; loop < ARRAY_SIZE(contexts); loop++) {
+					execbuf.rsvd1 = contexts[loop];
+					gem_execbuf(fd, &execbuf);
+				}
+				gem_sync(fd, obj[0].handle);
+
+				clock_gettime(CLOCK_MONOTONIC, &start);
+				do {
+					for (int loop = 0; loop < 1024; loop++) {
+						execbuf.rsvd1 = contexts[loop % nctx];
+						gem_execbuf(fd, &execbuf);
+					}
+					count += 1024;
+					clock_gettime(CLOCK_MONOTONIC, &now);
+				} while (elapsed(&start, &now) < timeout);
+				gem_sync(fd, obj[0].handle);
+				clock_gettime(CLOCK_MONOTONIC, &now);
+				gem_close(fd, obj[0].handle);
+
+				igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
+					 nctx, child, name[child], count, elapsed(&start, &now)*1e6 / count,
+					 flags & INTERRUPTIBLE ? " (interruptible)" : "");
+			}
+			igt_waitchildren();
+		}
+	}
+
+	for (n = 0; n < ARRAY_SIZE(contexts); n++)
+		gem_context_destroy(fd, contexts[n]);
+}
+
 igt_main
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -175,6 +253,11 @@ igt_main
 			single(fd, light, e, INTERRUPTIBLE, ncpus, 150);
 	}
 
+	igt_subtest("basic-all")
+		all(fd, light, 0, 5);
+	igt_subtest("basic-all-heavy")
+		all(fd, heavy, 0, 20);
+
 	igt_fixture {
 		igt_stop_hang_detector();
 		gem_close(fd, heavy);
-- 
2.16.2

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[PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr

[Chris Wilson]

EXEC_OBJECT_CAPTURE extends the type of buffers we may read during error
capture. Previously we knew that we would only see batch buffers (which
limited the objects to being from gem_create()), but now we need to
check that any buffer the user can create can be read. The first
alternate buffer type is a userptr.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_exec_capture.c | 35 ++++++++++++++++++++++++++++++++---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/tests/gem_exec_capture.c b/tests/gem_exec_capture.c
index 43c443be..2dc06ce4 100644
--- a/tests/gem_exec_capture.c
+++ b/tests/gem_exec_capture.c
@@ -57,7 +57,7 @@ static void check_error_state(int dir, struct drm_i915_gem_exec_object2 *obj)
 	igt_assert(found);
 }
 
-static void capture(int fd, int dir, unsigned ring)
+static void __capture(int fd, int dir, unsigned ring, uint32_t target)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[4];
@@ -72,7 +72,7 @@ static void capture(int fd, int dir, unsigned ring)
 
 	memset(obj, 0, sizeof(obj));
 	obj[SCRATCH].handle = gem_create(fd, 4096);
-	obj[CAPTURE].handle = gem_create(fd, 4096);
+	obj[CAPTURE].handle = target;
 	obj[CAPTURE].flags = LOCAL_OBJECT_CAPTURE;
 	obj[NOCAPTURE].handle = gem_create(fd, 4096);
 
@@ -159,10 +159,32 @@ static void capture(int fd, int dir, unsigned ring)
 
 	gem_close(fd, obj[BATCH].handle);
 	gem_close(fd, obj[NOCAPTURE].handle);
-	gem_close(fd, obj[CAPTURE].handle);
 	gem_close(fd, obj[SCRATCH].handle);
 }
 
+static void capture(int fd, int dir, unsigned ring)
+{
+	uint32_t handle;
+
+	handle = gem_create(fd, 4096);
+	__capture(fd, dir, ring, handle);
+	gem_close(fd, handle);
+}
+
+static void userptr(int fd, int dir)
+{
+	uint32_t handle;
+	void *ptr;
+
+	igt_assert(posix_memalign(&ptr, 4096, 4096) == 0);
+	igt_require(__gem_userptr(fd, ptr, 4096, 0, 0, &handle) == 0);
+
+	__capture(fd, dir, 0, handle);
+
+	gem_close(fd, handle);
+	free(ptr);
+}
+
 static bool has_capture(int fd)
 {
 	drm_i915_getparam_t gp;
@@ -214,6 +236,13 @@ igt_main
 		}
 	}
 
+	/* And check we can read from different types of objects */
+
+	igt_subtest_f("userptr") {
+		igt_require(gem_can_store_dword(fd, 0));
+		userptr(fd, dir);
+	}
+
 	igt_fixture {
 		close(dir);
 		igt_disallow_hang(fd, hang);
-- 
2.16.2

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[Intel-gfx] [PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr

[Chris Wilson]

EXEC_OBJECT_CAPTURE extends the type of buffers we may read during error
capture. Previously we knew that we would only see batch buffers (which
limited the objects to being from gem_create()), but now we need to
check that any buffer the user can create can be read. The first
alternate buffer type is a userptr.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_exec_capture.c | 35 ++++++++++++++++++++++++++++++++---
 1 file changed, 32 insertions(+), 3 deletions(-)

diff --git a/tests/gem_exec_capture.c b/tests/gem_exec_capture.c
index 43c443be..2dc06ce4 100644
--- a/tests/gem_exec_capture.c
+++ b/tests/gem_exec_capture.c
@@ -57,7 +57,7 @@ static void check_error_state(int dir, struct drm_i915_gem_exec_object2 *obj)
 	igt_assert(found);
 }
 
-static void capture(int fd, int dir, unsigned ring)
+static void __capture(int fd, int dir, unsigned ring, uint32_t target)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	struct drm_i915_gem_exec_object2 obj[4];
@@ -72,7 +72,7 @@ static void capture(int fd, int dir, unsigned ring)
 
 	memset(obj, 0, sizeof(obj));
 	obj[SCRATCH].handle = gem_create(fd, 4096);
-	obj[CAPTURE].handle = gem_create(fd, 4096);
+	obj[CAPTURE].handle = target;
 	obj[CAPTURE].flags = LOCAL_OBJECT_CAPTURE;
 	obj[NOCAPTURE].handle = gem_create(fd, 4096);
 
@@ -159,10 +159,32 @@ static void capture(int fd, int dir, unsigned ring)
 
 	gem_close(fd, obj[BATCH].handle);
 	gem_close(fd, obj[NOCAPTURE].handle);
-	gem_close(fd, obj[CAPTURE].handle);
 	gem_close(fd, obj[SCRATCH].handle);
 }
 
+static void capture(int fd, int dir, unsigned ring)
+{
+	uint32_t handle;
+
+	handle = gem_create(fd, 4096);
+	__capture(fd, dir, ring, handle);
+	gem_close(fd, handle);
+}
+
+static void userptr(int fd, int dir)
+{
+	uint32_t handle;
+	void *ptr;
+
+	igt_assert(posix_memalign(&ptr, 4096, 4096) == 0);
+	igt_require(__gem_userptr(fd, ptr, 4096, 0, 0, &handle) == 0);
+
+	__capture(fd, dir, 0, handle);
+
+	gem_close(fd, handle);
+	free(ptr);
+}
+
 static bool has_capture(int fd)
 {
 	drm_i915_getparam_t gp;
@@ -214,6 +236,13 @@ igt_main
 		}
 	}
 
+	/* And check we can read from different types of objects */
+
+	igt_subtest_f("userptr") {
+		igt_require(gem_can_store_dword(fd, 0));
+		userptr(fd, dir);
+	}
+
 	igt_fixture {
 		close(dir);
 		igt_disallow_hang(fd, hang);
-- 
2.16.2

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[PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences

[Chris Wilson]

Execute the same batch on each engine and check that the composite fence
across all engines completes only after the batch is completed on every
engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_exec_fence.c | 127 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 127 insertions(+)

diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
index 93ed3b9b..36459e56 100644
--- a/tests/gem_exec_fence.c
+++ b/tests/gem_exec_fence.c
@@ -208,6 +208,113 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
 	gem_quiescent_gpu(fd);
 }
 
+static void test_fence_busy_all(int fd, unsigned flags)
+{
+	const int gen = intel_gen(intel_get_drm_devid(fd));
+	struct drm_i915_gem_exec_object2 obj;
+	struct drm_i915_gem_relocation_entry reloc;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct timespec tv;
+	uint32_t *batch;
+	unsigned int engine;
+	int all, i, timeout;
+
+	gem_quiescent_gpu(fd);
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(&obj);
+	execbuf.buffer_count = 1;
+
+	memset(&obj, 0, sizeof(obj));
+	obj.handle = gem_create(fd, 4096);
+
+	obj.relocs_ptr = to_user_pointer(&reloc);
+	obj.relocation_count = 1;
+	memset(&reloc, 0, sizeof(reloc));
+
+	batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
+	gem_set_domain(fd, obj.handle,
+		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+
+	reloc.target_handle = obj.handle; /* recurse */
+	reloc.presumed_offset = 0;
+	reloc.offset = sizeof(uint32_t);
+	reloc.delta = 0;
+	reloc.read_domains = I915_GEM_DOMAIN_COMMAND;
+	reloc.write_domain = 0;
+
+	i = 0;
+	batch[i] = MI_BATCH_BUFFER_START;
+	if (gen >= 8) {
+		batch[i] |= 1 << 8 | 1;
+		batch[++i] = 0;
+		batch[++i] = 0;
+	} else if (gen >= 6) {
+		batch[i] |= 1 << 8;
+		batch[++i] = 0;
+	} else {
+		batch[i] |= 2 << 6;
+		batch[++i] = 0;
+		if (gen < 4) {
+			batch[i] |= 1;
+			reloc.delta = 1;
+		}
+	}
+	i++;
+
+	all = -1;
+	for_each_engine(fd, engine) {
+		int fence, new;
+
+		execbuf.flags = engine | LOCAL_EXEC_FENCE_OUT;
+		execbuf.rsvd2 = -1;
+		gem_execbuf_wr(fd, &execbuf);
+		fence = execbuf.rsvd2 >> 32;
+		igt_assert(fence != -1);
+
+		if (all < 0) {
+			all = fence;
+			break;
+		}
+
+		new = sync_fence_merge(all, fence);
+		igt_assert_lte(0, new);
+		close(all);
+		close(fence);
+
+		all = new;
+	}
+
+	igt_assert(gem_bo_busy(fd, obj.handle));
+	igt_assert(fence_busy(all));
+
+	timeout = 120;
+	if ((flags & HANG) == 0) {
+		*batch = MI_BATCH_BUFFER_END;
+		__sync_synchronize();
+		timeout = 1;
+	}
+	munmap(batch, 4096);
+
+	if (flags & WAIT) {
+		struct pollfd pfd = { .fd = all, .events = POLLIN };
+		igt_assert(poll(&pfd, 1, timeout*1000) == 1);
+	} else {
+		memset(&tv, 0, sizeof(tv));
+		while (fence_busy(all))
+			igt_assert(igt_seconds_elapsed(&tv) < timeout);
+	}
+
+	igt_assert(!gem_bo_busy(fd, obj.handle));
+	igt_assert_eq(sync_fence_status(all),
+		      flags & HANG ? -EIO : SYNC_FENCE_OK);
+
+	close(all);
+	gem_close(fd, obj.handle);
+
+	gem_quiescent_gpu(fd);
+}
+
 static void test_fence_await(int fd, unsigned ring, unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -1465,6 +1572,26 @@ igt_main
 		gem_submission_print_method(i915);
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_fork_hang_detector(i915);
+		}
+
+		igt_subtest("basic-busy-all")
+			test_fence_busy_all(i915, 0);
+		igt_subtest("basic-wait-all")
+			test_fence_busy_all(i915, WAIT);
+
+		igt_fixture {
+			igt_stop_hang_detector();
+		}
+
+		igt_subtest("busy-hang-all")
+			test_fence_busy_all(i915, HANG);
+		igt_subtest("wait-hang-all")
+			test_fence_busy_all(i915, WAIT | HANG);
+	}
+
 	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_group {
 			igt_fixture {
-- 
2.16.2

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[igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences

[Chris Wilson]

Execute the same batch on each engine and check that the composite fence
across all engines completes only after the batch is completed on every
engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/gem_exec_fence.c | 127 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 127 insertions(+)

diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
index 93ed3b9b..36459e56 100644
--- a/tests/gem_exec_fence.c
+++ b/tests/gem_exec_fence.c
@@ -208,6 +208,113 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
 	gem_quiescent_gpu(fd);
 }
 
+static void test_fence_busy_all(int fd, unsigned flags)
+{
+	const int gen = intel_gen(intel_get_drm_devid(fd));
+	struct drm_i915_gem_exec_object2 obj;
+	struct drm_i915_gem_relocation_entry reloc;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct timespec tv;
+	uint32_t *batch;
+	unsigned int engine;
+	int all, i, timeout;
+
+	gem_quiescent_gpu(fd);
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(&obj);
+	execbuf.buffer_count = 1;
+
+	memset(&obj, 0, sizeof(obj));
+	obj.handle = gem_create(fd, 4096);
+
+	obj.relocs_ptr = to_user_pointer(&reloc);
+	obj.relocation_count = 1;
+	memset(&reloc, 0, sizeof(reloc));
+
+	batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
+	gem_set_domain(fd, obj.handle,
+		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+
+	reloc.target_handle = obj.handle; /* recurse */
+	reloc.presumed_offset = 0;
+	reloc.offset = sizeof(uint32_t);
+	reloc.delta = 0;
+	reloc.read_domains = I915_GEM_DOMAIN_COMMAND;
+	reloc.write_domain = 0;
+
+	i = 0;
+	batch[i] = MI_BATCH_BUFFER_START;
+	if (gen >= 8) {
+		batch[i] |= 1 << 8 | 1;
+		batch[++i] = 0;
+		batch[++i] = 0;
+	} else if (gen >= 6) {
+		batch[i] |= 1 << 8;
+		batch[++i] = 0;
+	} else {
+		batch[i] |= 2 << 6;
+		batch[++i] = 0;
+		if (gen < 4) {
+			batch[i] |= 1;
+			reloc.delta = 1;
+		}
+	}
+	i++;
+
+	all = -1;
+	for_each_engine(fd, engine) {
+		int fence, new;
+
+		execbuf.flags = engine | LOCAL_EXEC_FENCE_OUT;
+		execbuf.rsvd2 = -1;
+		gem_execbuf_wr(fd, &execbuf);
+		fence = execbuf.rsvd2 >> 32;
+		igt_assert(fence != -1);
+
+		if (all < 0) {
+			all = fence;
+			break;
+		}
+
+		new = sync_fence_merge(all, fence);
+		igt_assert_lte(0, new);
+		close(all);
+		close(fence);
+
+		all = new;
+	}
+
+	igt_assert(gem_bo_busy(fd, obj.handle));
+	igt_assert(fence_busy(all));
+
+	timeout = 120;
+	if ((flags & HANG) == 0) {
+		*batch = MI_BATCH_BUFFER_END;
+		__sync_synchronize();
+		timeout = 1;
+	}
+	munmap(batch, 4096);
+
+	if (flags & WAIT) {
+		struct pollfd pfd = { .fd = all, .events = POLLIN };
+		igt_assert(poll(&pfd, 1, timeout*1000) == 1);
+	} else {
+		memset(&tv, 0, sizeof(tv));
+		while (fence_busy(all))
+			igt_assert(igt_seconds_elapsed(&tv) < timeout);
+	}
+
+	igt_assert(!gem_bo_busy(fd, obj.handle));
+	igt_assert_eq(sync_fence_status(all),
+		      flags & HANG ? -EIO : SYNC_FENCE_OK);
+
+	close(all);
+	gem_close(fd, obj.handle);
+
+	gem_quiescent_gpu(fd);
+}
+
 static void test_fence_await(int fd, unsigned ring, unsigned flags)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -1465,6 +1572,26 @@ igt_main
 		gem_submission_print_method(i915);
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_fork_hang_detector(i915);
+		}
+
+		igt_subtest("basic-busy-all")
+			test_fence_busy_all(i915, 0);
+		igt_subtest("basic-wait-all")
+			test_fence_busy_all(i915, WAIT);
+
+		igt_fixture {
+			igt_stop_hang_detector();
+		}
+
+		igt_subtest("busy-hang-all")
+			test_fence_busy_all(i915, HANG);
+		igt_subtest("wait-hang-all")
+			test_fence_busy_all(i915, WAIT | HANG);
+	}
+
 	for (e = intel_execution_engines; e->name; e++) {
 		igt_subtest_group {
 			igt_fixture {
-- 
2.16.2

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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[Patchwork]

== Series Details ==

Series: series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor
URL   : https://patchwork.freedesktop.org/series/39134/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
0d47ec161b4eca1b41c5348604aa05b105e5d1cf tests/perf: Fix build warning

with latest DRM-Tip kernel build CI_DRM_3850
573e919160e5 drm-tip: 2018y-02m-28d-16h-17m-37s UTC integration manifest

Testlist changes:
+igt@gem_ctx_switch@basic-all
+igt@gem_ctx_switch@basic-all-heavy
+igt@gem_exec_capture@userptr
+igt@gem_exec_fence@basic-busy-all
+igt@gem_exec_fence@basic-wait-all
+igt@gem_exec_fence@busy-hang-all
+igt@gem_exec_fence@wait-hang-all
+igt@gem_spin_batch@basic-default

---- Known issues:

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                fail       -> PASS       (fi-gdg-551) fdo#102575
Test prime_vgem:
        Subgroup basic-fence-flip:
                pass       -> FAIL       (fi-ilk-650) fdo#104008

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:417s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:372s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:486s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:285s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:478s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:485s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:469s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:459s
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:389s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:561s
fi-cnl-y3        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:582s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:404s
fi-gdg-551       total:288  pass:180  dwarn:0   dfail:0   fail:0   skip:108 time:286s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:509s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:388s
fi-ilk-650       total:288  pass:227  dwarn:0   dfail:0   fail:1   skip:60  time:409s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:452s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:416s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:457s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:492s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:495s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:586s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:427s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:500s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:518s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:484s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:478s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:410s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:430s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:522s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:395s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1026/issues.html
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Re: [igt-dev] [PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once

[Antonio Argenziano]

On 28/02/18 07:51, Chris Wilson wrote:
> Just a small variant to apply a continuous context-switch load to all
> engines.
> ---
>   tests/gem_ctx_switch.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 83 insertions(+)
> 
> diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
> index 79b1d74b..4c7c5391 100644
> --- a/tests/gem_ctx_switch.c
> +++ b/tests/gem_ctx_switch.c
> @@ -133,6 +133,84 @@ static void single(int fd, uint32_t handle,
>   		gem_context_destroy(fd, contexts[n]);
>   }
>   
> +static void all(int fd, uint32_t handle, unsigned flags, int timeout)
> +{
> +	struct drm_i915_gem_execbuffer2 execbuf;
> +	struct drm_i915_gem_exec_object2 obj[2];
> +	unsigned int engine[16], e;
> +	const char *name[16];
> +	uint32_t contexts[65];
> +	unsigned int nengine;
> +	int n;
> +
> +	nengine = 0;
> +	for_each_engine(fd, e) {
> +		if (e == 0 || e == I915_EXEC_BSD)
> +			continue;

for_each_physical_engine()?

> +
> +		engine[nengine] = e;
> +		name[nengine] = e__->name;
> +		nengine++;
> +	}
> +	igt_require(nengine);
> +
> +	igt_require(__gem_context_create(fd, &contexts[0]) == 0);

gem_require_contexts already in fixture.

Thanks,
Antonio

> +	for (n = 1; n < ARRAY_SIZE(contexts); n++)
> +		contexts[n] = gem_context_create(fd);
> +
> +	memset(obj, 0, sizeof(obj));
> +	obj[1].handle = handle;
> +
> +	memset(&execbuf, 0, sizeof(execbuf));
> +	execbuf.buffers_ptr = to_user_pointer(obj + 1);
> +	execbuf.buffer_count = 1;
> +	execbuf.rsvd1 = contexts[0];
> +	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
> +	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
> +	igt_require(__gem_execbuf(fd, &execbuf) == 0);
> +	gem_sync(fd, handle);
> +	execbuf.buffers_ptr = to_user_pointer(obj);
> +	execbuf.buffer_count = 2;
> +
> +	for (int pot = 2; pot <= 64; pot *= 2) {
> +		for (int nctx = pot - 1; nctx <= pot + 1; nctx++) {
> +			igt_fork(child, nengine) {
> +				struct timespec start, now;
> +				unsigned int count = 0;
> +
> +				obj[0].handle = gem_create(fd, 4096);
> +				execbuf.flags |= engine[child];
> +				for (int loop = 0; loop < ARRAY_SIZE(contexts); loop++) {
> +					execbuf.rsvd1 = contexts[loop];
> +					gem_execbuf(fd, &execbuf);
> +				}
> +				gem_sync(fd, obj[0].handle);
> +
> +				clock_gettime(CLOCK_MONOTONIC, &start);
> +				do {
> +					for (int loop = 0; loop < 1024; loop++) {
> +						execbuf.rsvd1 = contexts[loop % nctx];
> +						gem_execbuf(fd, &execbuf);
> +					}
> +					count += 1024;
> +					clock_gettime(CLOCK_MONOTONIC, &now);
> +				} while (elapsed(&start, &now) < timeout);
> +				gem_sync(fd, obj[0].handle);
> +				clock_gettime(CLOCK_MONOTONIC, &now);
> +				gem_close(fd, obj[0].handle);
> +
> +				igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
> +					 nctx, child, name[child], count, elapsed(&start, &now)*1e6 / count,
> +					 flags & INTERRUPTIBLE ? " (interruptible)" : "");
> +			}
> +			igt_waitchildren();
> +		}
> +	}
> +
> +	for (n = 0; n < ARRAY_SIZE(contexts); n++)
> +		gem_context_destroy(fd, contexts[n]);
> +}
> +
>   igt_main
>   {
>   	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
> @@ -175,6 +253,11 @@ igt_main
>   			single(fd, light, e, INTERRUPTIBLE, ncpus, 150);
>   	}
>   
> +	igt_subtest("basic-all")
> +		all(fd, light, 0, 5);
> +	igt_subtest("basic-all-heavy")
> +		all(fd, heavy, 0, 20);
> +
>   	igt_fixture {
>   		igt_stop_hang_detector();
>   		gem_close(fd, heavy);
> 
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Re: [igt-dev] [PATCH igt 3/5] igt/gem_ctx_switch: Exercise all engines at once

[Antonio Argenziano]

On 28/02/18 07:51, Chris Wilson wrote:
> Just a small variant to apply a continuous context-switch load to all
> engines.
> ---
>   tests/gem_ctx_switch.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 83 insertions(+)
> 
> diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
> index 79b1d74b..4c7c5391 100644
> --- a/tests/gem_ctx_switch.c
> +++ b/tests/gem_ctx_switch.c
> @@ -133,6 +133,84 @@ static void single(int fd, uint32_t handle,
>   		gem_context_destroy(fd, contexts[n]);
>   }
>   
> +static void all(int fd, uint32_t handle, unsigned flags, int timeout)
> +{
> +	struct drm_i915_gem_execbuffer2 execbuf;
> +	struct drm_i915_gem_exec_object2 obj[2];
> +	unsigned int engine[16], e;
> +	const char *name[16];
> +	uint32_t contexts[65];
> +	unsigned int nengine;
> +	int n;
> +
> +	nengine = 0;
> +	for_each_engine(fd, e) {
> +		if (e == 0 || e == I915_EXEC_BSD)
> +			continue;

for_each_physical_engine()?

> +
> +		engine[nengine] = e;
> +		name[nengine] = e__->name;
> +		nengine++;
> +	}
> +	igt_require(nengine);
> +
> +	igt_require(__gem_context_create(fd, &contexts[0]) == 0);

gem_require_contexts already in fixture.

Thanks,
Antonio

> +	for (n = 1; n < ARRAY_SIZE(contexts); n++)
> +		contexts[n] = gem_context_create(fd);
> +
> +	memset(obj, 0, sizeof(obj));
> +	obj[1].handle = handle;
> +
> +	memset(&execbuf, 0, sizeof(execbuf));
> +	execbuf.buffers_ptr = to_user_pointer(obj + 1);
> +	execbuf.buffer_count = 1;
> +	execbuf.rsvd1 = contexts[0];
> +	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
> +	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
> +	igt_require(__gem_execbuf(fd, &execbuf) == 0);
> +	gem_sync(fd, handle);
> +	execbuf.buffers_ptr = to_user_pointer(obj);
> +	execbuf.buffer_count = 2;
> +
> +	for (int pot = 2; pot <= 64; pot *= 2) {
> +		for (int nctx = pot - 1; nctx <= pot + 1; nctx++) {
> +			igt_fork(child, nengine) {
> +				struct timespec start, now;
> +				unsigned int count = 0;
> +
> +				obj[0].handle = gem_create(fd, 4096);
> +				execbuf.flags |= engine[child];
> +				for (int loop = 0; loop < ARRAY_SIZE(contexts); loop++) {
> +					execbuf.rsvd1 = contexts[loop];
> +					gem_execbuf(fd, &execbuf);
> +				}
> +				gem_sync(fd, obj[0].handle);
> +
> +				clock_gettime(CLOCK_MONOTONIC, &start);
> +				do {
> +					for (int loop = 0; loop < 1024; loop++) {
> +						execbuf.rsvd1 = contexts[loop % nctx];
> +						gem_execbuf(fd, &execbuf);
> +					}
> +					count += 1024;
> +					clock_gettime(CLOCK_MONOTONIC, &now);
> +				} while (elapsed(&start, &now) < timeout);
> +				gem_sync(fd, obj[0].handle);
> +				clock_gettime(CLOCK_MONOTONIC, &now);
> +				gem_close(fd, obj[0].handle);
> +
> +				igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
> +					 nctx, child, name[child], count, elapsed(&start, &now)*1e6 / count,
> +					 flags & INTERRUPTIBLE ? " (interruptible)" : "");
> +			}
> +			igt_waitchildren();
> +		}
> +	}
> +
> +	for (n = 0; n < ARRAY_SIZE(contexts); n++)
> +		gem_context_destroy(fd, contexts[n]);
> +}
> +
>   igt_main
>   {
>   	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
> @@ -175,6 +253,11 @@ igt_main
>   			single(fd, light, e, INTERRUPTIBLE, ncpus, 150);
>   	}
>   
> +	igt_subtest("basic-all")
> +		all(fd, light, 0, 5);
> +	igt_subtest("basic-all-heavy")
> +		all(fd, heavy, 0, 20);
> +
>   	igt_fixture {
>   		igt_stop_hang_detector();
>   		gem_close(fd, heavy);
> 
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[igt-dev] ✗ Fi.CI.IGT: warning for series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[Patchwork]

== Series Details ==

Series: series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor
URL   : https://patchwork.freedesktop.org/series/39134/
State : warning

== Summary ==

---- Possible new issues:

Test kms_draw_crc:
        Subgroup draw-method-xrgb8888-mmap-cpu-xtiled:
                skip       -> PASS       (shard-snb)
Test kms_vblank:
        Subgroup pipe-a-ts-continuation-dpms-suspend:
                pass       -> SKIP       (shard-snb)

---- Known issues:

Test kms_flip:
        Subgroup 2x-plain-flip-ts-check-interruptible:
                fail       -> PASS       (shard-hsw) fdo#100368 +1
        Subgroup dpms-vs-vblank-race-interruptible:
                fail       -> PASS       (shard-hsw) fdo#103060
Test kms_plane_multiple:
        Subgroup atomic-pipe-b-tiling-y:
                pass       -> FAIL       (shard-apl) fdo#103166
Test perf:
        Subgroup oa-exponents:
                pass       -> INCOMPLETE (shard-apl) fdo#102254

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254

shard-apl        total:3407 pass:1788 dwarn:1   dfail:0   fail:8   skip:1607 time:11654s
shard-hsw        total:3451 pass:1760 dwarn:1   dfail:0   fail:1   skip:1687 time:11618s
shard-snb        total:3451 pass:1353 dwarn:1   dfail:0   fail:1   skip:2095 time:6701s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1026/shards.html
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Re: [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences

[Antonio Argenziano]

On 28/02/18 07:51, Chris Wilson wrote:
> Execute the same batch on each engine and check that the composite fence
> across all engines completes only after the batch is completed on every
> engine.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

LGTM.

Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>

> ---
>   tests/gem_exec_fence.c | 127 +++++++++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 127 insertions(+)
> 
> diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
> index 93ed3b9b..36459e56 100644
> --- a/tests/gem_exec_fence.c
> +++ b/tests/gem_exec_fence.c
> @@ -208,6 +208,113 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
>   	gem_quiescent_gpu(fd);
>   }
>   
> +static void test_fence_busy_all(int fd, unsigned flags)
> +{
> +	const int gen = intel_gen(intel_get_drm_devid(fd));
> +	struct drm_i915_gem_exec_object2 obj;
> +	struct drm_i915_gem_relocation_entry reloc;
> +	struct drm_i915_gem_execbuffer2 execbuf;
> +	struct timespec tv;
> +	uint32_t *batch;
> +	unsigned int engine;
> +	int all, i, timeout;
> +
> +	gem_quiescent_gpu(fd);
> +
> +	memset(&execbuf, 0, sizeof(execbuf));
> +	execbuf.buffers_ptr = to_user_pointer(&obj);
> +	execbuf.buffer_count = 1;
> +
> +	memset(&obj, 0, sizeof(obj));
> +	obj.handle = gem_create(fd, 4096);
> +
> +	obj.relocs_ptr = to_user_pointer(&reloc);
> +	obj.relocation_count = 1;
> +	memset(&reloc, 0, sizeof(reloc));
> +
> +	batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
> +	gem_set_domain(fd, obj.handle,
> +		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> +
> +	reloc.target_handle = obj.handle; /* recurse */
> +	reloc.presumed_offset = 0;
> +	reloc.offset = sizeof(uint32_t);
> +	reloc.delta = 0;
> +	reloc.read_domains = I915_GEM_DOMAIN_COMMAND;
> +	reloc.write_domain = 0;
> +
> +	i = 0;
> +	batch[i] = MI_BATCH_BUFFER_START;
> +	if (gen >= 8) {
> +		batch[i] |= 1 << 8 | 1;
> +		batch[++i] = 0;
> +		batch[++i] = 0;
> +	} else if (gen >= 6) {
> +		batch[i] |= 1 << 8;
> +		batch[++i] = 0;
> +	} else {
> +		batch[i] |= 2 << 6;
> +		batch[++i] = 0;
> +		if (gen < 4) {
> +			batch[i] |= 1;
> +			reloc.delta = 1;
> +		}
> +	}
> +	i++;
> +
> +	all = -1;
> +	for_each_engine(fd, engine) {
> +		int fence, new;
> +
> +		execbuf.flags = engine | LOCAL_EXEC_FENCE_OUT;
> +		execbuf.rsvd2 = -1;
> +		gem_execbuf_wr(fd, &execbuf);
> +		fence = execbuf.rsvd2 >> 32;
> +		igt_assert(fence != -1);
> +
> +		if (all < 0) {
> +			all = fence;
> +			break;
> +		}
> +
> +		new = sync_fence_merge(all, fence);
> +		igt_assert_lte(0, new);
> +		close(all);
> +		close(fence);
> +
> +		all = new;
> +	}
> +
> +	igt_assert(gem_bo_busy(fd, obj.handle));
> +	igt_assert(fence_busy(all));
> +
> +	timeout = 120;
> +	if ((flags & HANG) == 0) {
> +		*batch = MI_BATCH_BUFFER_END;
> +		__sync_synchronize();
> +		timeout = 1;
> +	}
> +	munmap(batch, 4096);
> +
> +	if (flags & WAIT) {
> +		struct pollfd pfd = { .fd = all, .events = POLLIN };
> +		igt_assert(poll(&pfd, 1, timeout*1000) == 1);
> +	} else {
> +		memset(&tv, 0, sizeof(tv));
> +		while (fence_busy(all))
> +			igt_assert(igt_seconds_elapsed(&tv) < timeout);
> +	}
> +
> +	igt_assert(!gem_bo_busy(fd, obj.handle));
> +	igt_assert_eq(sync_fence_status(all),
> +		      flags & HANG ? -EIO : SYNC_FENCE_OK);

Do you get -EIO also if only one engine hangs?

Thanks,
Antonio

> +
> +	close(all);
> +	gem_close(fd, obj.handle);
> +
> +	gem_quiescent_gpu(fd);
> +}
> +
>   static void test_fence_await(int fd, unsigned ring, unsigned flags)
>   {
>   	const int gen = intel_gen(intel_get_drm_devid(fd));
> @@ -1465,6 +1572,26 @@ igt_main
>   		gem_submission_print_method(i915);
>   	}
>   
> +	igt_subtest_group {
> +		igt_fixture {
> +			igt_fork_hang_detector(i915);
> +		}
> +
> +		igt_subtest("basic-busy-all")
> +			test_fence_busy_all(i915, 0);
> +		igt_subtest("basic-wait-all")
> +			test_fence_busy_all(i915, WAIT);
> +
> +		igt_fixture {
> +			igt_stop_hang_detector();
> +		}
> +
> +		igt_subtest("busy-hang-all")
> +			test_fence_busy_all(i915, HANG);
> +		igt_subtest("wait-hang-all")
> +			test_fence_busy_all(i915, WAIT | HANG);
> +	}
> +
>   	for (e = intel_execution_engines; e->name; e++) {
>   		igt_subtest_group {
>   			igt_fixture {
> 
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Re: [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences

[Antonio Argenziano]

On 28/02/18 07:51, Chris Wilson wrote:
> Execute the same batch on each engine and check that the composite fence
> across all engines completes only after the batch is completed on every
> engine.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

LGTM.

Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>

> ---
>   tests/gem_exec_fence.c | 127 +++++++++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 127 insertions(+)
> 
> diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
> index 93ed3b9b..36459e56 100644
> --- a/tests/gem_exec_fence.c
> +++ b/tests/gem_exec_fence.c
> @@ -208,6 +208,113 @@ static void test_fence_busy(int fd, unsigned ring, unsigned flags)
>   	gem_quiescent_gpu(fd);
>   }
>   
> +static void test_fence_busy_all(int fd, unsigned flags)
> +{
> +	const int gen = intel_gen(intel_get_drm_devid(fd));
> +	struct drm_i915_gem_exec_object2 obj;
> +	struct drm_i915_gem_relocation_entry reloc;
> +	struct drm_i915_gem_execbuffer2 execbuf;
> +	struct timespec tv;
> +	uint32_t *batch;
> +	unsigned int engine;
> +	int all, i, timeout;
> +
> +	gem_quiescent_gpu(fd);
> +
> +	memset(&execbuf, 0, sizeof(execbuf));
> +	execbuf.buffers_ptr = to_user_pointer(&obj);
> +	execbuf.buffer_count = 1;
> +
> +	memset(&obj, 0, sizeof(obj));
> +	obj.handle = gem_create(fd, 4096);
> +
> +	obj.relocs_ptr = to_user_pointer(&reloc);
> +	obj.relocation_count = 1;
> +	memset(&reloc, 0, sizeof(reloc));
> +
> +	batch = gem_mmap__wc(fd, obj.handle, 0, 4096, PROT_WRITE);
> +	gem_set_domain(fd, obj.handle,
> +		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> +
> +	reloc.target_handle = obj.handle; /* recurse */
> +	reloc.presumed_offset = 0;
> +	reloc.offset = sizeof(uint32_t);
> +	reloc.delta = 0;
> +	reloc.read_domains = I915_GEM_DOMAIN_COMMAND;
> +	reloc.write_domain = 0;
> +
> +	i = 0;
> +	batch[i] = MI_BATCH_BUFFER_START;
> +	if (gen >= 8) {
> +		batch[i] |= 1 << 8 | 1;
> +		batch[++i] = 0;
> +		batch[++i] = 0;
> +	} else if (gen >= 6) {
> +		batch[i] |= 1 << 8;
> +		batch[++i] = 0;
> +	} else {
> +		batch[i] |= 2 << 6;
> +		batch[++i] = 0;
> +		if (gen < 4) {
> +			batch[i] |= 1;
> +			reloc.delta = 1;
> +		}
> +	}
> +	i++;
> +
> +	all = -1;
> +	for_each_engine(fd, engine) {
> +		int fence, new;
> +
> +		execbuf.flags = engine | LOCAL_EXEC_FENCE_OUT;
> +		execbuf.rsvd2 = -1;
> +		gem_execbuf_wr(fd, &execbuf);
> +		fence = execbuf.rsvd2 >> 32;
> +		igt_assert(fence != -1);
> +
> +		if (all < 0) {
> +			all = fence;
> +			break;
> +		}
> +
> +		new = sync_fence_merge(all, fence);
> +		igt_assert_lte(0, new);
> +		close(all);
> +		close(fence);
> +
> +		all = new;
> +	}
> +
> +	igt_assert(gem_bo_busy(fd, obj.handle));
> +	igt_assert(fence_busy(all));
> +
> +	timeout = 120;
> +	if ((flags & HANG) == 0) {
> +		*batch = MI_BATCH_BUFFER_END;
> +		__sync_synchronize();
> +		timeout = 1;
> +	}
> +	munmap(batch, 4096);
> +
> +	if (flags & WAIT) {
> +		struct pollfd pfd = { .fd = all, .events = POLLIN };
> +		igt_assert(poll(&pfd, 1, timeout*1000) == 1);
> +	} else {
> +		memset(&tv, 0, sizeof(tv));
> +		while (fence_busy(all))
> +			igt_assert(igt_seconds_elapsed(&tv) < timeout);
> +	}
> +
> +	igt_assert(!gem_bo_busy(fd, obj.handle));
> +	igt_assert_eq(sync_fence_status(all),
> +		      flags & HANG ? -EIO : SYNC_FENCE_OK);

Do you get -EIO also if only one engine hangs?

Thanks,
Antonio

> +
> +	close(all);
> +	gem_close(fd, obj.handle);
> +
> +	gem_quiescent_gpu(fd);
> +}
> +
>   static void test_fence_await(int fd, unsigned ring, unsigned flags)
>   {
>   	const int gen = intel_gen(intel_get_drm_devid(fd));
> @@ -1465,6 +1572,26 @@ igt_main
>   		gem_submission_print_method(i915);
>   	}
>   
> +	igt_subtest_group {
> +		igt_fixture {
> +			igt_fork_hang_detector(i915);
> +		}
> +
> +		igt_subtest("basic-busy-all")
> +			test_fence_busy_all(i915, 0);
> +		igt_subtest("basic-wait-all")
> +			test_fence_busy_all(i915, WAIT);
> +
> +		igt_fixture {
> +			igt_stop_hang_detector();
> +		}
> +
> +		igt_subtest("busy-hang-all")
> +			test_fence_busy_all(i915, HANG);
> +		igt_subtest("wait-hang-all")
> +			test_fence_busy_all(i915, WAIT | HANG);
> +	}
> +
>   	for (e = intel_execution_engines; e->name; e++) {
>   		igt_subtest_group {
>   			igt_fixture {
> 
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Re: [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences

[Chris Wilson]

Quoting Antonio Argenziano (2018-02-28 22:44:31)
> On 28/02/18 07:51, Chris Wilson wrote:
> > +     igt_assert(!gem_bo_busy(fd, obj.handle));
> > +     igt_assert_eq(sync_fence_status(all),
> > +                   flags & HANG ? -EIO : SYNC_FENCE_OK);
> 
> Do you get -EIO also if only one engine hangs?

Yes. If the hang occurs on the fence (single request/engine, or many
requests/engines merged sync_file) we expect to be notified with -EIO.
That part of the contract is checked in gem_eio and should be checked in
gem_reset_stats (pretty much all that test should be doing, injecting a
hang on each ring, observing fence states and reset-stats for itself and
concurrent contexts).
-Chris
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Re: [igt-dev] [PATCH igt 5/5] igt/gem_exec_fence: Exercise merging fences

[Chris Wilson]

Quoting Antonio Argenziano (2018-02-28 22:44:31)
> On 28/02/18 07:51, Chris Wilson wrote:
> > +     igt_assert(!gem_bo_busy(fd, obj.handle));
> > +     igt_assert_eq(sync_fence_status(all),
> > +                   flags & HANG ? -EIO : SYNC_FENCE_OK);
> 
> Do you get -EIO also if only one engine hangs?

Yes. If the hang occurs on the fence (single request/engine, or many
requests/engines merged sync_file) we expect to be notified with -EIO.
That part of the contract is checked in gem_eio and should be checked in
gem_reset_stats (pretty much all that test should be doing, injecting a
hang on each ring, observing fence states and reset-stats for itself and
concurrent contexts).
-Chris
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Re: [igt-dev] [PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[Abdiel Janulgue]

On 02/28/2018 05:51 PM, Chris Wilson wrote:
> __igt_spin_batch_new() may be used inside a background helper which is
> competing against the GPU being reset. As such, we cannot even assert
> that the spin->handle is busy immediately after submission as it may
> have already been reset by another client writing to i915_wedged.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>

> ---
>  lib/igt_dummyload.c | 17 ++++++++++++++---
>  tests/pm_rps.c      |  4 +++-
>  2 files changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
> index ddd43451..4b20f23d 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -25,6 +25,7 @@
>  #include <time.h>
>  #include <signal.h>
>  #include <pthread.h>
> +#include <sys/poll.h>
>  
>  #include <i915_drm.h>
>  
> @@ -207,7 +208,6 @@ ___igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep,
>  
>  	spin->out_fence = emit_recursive_batch(spin, fd, ctx, engine, dep,
>  					       out_fence);
> -	igt_assert(gem_bo_busy(fd, spin->handle));
>  
>  	pthread_mutex_lock(&list_lock);
>  	igt_list_add(&spin->link, &spin_list);
> @@ -240,9 +240,14 @@ __igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
>  igt_spin_t *
>  igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
>  {
> +	igt_spin_t *spin;
> +
>  	igt_require_gem(fd);
>  
> -	return __igt_spin_batch_new(fd, ctx, engine, dep);
> +	spin = __igt_spin_batch_new(fd, ctx, engine, dep);
> +	igt_assert(gem_bo_busy(fd, spin->handle));
> +
> +	return spin;
>  }
>  
>  igt_spin_t *
> @@ -269,10 +274,16 @@ __igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
>  igt_spin_t *
>  igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
>  {
> +	igt_spin_t *spin;
> +
>  	igt_require_gem(fd);
>  	igt_require(gem_has_exec_fence(fd));
>  
> -	return __igt_spin_batch_new_fence(fd, ctx, engine);
> +	spin = __igt_spin_batch_new_fence(fd, ctx, engine);
> +	igt_assert(gem_bo_busy(fd, spin->handle));
> +	igt_assert(poll(&(struct pollfd){spin->out_fence, POLLIN}, 1, 0) == 0);
> +
> +	return spin;
>  }
>  
>  static void notify(union sigval arg)
> diff --git a/tests/pm_rps.c b/tests/pm_rps.c
> index f71976ed..006d084b 100644
> --- a/tests/pm_rps.c
> +++ b/tests/pm_rps.c
> @@ -221,6 +221,8 @@ static void load_helper_run(enum load load)
>  		return;
>  	}
>  
> +	igt_require_gem(drm_fd);
> +
>  	lh.exit = false;
>  	lh.load = load;
>  
> @@ -233,7 +235,7 @@ static void load_helper_run(enum load load)
>  
>  		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
>  
> -		spin[0] = igt_spin_batch_new(drm_fd, 0, 0, 0);
> +		spin[0] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
>  		if (lh.load == HIGH)
>  			spin[1] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
>  		while (!lh.exit) {
> 
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Re: [igt-dev] [PATCH igt 1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor

[Abdiel Janulgue]

On 02/28/2018 05:51 PM, Chris Wilson wrote:
> __igt_spin_batch_new() may be used inside a background helper which is
> competing against the GPU being reset. As such, we cannot even assert
> that the spin->handle is busy immediately after submission as it may
> have already been reset by another client writing to i915_wedged.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>

> ---
>  lib/igt_dummyload.c | 17 ++++++++++++++---
>  tests/pm_rps.c      |  4 +++-
>  2 files changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
> index ddd43451..4b20f23d 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -25,6 +25,7 @@
>  #include <time.h>
>  #include <signal.h>
>  #include <pthread.h>
> +#include <sys/poll.h>
>  
>  #include <i915_drm.h>
>  
> @@ -207,7 +208,6 @@ ___igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep,
>  
>  	spin->out_fence = emit_recursive_batch(spin, fd, ctx, engine, dep,
>  					       out_fence);
> -	igt_assert(gem_bo_busy(fd, spin->handle));
>  
>  	pthread_mutex_lock(&list_lock);
>  	igt_list_add(&spin->link, &spin_list);
> @@ -240,9 +240,14 @@ __igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
>  igt_spin_t *
>  igt_spin_batch_new(int fd, uint32_t ctx, unsigned engine, uint32_t dep)
>  {
> +	igt_spin_t *spin;
> +
>  	igt_require_gem(fd);
>  
> -	return __igt_spin_batch_new(fd, ctx, engine, dep);
> +	spin = __igt_spin_batch_new(fd, ctx, engine, dep);
> +	igt_assert(gem_bo_busy(fd, spin->handle));
> +
> +	return spin;
>  }
>  
>  igt_spin_t *
> @@ -269,10 +274,16 @@ __igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
>  igt_spin_t *
>  igt_spin_batch_new_fence(int fd, uint32_t ctx, unsigned engine)
>  {
> +	igt_spin_t *spin;
> +
>  	igt_require_gem(fd);
>  	igt_require(gem_has_exec_fence(fd));
>  
> -	return __igt_spin_batch_new_fence(fd, ctx, engine);
> +	spin = __igt_spin_batch_new_fence(fd, ctx, engine);
> +	igt_assert(gem_bo_busy(fd, spin->handle));
> +	igt_assert(poll(&(struct pollfd){spin->out_fence, POLLIN}, 1, 0) == 0);
> +
> +	return spin;
>  }
>  
>  static void notify(union sigval arg)
> diff --git a/tests/pm_rps.c b/tests/pm_rps.c
> index f71976ed..006d084b 100644
> --- a/tests/pm_rps.c
> +++ b/tests/pm_rps.c
> @@ -221,6 +221,8 @@ static void load_helper_run(enum load load)
>  		return;
>  	}
>  
> +	igt_require_gem(drm_fd);
> +
>  	lh.exit = false;
>  	lh.load = load;
>  
> @@ -233,7 +235,7 @@ static void load_helper_run(enum load load)
>  
>  		igt_debug("Applying %s load...\n", lh.load ? "high" : "low");
>  
> -		spin[0] = igt_spin_batch_new(drm_fd, 0, 0, 0);
> +		spin[0] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
>  		if (lh.load == HIGH)
>  			spin[1] = __igt_spin_batch_new(drm_fd, 0, 0, 0);
>  		while (!lh.exit) {
> 
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[PATCH igt v2] igt/gem_ctx_switch: Exercise all engines at once

[Chris Wilson]

Just a small variant to apply a continuous context-switch load to all
engines.

v2: Adapt to for_each_physical_engine() and sane gem_context_create()

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/gem_ctx_switch.c | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index 79b1d74b..b8c97c72 100644
--- a/tests/gem_ctx_switch.c
+++ b/tests/gem_ctx_switch.c
@@ -133,6 +133,80 @@ static void single(int fd, uint32_t handle,
 		gem_context_destroy(fd, contexts[n]);
 }
 
+static void all(int fd, uint32_t handle, unsigned flags, int timeout)
+{
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	unsigned int engine[16], e;
+	const char *name[16];
+	uint32_t contexts[65];
+	unsigned int nengine;
+	int n;
+
+	nengine = 0;
+	for_each_physical_engine(fd, e) {
+		engine[nengine] = e;
+		name[nengine] = e__->name;
+		nengine++;
+	}
+	igt_require(nengine);
+
+	for (n = 0; n < ARRAY_SIZE(contexts); n++)
+		contexts[n] = gem_context_create(fd);
+
+	memset(obj, 0, sizeof(obj));
+	obj[1].handle = handle;
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj + 1);
+	execbuf.buffer_count = 1;
+	execbuf.rsvd1 = contexts[0];
+	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
+	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
+	igt_require(__gem_execbuf(fd, &execbuf) == 0);
+	gem_sync(fd, handle);
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = 2;
+
+	for (int pot = 2; pot <= 64; pot *= 2) {
+		for (int nctx = pot - 1; nctx <= pot + 1; nctx++) {
+			igt_fork(child, nengine) {
+				struct timespec start, now;
+				unsigned int count = 0;
+
+				obj[0].handle = gem_create(fd, 4096);
+				execbuf.flags |= engine[child];
+				for (int loop = 0; loop < ARRAY_SIZE(contexts); loop++) {
+					execbuf.rsvd1 = contexts[loop];
+					gem_execbuf(fd, &execbuf);
+				}
+				gem_sync(fd, obj[0].handle);
+
+				clock_gettime(CLOCK_MONOTONIC, &start);
+				do {
+					for (int loop = 0; loop < 1024; loop++) {
+						execbuf.rsvd1 = contexts[loop % nctx];
+						gem_execbuf(fd, &execbuf);
+					}
+					count += 1024;
+					clock_gettime(CLOCK_MONOTONIC, &now);
+				} while (elapsed(&start, &now) < timeout);
+				gem_sync(fd, obj[0].handle);
+				clock_gettime(CLOCK_MONOTONIC, &now);
+				gem_close(fd, obj[0].handle);
+
+				igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
+					 nctx, child, name[child], count, elapsed(&start, &now)*1e6 / count,
+					 flags & INTERRUPTIBLE ? " (interruptible)" : "");
+			}
+			igt_waitchildren();
+		}
+	}
+
+	for (n = 0; n < ARRAY_SIZE(contexts); n++)
+		gem_context_destroy(fd, contexts[n]);
+}
+
 igt_main
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -175,6 +249,11 @@ igt_main
 			single(fd, light, e, INTERRUPTIBLE, ncpus, 150);
 	}
 
+	igt_subtest("basic-all")
+		all(fd, light, 0, 5);
+	igt_subtest("basic-all-heavy")
+		all(fd, heavy, 0, 20);
+
 	igt_fixture {
 		igt_stop_hang_detector();
 		gem_close(fd, heavy);
-- 
2.16.2

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[Intel-gfx] [PATCH igt v2] igt/gem_ctx_switch: Exercise all engines at once

[Chris Wilson]

Just a small variant to apply a continuous context-switch load to all
engines.

v2: Adapt to for_each_physical_engine() and sane gem_context_create()

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/gem_ctx_switch.c | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)

diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index 79b1d74b..b8c97c72 100644
--- a/tests/gem_ctx_switch.c
+++ b/tests/gem_ctx_switch.c
@@ -133,6 +133,80 @@ static void single(int fd, uint32_t handle,
 		gem_context_destroy(fd, contexts[n]);
 }
 
+static void all(int fd, uint32_t handle, unsigned flags, int timeout)
+{
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	unsigned int engine[16], e;
+	const char *name[16];
+	uint32_t contexts[65];
+	unsigned int nengine;
+	int n;
+
+	nengine = 0;
+	for_each_physical_engine(fd, e) {
+		engine[nengine] = e;
+		name[nengine] = e__->name;
+		nengine++;
+	}
+	igt_require(nengine);
+
+	for (n = 0; n < ARRAY_SIZE(contexts); n++)
+		contexts[n] = gem_context_create(fd);
+
+	memset(obj, 0, sizeof(obj));
+	obj[1].handle = handle;
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj + 1);
+	execbuf.buffer_count = 1;
+	execbuf.rsvd1 = contexts[0];
+	execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
+	execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
+	igt_require(__gem_execbuf(fd, &execbuf) == 0);
+	gem_sync(fd, handle);
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = 2;
+
+	for (int pot = 2; pot <= 64; pot *= 2) {
+		for (int nctx = pot - 1; nctx <= pot + 1; nctx++) {
+			igt_fork(child, nengine) {
+				struct timespec start, now;
+				unsigned int count = 0;
+
+				obj[0].handle = gem_create(fd, 4096);
+				execbuf.flags |= engine[child];
+				for (int loop = 0; loop < ARRAY_SIZE(contexts); loop++) {
+					execbuf.rsvd1 = contexts[loop];
+					gem_execbuf(fd, &execbuf);
+				}
+				gem_sync(fd, obj[0].handle);
+
+				clock_gettime(CLOCK_MONOTONIC, &start);
+				do {
+					for (int loop = 0; loop < 1024; loop++) {
+						execbuf.rsvd1 = contexts[loop % nctx];
+						gem_execbuf(fd, &execbuf);
+					}
+					count += 1024;
+					clock_gettime(CLOCK_MONOTONIC, &now);
+				} while (elapsed(&start, &now) < timeout);
+				gem_sync(fd, obj[0].handle);
+				clock_gettime(CLOCK_MONOTONIC, &now);
+				gem_close(fd, obj[0].handle);
+
+				igt_info("[%d:%d] %s: %'u cycles: %.3fus%s\n",
+					 nctx, child, name[child], count, elapsed(&start, &now)*1e6 / count,
+					 flags & INTERRUPTIBLE ? " (interruptible)" : "");
+			}
+			igt_waitchildren();
+		}
+	}
+
+	for (n = 0; n < ARRAY_SIZE(contexts); n++)
+		gem_context_destroy(fd, contexts[n]);
+}
+
 igt_main
 {
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
@@ -175,6 +249,11 @@ igt_main
 			single(fd, light, e, INTERRUPTIBLE, ncpus, 150);
 	}
 
+	igt_subtest("basic-all")
+		all(fd, light, 0, 5);
+	igt_subtest("basic-all-heavy")
+		all(fd, heavy, 0, 20);
+
 	igt_fixture {
 		igt_stop_hang_detector();
 		gem_close(fd, heavy);
-- 
2.16.2

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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor (rev2)
URL   : https://patchwork.freedesktop.org/series/39134/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
5aed726a723d0abd42e36a26dd6349739fefd568 lib/dummyload: Avoid assertions in lowlevel spin constructor

with latest DRM-Tip kernel build CI_DRM_3854
f12b759446c4 drm-tip: 2018y-03m-01d-07h-28m-47s UTC integration manifest

Testlist changes:
+igt@gem_ctx_switch@basic-all
+igt@gem_ctx_switch@basic-all-heavy
+igt@gem_exec_capture@userptr
+igt@gem_exec_fence@basic-busy-all
+igt@gem_exec_fence@basic-wait-all
+igt@gem_exec_fence@busy-hang-all
+igt@gem_exec_fence@wait-hang-all
+igt@gem_spin_batch@basic-default

---- Known issues:

Test kms_busy:
        Subgroup basic-flip-b:
                fail       -> PASS       (fi-elk-e7500) fdo#103989

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:416s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:429s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:376s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:491s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:285s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:478s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:487s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:473s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:462s
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:393s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:555s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:421s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:285s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:509s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:388s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:412s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:454s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:409s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:451s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:486s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:495s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:588s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:423s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:504s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:519s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:487s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:479s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:405s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:522s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:395s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1031/issues.html
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[igt-dev] ✗ Fi.CI.IGT: warning for series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/5] lib/dummyload: Avoid assertions in lowlevel spin constructor (rev2)
URL   : https://patchwork.freedesktop.org/series/39134/
State : warning

== Summary ==

---- Possible new issues:

Test drv_suspend:
        Subgroup fence-restore-untiled:
                pass       -> SKIP       (shard-snb)
Test kms_chv_cursor_fail:
        Subgroup pipe-b-128x128-left-edge:
                pass       -> DMESG-WARN (shard-snb)

---- Known issues:

Test gem_eio:
        Subgroup in-flight:
                incomplete -> PASS       (shard-apl) fdo#104945
Test gem_partial_pwrite_pread:
        Subgroup write-snoop:
                incomplete -> PASS       (shard-hsw) fdo#103540
Test gem_softpin:
        Subgroup noreloc-s3:
                pass       -> SKIP       (shard-snb) fdo#103375
Test kms_chv_cursor_fail:
        Subgroup pipe-b-64x64-right-edge:
                dmesg-warn -> PASS       (shard-snb) fdo#105185
Test kms_flip:
        Subgroup blocking-wf_vblank:
                pass       -> FAIL       (shard-hsw) fdo#103928
        Subgroup flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
Test kms_flip_tiling:
        Subgroup flip-to-x-tiled:
                pass       -> FAIL       (shard-apl) fdo#103822
Test kms_rotation_crc:
        Subgroup sprite-rotation-180:
                pass       -> FAIL       (shard-snb) fdo#103925
Test perf:
        Subgroup buffer-fill:
                pass       -> FAIL       (shard-apl) fdo#103755
        Subgroup enable-disable:
                fail       -> PASS       (shard-apl) fdo#103715
        Subgroup oa-exponents:
                pass       -> INCOMPLETE (shard-apl) fdo#102254

fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#103928 https://bugs.freedesktop.org/show_bug.cgi?id=103928
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#103755 https://bugs.freedesktop.org/show_bug.cgi?id=103755
fdo#103715 https://bugs.freedesktop.org/show_bug.cgi?id=103715
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254

shard-apl        total:3308 pass:1732 dwarn:1   dfail:0   fail:9   skip:1563 time:11371s
shard-hsw        total:3392 pass:1729 dwarn:1   dfail:0   fail:2   skip:1658 time:11267s
shard-snb        total:3392 pass:1330 dwarn:2   dfail:0   fail:2   skip:2057 time:6404s
Blacklisted hosts:
shard-kbl        total:3392 pass:1902 dwarn:1   dfail:0   fail:8   skip:1480 time:9100s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1031/shards.html
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Re: [PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr

[Michał Winiarski]

On Wed, Feb 28, 2018 at 03:51:37PM +0000, Chris Wilson wrote:
> EXEC_OBJECT_CAPTURE extends the type of buffers we may read during error
> capture. Previously we knew that we would only see batch buffers (which
> limited the objects to being from gem_create()), but now we need to
> check that any buffer the user can create can be read. The first
> alternate buffer type is a userptr.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>

-Michał

> ---
>  tests/gem_exec_capture.c | 35 ++++++++++++++++++++++++++++++++---
>  1 file changed, 32 insertions(+), 3 deletions(-)
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Re: [igt-dev] [Intel-gfx] [PATCH igt 4/5] igt/gem_exec_capture: Exercise readback of userptr

[Michał Winiarski]

On Wed, Feb 28, 2018 at 03:51:37PM +0000, Chris Wilson wrote:
> EXEC_OBJECT_CAPTURE extends the type of buffers we may read during error
> capture. Previously we knew that we would only see batch buffers (which
> limited the objects to being from gem_create()), but now we need to
> check that any buffer the user can create can be read. The first
> alternate buffer type is a userptr.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>

-Michał

> ---
>  tests/gem_exec_capture.c | 35 ++++++++++++++++++++++++++++++++---
>  1 file changed, 32 insertions(+), 3 deletions(-)
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Re: [PATCH igt v2] igt/gem_ctx_switch: Exercise all engines at once

[Antonio Argenziano]

On 28/02/18 23:51, Chris Wilson wrote:
> Just a small variant to apply a continuous context-switch load to all
> engines.
> 
> v2: Adapt to for_each_physical_engine() and sane gem_context_create()
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>

LGTM.

Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Re: [igt-dev] [PATCH igt v2] igt/gem_ctx_switch: Exercise all engines at once

[Antonio Argenziano]

On 28/02/18 23:51, Chris Wilson wrote:
> Just a small variant to apply a continuous context-switch load to all
> engines.
> 
> v2: Adapt to for_each_physical_engine() and sane gem_context_create()
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>

LGTM.

Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Re: [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently

[Chris Wilson]

Quoting Chris Wilson (2018-02-28 15:51:35)
> If we do a global wait while trying to execute spinners in parallel,
> it ends badly with a GPU hang.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Pretty please?
-Chris

> ---
>  tests/gem_spin_batch.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/tests/gem_spin_batch.c b/tests/gem_spin_batch.c
> index 026f9830..cffeb6d7 100644
> --- a/tests/gem_spin_batch.c
> +++ b/tests/gem_spin_batch.c
> @@ -41,7 +41,7 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
>         struct timespec itv = { };
>         uint64_t elapsed;
>  
> -       spin = igt_spin_batch_new(fd, 0, engine, 0);
> +       spin = __igt_spin_batch_new(fd, 0, engine, 0);
>         while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) {
>                 igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0);
>  
> @@ -64,7 +64,6 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
>                  loops, (long long)elapsed, (long)(elapsed / timeout_100ms));
>  
>         assert_within_epsilon(timeout_100ms * loops, elapsed, MAX_ERROR);
> -       igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
>  }
>  
>  static void spin_exit_handler(int sig)
> @@ -101,15 +100,18 @@ igt_main
>         }
>  
>         for (e = intel_execution_engines; e->name; e++) {
> -               if (e->exec_id == 0)
> -                       continue;
> -
> -               igt_subtest_f("basic-%s", e->name)
> +               igt_subtest_f("basic-%s", e->name) {
> +                       intel_detect_and_clear_missed_interrupts(fd);
>                         spin(fd, e->exec_id, 3);
> +                       igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
> +               }
>         }
>  
> -       igt_subtest("spin-each")
> +       igt_subtest("spin-each") {
> +               intel_detect_and_clear_missed_interrupts(fd);
>                 spin_on_all_engines(fd, 3);
> +               igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
> +       }
>  
>         igt_fixture {
>                 igt_stop_hang_detector();
> -- 
> 2.16.2
> 
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Re: [Intel-gfx] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently

[Chris Wilson]

Quoting Chris Wilson (2018-02-28 15:51:35)
> If we do a global wait while trying to execute spinners in parallel,
> it ends badly with a GPU hang.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Pretty please?
-Chris

> ---
>  tests/gem_spin_batch.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/tests/gem_spin_batch.c b/tests/gem_spin_batch.c
> index 026f9830..cffeb6d7 100644
> --- a/tests/gem_spin_batch.c
> +++ b/tests/gem_spin_batch.c
> @@ -41,7 +41,7 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
>         struct timespec itv = { };
>         uint64_t elapsed;
>  
> -       spin = igt_spin_batch_new(fd, 0, engine, 0);
> +       spin = __igt_spin_batch_new(fd, 0, engine, 0);
>         while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) {
>                 igt_spin_t *next = __igt_spin_batch_new(fd, 0, engine, 0);
>  
> @@ -64,7 +64,6 @@ static void spin(int fd, unsigned int engine, unsigned int timeout_sec)
>                  loops, (long long)elapsed, (long)(elapsed / timeout_100ms));
>  
>         assert_within_epsilon(timeout_100ms * loops, elapsed, MAX_ERROR);
> -       igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
>  }
>  
>  static void spin_exit_handler(int sig)
> @@ -101,15 +100,18 @@ igt_main
>         }
>  
>         for (e = intel_execution_engines; e->name; e++) {
> -               if (e->exec_id == 0)
> -                       continue;
> -
> -               igt_subtest_f("basic-%s", e->name)
> +               igt_subtest_f("basic-%s", e->name) {
> +                       intel_detect_and_clear_missed_interrupts(fd);
>                         spin(fd, e->exec_id, 3);
> +                       igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
> +               }
>         }
>  
> -       igt_subtest("spin-each")
> +       igt_subtest("spin-each") {
> +               intel_detect_and_clear_missed_interrupts(fd);
>                 spin_on_all_engines(fd, 3);
> +               igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
> +       }
>  
>         igt_fixture {
>                 igt_stop_hang_detector();
> -- 
> 2.16.2
> 
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Re: [igt-dev] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently

[Michał Winiarski]

On Wed, Feb 28, 2018 at 03:51:35PM +0000, Chris Wilson wrote:
> If we do a global wait while trying to execute spinners in parallel,
> it ends badly with a GPU hang.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>

-Michał

> ---
>  tests/gem_spin_batch.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
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Re: [Intel-gfx] [igt-dev] [PATCH igt 2/5] igt/gem_spin_batch: Avoid waiting when running concurrently

[Michał Winiarski]

On Wed, Feb 28, 2018 at 03:51:35PM +0000, Chris Wilson wrote:
> If we do a global wait while trying to execute spinners in parallel,
> it ends badly with a GPU hang.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104352
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>

-Michał

> ---
>  tests/gem_spin_batch.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
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