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* [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-16 14:19 ` Marek Vasut
  0 siblings, 0 replies; 20+ messages in thread
From: Marek Vasut @ 2024-04-16 14:19 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

Configure both CSI2 assigned-clock-rates the same way.
There does not seem to be any reason for keeping the
two CSI2 pixel clock set to different frequencies.

This also reduces first CSI2 clock from overdrive mode
frequency which is 500 MHz down below the regular mode
frequency of 400 MHz.

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Paul Elder <paul.elder@ideasonboard.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
---
V2: Align both clock to 266 MHz and update commit message
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 1bb96e96639f2..7883f5c056f4e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
 						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
 				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
 							 <&clk IMX8MP_CLK_24M>;
-				assigned-clock-rates = <500000000>;
+				assigned-clock-rates = <266000000>;
 				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
 				status = "disabled";
 
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 20+ messages in thread
* [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-16 14:19 ` Marek Vasut
  0 siblings, 0 replies; 20+ messages in thread
From: Marek Vasut @ 2024-04-16 14:19 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

Configure both CSI2 assigned-clock-rates the same way.
There does not seem to be any reason for keeping the
two CSI2 pixel clock set to different frequencies.

This also reduces first CSI2 clock from overdrive mode
frequency which is 500 MHz down below the regular mode
frequency of 400 MHz.

Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Paul Elder <paul.elder@ideasonboard.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
---
V2: Align both clock to 266 MHz and update commit message
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 1bb96e96639f2..7883f5c056f4e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
 						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
 				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
 							 <&clk IMX8MP_CLK_24M>;
-				assigned-clock-rates = <500000000>;
+				assigned-clock-rates = <266000000>;
 				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
 				status = "disabled";
 
-- 
2.43.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 20+ messages in thread
* RE: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-04-16 14:19 ` Marek Vasut
@ 2024-04-16 15:01   ` Peng Fan
  -1 siblings, 0 replies; 20+ messages in thread
From: Peng Fan @ 2024-04-16 15:01 UTC (permalink / raw)
  To: Marek Vasut, linux-arm-kernel
  Cc: Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx, G.N. Zhou

> Subject: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
> 
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the two CSI2 pixel clock set
> to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode frequency which is 500
> MHz down below the regular mode frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Paul Elder <paul.elder@ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org

Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>  						  <&clk
> IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk
> IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk
> IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl
> IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
> 
> --
> 2.43.0
> 


^ permalink raw reply	[flat|nested] 20+ messages in thread
* RE: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-16 15:01   ` Peng Fan
  0 siblings, 0 replies; 20+ messages in thread
From: Peng Fan @ 2024-04-16 15:01 UTC (permalink / raw)
  To: Marek Vasut, linux-arm-kernel
  Cc: Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx, G.N. Zhou

> Subject: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
> 
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the two CSI2 pixel clock set
> to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode frequency which is 500
> MHz down below the regular mode frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Paul Elder <paul.elder@ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org

Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>  						  <&clk
> IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk
> IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk
> IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl
> IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
> 
> --
> 2.43.0
> 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-04-16 14:19 ` Marek Vasut
@ 2024-04-17  9:12   ` Alexander Stein
  -1 siblings, 0 replies; 20+ messages in thread
From: Alexander Stein @ 2024-04-17  9:12 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
	Marek Vasut

Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the
> two CSI2 pixel clock set to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode
> frequency which is 500 MHz down below the regular mode
> frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Apparently there is no difference when using imx415 (3840x2160) sensor.
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>

> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Paul Elder <paul.elder@ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
>  
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-17  9:12   ` Alexander Stein
  0 siblings, 0 replies; 20+ messages in thread
From: Alexander Stein @ 2024-04-17  9:12 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
	Marek Vasut

Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the
> two CSI2 pixel clock set to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode
> frequency which is 500 MHz down below the regular mode
> frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Apparently there is no difference when using imx415 (3840x2160) sensor.
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>

> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Paul Elder <paul.elder@ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
>  
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-04-16 14:19 ` Marek Vasut
@ 2024-04-17 10:14   ` Ahmad Fatoum
  -1 siblings, 0 replies; 20+ messages in thread
From: Ahmad Fatoum @ 2024-04-17 10:14 UTC (permalink / raw)
  To: Marek Vasut, linux-arm-kernel
  Cc: Rob Herring, Conor Dooley, Pengutronix Kernel Team, devicetree,
	Shawn Guo, Sascha Hauer, Paul Elder, imx, Laurent Pinchart,
	Krzysztof Kozlowski, Fabio Estevam

On 16.04.24 16:19, Marek Vasut wrote:
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the
> two CSI2 pixel clock set to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode
> frequency which is 500 MHz down below the regular mode
> frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Paul Elder <paul.elder@ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
>  

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-17 10:14   ` Ahmad Fatoum
  0 siblings, 0 replies; 20+ messages in thread
From: Ahmad Fatoum @ 2024-04-17 10:14 UTC (permalink / raw)
  To: Marek Vasut, linux-arm-kernel
  Cc: Rob Herring, Conor Dooley, Pengutronix Kernel Team, devicetree,
	Shawn Guo, Sascha Hauer, Paul Elder, imx, Laurent Pinchart,
	Krzysztof Kozlowski, Fabio Estevam

On 16.04.24 16:19, Marek Vasut wrote:
> Configure both CSI2 assigned-clock-rates the same way.
> There does not seem to be any reason for keeping the
> two CSI2 pixel clock set to different frequencies.
> 
> This also reduces first CSI2 clock from overdrive mode
> frequency which is 500 MHz down below the regular mode
> frequency of 400 MHz.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>

Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

> ---
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: Paul Elder <paul.elder@ideasonboard.com>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: linux-arm-kernel@lists.infradead.org
> ---
> V2: Align both clock to 266 MHz and update commit message
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 1bb96e96639f2..7883f5c056f4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>  							 <&clk IMX8MP_CLK_24M>;
> -				assigned-clock-rates = <500000000>;
> +				assigned-clock-rates = <266000000>;
>  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>  				status = "disabled";
>  

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-04-17 10:14   ` Ahmad Fatoum
@ 2024-04-17 10:17     ` Ahmad Fatoum
  -1 siblings, 0 replies; 20+ messages in thread
From: Ahmad Fatoum @ 2024-04-17 10:17 UTC (permalink / raw)
  To: Marek Vasut, linux-arm-kernel
  Cc: Rob Herring, Conor Dooley, Krzysztof Kozlowski, devicetree,
	Fabio Estevam, Sascha Hauer, Paul Elder, imx, Laurent Pinchart,
	Pengutronix Kernel Team, Shawn Guo

On 17.04.24 12:14, Ahmad Fatoum wrote:
> On 16.04.24 16:19, Marek Vasut wrote:
>> Configure both CSI2 assigned-clock-rates the same way.
>> There does not seem to be any reason for keeping the
>> two CSI2 pixel clock set to different frequencies.
>>
>> This also reduces first CSI2 clock from overdrive mode
>> frequency which is 500 MHz down below the regular mode
>> frequency of 400 MHz.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
> 
> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

I see now that the node has a clock-frequency = <500000000>; still.
This should be lowered too, shouldn't it?

Cheers,
Ahmad

> 
>> ---
>> Cc: Conor Dooley <conor+dt@kernel.org>
>> Cc: Fabio Estevam <festevam@gmail.com>
>> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
>> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>> Cc: Paul Elder <paul.elder@ideasonboard.com>
>> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
>> Cc: Rob Herring <robh@kernel.org>
>> Cc: Sascha Hauer <s.hauer@pengutronix.de>
>> Cc: Shawn Guo <shawnguo@kernel.org>
>> Cc: devicetree@vger.kernel.org
>> Cc: imx@lists.linux.dev
>> Cc: linux-arm-kernel@lists.infradead.org
>> ---
>> V2: Align both clock to 266 MHz and update commit message
>> ---
>>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> index 1bb96e96639f2..7883f5c056f4e 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>>  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>>  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>>  							 <&clk IMX8MP_CLK_24M>;
>> -				assigned-clock-rates = <500000000>;
>> +				assigned-clock-rates = <266000000>;
>>  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>>  				status = "disabled";
>>  
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-17 10:17     ` Ahmad Fatoum
  0 siblings, 0 replies; 20+ messages in thread
From: Ahmad Fatoum @ 2024-04-17 10:17 UTC (permalink / raw)
  To: Marek Vasut, linux-arm-kernel
  Cc: Rob Herring, Conor Dooley, Krzysztof Kozlowski, devicetree,
	Fabio Estevam, Sascha Hauer, Paul Elder, imx, Laurent Pinchart,
	Pengutronix Kernel Team, Shawn Guo

On 17.04.24 12:14, Ahmad Fatoum wrote:
> On 16.04.24 16:19, Marek Vasut wrote:
>> Configure both CSI2 assigned-clock-rates the same way.
>> There does not seem to be any reason for keeping the
>> two CSI2 pixel clock set to different frequencies.
>>
>> This also reduces first CSI2 clock from overdrive mode
>> frequency which is 500 MHz down below the regular mode
>> frequency of 400 MHz.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
> 
> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

I see now that the node has a clock-frequency = <500000000>; still.
This should be lowered too, shouldn't it?

Cheers,
Ahmad

> 
>> ---
>> Cc: Conor Dooley <conor+dt@kernel.org>
>> Cc: Fabio Estevam <festevam@gmail.com>
>> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
>> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>> Cc: Paul Elder <paul.elder@ideasonboard.com>
>> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
>> Cc: Rob Herring <robh@kernel.org>
>> Cc: Sascha Hauer <s.hauer@pengutronix.de>
>> Cc: Shawn Guo <shawnguo@kernel.org>
>> Cc: devicetree@vger.kernel.org
>> Cc: imx@lists.linux.dev
>> Cc: linux-arm-kernel@lists.infradead.org
>> ---
>> V2: Align both clock to 266 MHz and update commit message
>> ---
>>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> index 1bb96e96639f2..7883f5c056f4e 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
>> @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
>>  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
>>  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
>>  							 <&clk IMX8MP_CLK_24M>;
>> -				assigned-clock-rates = <500000000>;
>> +				assigned-clock-rates = <266000000>;
>>  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
>>  				status = "disabled";
>>  
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-04-17 10:17     ` Ahmad Fatoum
@ 2024-04-17 11:06       ` Marek Vasut
  -1 siblings, 0 replies; 20+ messages in thread
From: Marek Vasut @ 2024-04-17 11:06 UTC (permalink / raw)
  To: Ahmad Fatoum, linux-arm-kernel
  Cc: Rob Herring, Conor Dooley, Krzysztof Kozlowski, devicetree,
	Fabio Estevam, Sascha Hauer, Paul Elder, imx, Laurent Pinchart,
	Pengutronix Kernel Team, Shawn Guo

On 4/17/24 12:17 PM, Ahmad Fatoum wrote:
> On 17.04.24 12:14, Ahmad Fatoum wrote:
>> On 16.04.24 16:19, Marek Vasut wrote:
>>> Configure both CSI2 assigned-clock-rates the same way.
>>> There does not seem to be any reason for keeping the
>>> two CSI2 pixel clock set to different frequencies.
>>>
>>> This also reduces first CSI2 clock from overdrive mode
>>> frequency which is 500 MHz down below the regular mode
>>> frequency of 400 MHz.
>>>
>>> Signed-off-by: Marek Vasut <marex@denx.de>
>>
>> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> 
> I see now that the node has a clock-frequency = <500000000>; still.
> This should be lowered too, shouldn't it?

Oh, right, good catch.

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-04-17 11:06       ` Marek Vasut
  0 siblings, 0 replies; 20+ messages in thread
From: Marek Vasut @ 2024-04-17 11:06 UTC (permalink / raw)
  To: Ahmad Fatoum, linux-arm-kernel
  Cc: Rob Herring, Conor Dooley, Krzysztof Kozlowski, devicetree,
	Fabio Estevam, Sascha Hauer, Paul Elder, imx, Laurent Pinchart,
	Pengutronix Kernel Team, Shawn Guo

On 4/17/24 12:17 PM, Ahmad Fatoum wrote:
> On 17.04.24 12:14, Ahmad Fatoum wrote:
>> On 16.04.24 16:19, Marek Vasut wrote:
>>> Configure both CSI2 assigned-clock-rates the same way.
>>> There does not seem to be any reason for keeping the
>>> two CSI2 pixel clock set to different frequencies.
>>>
>>> This also reduces first CSI2 clock from overdrive mode
>>> frequency which is 500 MHz down below the regular mode
>>> frequency of 400 MHz.
>>>
>>> Signed-off-by: Marek Vasut <marex@denx.de>
>>
>> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> 
> I see now that the node has a clock-frequency = <500000000>; still.
> This should be lowered too, shouldn't it?

Oh, right, good catch.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-04-17  9:12   ` Alexander Stein
@ 2024-05-03 12:58     ` Alexander Stein
  -1 siblings, 0 replies; 20+ messages in thread
From: Alexander Stein @ 2024-05-03 12:58 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
	Marek Vasut

Hi,

Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > Configure both CSI2 assigned-clock-rates the same way.
> > There does not seem to be any reason for keeping the
> > two CSI2 pixel clock set to different frequencies.
> > 
> > This also reduces first CSI2 clock from overdrive mode
> > frequency which is 500 MHz down below the regular mode
> > frequency of 400 MHz.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> 
> Apparently there is no difference when using imx415 (3840x2160) sensor.

Just for the records: While this change does not affect imx415 (3840x2160)
processing, reducing clock-frequency as well (v3) imx415 does not work.
So I assume that for this image size a higher than default frequency is
required.

Best regards,
Alexander

> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> 
> > ---
> > Cc: Conor Dooley <conor+dt@kernel.org>
> > Cc: Fabio Estevam <festevam@gmail.com>
> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > Cc: Rob Herring <robh@kernel.org>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Shawn Guo <shawnguo@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: imx@lists.linux.dev
> > Cc: linux-arm-kernel@lists.infradead.org
> > ---
> > V2: Align both clock to 266 MHz and update commit message
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 1bb96e96639f2..7883f5c056f4e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> >  							 <&clk IMX8MP_CLK_24M>;
> > -				assigned-clock-rates = <500000000>;
> > +				assigned-clock-rates = <266000000>;
> >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> >  				status = "disabled";
> >  
> > 
> 
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-05-03 12:58     ` Alexander Stein
  0 siblings, 0 replies; 20+ messages in thread
From: Alexander Stein @ 2024-05-03 12:58 UTC (permalink / raw)
  To: linux-arm-kernel
  Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Krzysztof Kozlowski,
	Laurent Pinchart, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx,
	Marek Vasut

Hi,

Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > Configure both CSI2 assigned-clock-rates the same way.
> > There does not seem to be any reason for keeping the
> > two CSI2 pixel clock set to different frequencies.
> > 
> > This also reduces first CSI2 clock from overdrive mode
> > frequency which is 500 MHz down below the regular mode
> > frequency of 400 MHz.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> 
> Apparently there is no difference when using imx415 (3840x2160) sensor.

Just for the records: While this change does not affect imx415 (3840x2160)
processing, reducing clock-frequency as well (v3) imx415 does not work.
So I assume that for this image size a higher than default frequency is
required.

Best regards,
Alexander

> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> 
> > ---
> > Cc: Conor Dooley <conor+dt@kernel.org>
> > Cc: Fabio Estevam <festevam@gmail.com>
> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > Cc: Rob Herring <robh@kernel.org>
> > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > Cc: Shawn Guo <shawnguo@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: imx@lists.linux.dev
> > Cc: linux-arm-kernel@lists.infradead.org
> > ---
> > V2: Align both clock to 266 MHz and update commit message
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 1bb96e96639f2..7883f5c056f4e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> >  							 <&clk IMX8MP_CLK_24M>;
> > -				assigned-clock-rates = <500000000>;
> > +				assigned-clock-rates = <266000000>;
> >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> >  				status = "disabled";
> >  
> > 
> 
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-05-03 12:58     ` Alexander Stein
@ 2024-05-03 13:45       ` Laurent Pinchart
  -1 siblings, 0 replies; 20+ messages in thread
From: Laurent Pinchart @ 2024-05-03 13:45 UTC (permalink / raw)
  To: Alexander Stein
  Cc: linux-arm-kernel, Marek Vasut, Conor Dooley, Fabio Estevam,
	Krzysztof Kozlowski, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > Configure both CSI2 assigned-clock-rates the same way.
> > > There does not seem to be any reason for keeping the
> > > two CSI2 pixel clock set to different frequencies.
> > > 
> > > This also reduces first CSI2 clock from overdrive mode
> > > frequency which is 500 MHz down below the regular mode
> > > frequency of 400 MHz.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > 
> > Apparently there is no difference when using imx415 (3840x2160) sensor.
> 
> Just for the records: While this change does not affect imx415 (3840x2160)
> processing, reducing clock-frequency as well (v3) imx415 does not work.
> So I assume that for this image size a higher than default frequency is
> required.

For the time being I expect sensor overlays to override the default
clock setup. Ideally the clock frequencies should be configured
automatically at runtime by the CSI-2 RX driver.

> > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > 
> > > ---
> > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > Cc: Fabio Estevam <festevam@gmail.com>
> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > Cc: Rob Herring <robh@kernel.org>
> > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: imx@lists.linux.dev
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > ---
> > > V2: Align both clock to 266 MHz and update commit message
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > >  							 <&clk IMX8MP_CLK_24M>;
> > > -				assigned-clock-rates = <500000000>;
> > > +				assigned-clock-rates = <266000000>;
> > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > >  				status = "disabled";
> > >  
> > > 

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-05-03 13:45       ` Laurent Pinchart
  0 siblings, 0 replies; 20+ messages in thread
From: Laurent Pinchart @ 2024-05-03 13:45 UTC (permalink / raw)
  To: Alexander Stein
  Cc: linux-arm-kernel, Marek Vasut, Conor Dooley, Fabio Estevam,
	Krzysztof Kozlowski, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > Configure both CSI2 assigned-clock-rates the same way.
> > > There does not seem to be any reason for keeping the
> > > two CSI2 pixel clock set to different frequencies.
> > > 
> > > This also reduces first CSI2 clock from overdrive mode
> > > frequency which is 500 MHz down below the regular mode
> > > frequency of 400 MHz.
> > > 
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > 
> > Apparently there is no difference when using imx415 (3840x2160) sensor.
> 
> Just for the records: While this change does not affect imx415 (3840x2160)
> processing, reducing clock-frequency as well (v3) imx415 does not work.
> So I assume that for this image size a higher than default frequency is
> required.

For the time being I expect sensor overlays to override the default
clock setup. Ideally the clock frequencies should be configured
automatically at runtime by the CSI-2 RX driver.

> > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > 
> > > ---
> > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > Cc: Fabio Estevam <festevam@gmail.com>
> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > Cc: Rob Herring <robh@kernel.org>
> > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > Cc: devicetree@vger.kernel.org
> > > Cc: imx@lists.linux.dev
> > > Cc: linux-arm-kernel@lists.infradead.org
> > > ---
> > > V2: Align both clock to 266 MHz and update commit message
> > > ---
> > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > >  							 <&clk IMX8MP_CLK_24M>;
> > > -				assigned-clock-rates = <500000000>;
> > > +				assigned-clock-rates = <266000000>;
> > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > >  				status = "disabled";
> > >  
> > > 

-- 
Regards,

Laurent Pinchart

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-05-03 13:45       ` Laurent Pinchart
@ 2024-05-06  6:19         ` Alexander Stein
  -1 siblings, 0 replies; 20+ messages in thread
From: Alexander Stein @ 2024-05-06  6:19 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: linux-arm-kernel, Marek Vasut, Conor Dooley, Fabio Estevam,
	Krzysztof Kozlowski, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

Am Freitag, 3. Mai 2024, 15:45:57 CEST schrieb Laurent Pinchart:
> On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> > Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > > Configure both CSI2 assigned-clock-rates the same way.
> > > > There does not seem to be any reason for keeping the
> > > > two CSI2 pixel clock set to different frequencies.
> > > > 
> > > > This also reduces first CSI2 clock from overdrive mode
> > > > frequency which is 500 MHz down below the regular mode
> > > > frequency of 400 MHz.
> > > > 
> > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > 
> > > Apparently there is no difference when using imx415 (3840x2160) sensor.
> > 
> > Just for the records: While this change does not affect imx415 (3840x2160)
> > processing, reducing clock-frequency as well (v3) imx415 does not work.
> > So I assume that for this image size a higher than default frequency is
> > required.
> 
> For the time being I expect sensor overlays to override the default
> clock setup.

Yep, that's what I did in the end.

> Ideally the clock frequencies should be configured
> automatically at runtime by the CSI-2 RX driver.

Ideally, yes. In this case it depends on whether it is MIPI-CSI 1 in normal
or overdrive mode, if it is MIPI-CSI 2 or if both cameras a run
simultaneously. I wonder if it really worth to add that much infrastructure
for a use case which is essentially fixed setup.

Best regards,
Alexander

> > > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > > 
> > > > ---
> > > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > > Cc: Fabio Estevam <festevam@gmail.com>
> > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > > Cc: Rob Herring <robh@kernel.org>
> > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > > Cc: devicetree@vger.kernel.org
> > > > Cc: imx@lists.linux.dev
> > > > Cc: linux-arm-kernel@lists.infradead.org
> > > > ---
> > > > V2: Align both clock to 266 MHz and update commit message
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > > >  							 <&clk IMX8MP_CLK_24M>;
> > > > -				assigned-clock-rates = <500000000>;
> > > > +				assigned-clock-rates = <266000000>;
> > > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > > >  				status = "disabled";
> > > >  
> > > > 
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-05-06  6:19         ` Alexander Stein
  0 siblings, 0 replies; 20+ messages in thread
From: Alexander Stein @ 2024-05-06  6:19 UTC (permalink / raw)
  To: Laurent Pinchart
  Cc: linux-arm-kernel, Marek Vasut, Conor Dooley, Fabio Estevam,
	Krzysztof Kozlowski, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

Am Freitag, 3. Mai 2024, 15:45:57 CEST schrieb Laurent Pinchart:
> On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> > Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > > Configure both CSI2 assigned-clock-rates the same way.
> > > > There does not seem to be any reason for keeping the
> > > > two CSI2 pixel clock set to different frequencies.
> > > > 
> > > > This also reduces first CSI2 clock from overdrive mode
> > > > frequency which is 500 MHz down below the regular mode
> > > > frequency of 400 MHz.
> > > > 
> > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > 
> > > Apparently there is no difference when using imx415 (3840x2160) sensor.
> > 
> > Just for the records: While this change does not affect imx415 (3840x2160)
> > processing, reducing clock-frequency as well (v3) imx415 does not work.
> > So I assume that for this image size a higher than default frequency is
> > required.
> 
> For the time being I expect sensor overlays to override the default
> clock setup.

Yep, that's what I did in the end.

> Ideally the clock frequencies should be configured
> automatically at runtime by the CSI-2 RX driver.

Ideally, yes. In this case it depends on whether it is MIPI-CSI 1 in normal
or overdrive mode, if it is MIPI-CSI 2 or if both cameras a run
simultaneously. I wonder if it really worth to add that much infrastructure
for a use case which is essentially fixed setup.

Best regards,
Alexander

> > > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > > 
> > > > ---
> > > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > > Cc: Fabio Estevam <festevam@gmail.com>
> > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > > Cc: Rob Herring <robh@kernel.org>
> > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > > Cc: devicetree@vger.kernel.org
> > > > Cc: imx@lists.linux.dev
> > > > Cc: linux-arm-kernel@lists.infradead.org
> > > > ---
> > > > V2: Align both clock to 266 MHz and update commit message
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > > >  							 <&clk IMX8MP_CLK_24M>;
> > > > -				assigned-clock-rates = <500000000>;
> > > > +				assigned-clock-rates = <266000000>;
> > > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > > >  				status = "disabled";
> > > >  
> > > > 
> 
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
  2024-05-06  6:19         ` Alexander Stein
@ 2024-05-06 18:55           ` Laurent Pinchart
  -1 siblings, 0 replies; 20+ messages in thread
From: Laurent Pinchart @ 2024-05-06 18:55 UTC (permalink / raw)
  To: Alexander Stein
  Cc: linux-arm-kernel, Marek Vasut, Conor Dooley, Fabio Estevam,
	Krzysztof Kozlowski, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

On Mon, May 06, 2024 at 08:19:57AM +0200, Alexander Stein wrote:
> Am Freitag, 3. Mai 2024, 15:45:57 CEST schrieb Laurent Pinchart:
> > On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> > > Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > > > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > > > Configure both CSI2 assigned-clock-rates the same way.
> > > > > There does not seem to be any reason for keeping the
> > > > > two CSI2 pixel clock set to different frequencies.
> > > > > 
> > > > > This also reduces first CSI2 clock from overdrive mode
> > > > > frequency which is 500 MHz down below the regular mode
> > > > > frequency of 400 MHz.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > 
> > > > Apparently there is no difference when using imx415 (3840x2160) sensor.
> > > 
> > > Just for the records: While this change does not affect imx415 (3840x2160)
> > > processing, reducing clock-frequency as well (v3) imx415 does not work.
> > > So I assume that for this image size a higher than default frequency is
> > > required.
> > 
> > For the time being I expect sensor overlays to override the default
> > clock setup.
> 
> Yep, that's what I did in the end.
> 
> > Ideally the clock frequencies should be configured
> > automatically at runtime by the CSI-2 RX driver.
> 
> Ideally, yes. In this case it depends on whether it is MIPI-CSI 1 in normal
> or overdrive mode, if it is MIPI-CSI 2 or if both cameras a run
> simultaneously. I wonder if it really worth to add that much infrastructure
> for a use case which is essentially fixed setup.

There could be platforms where two cameras are connected, and the user
would want to operate them either concurrently at lower resolutions (and
speed), or separately at higher resolutions.

> > > > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > > > 
> > > > > ---
> > > > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > > > Cc: Fabio Estevam <festevam@gmail.com>
> > > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > > > Cc: Rob Herring <robh@kernel.org>
> > > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > > > Cc: devicetree@vger.kernel.org
> > > > > Cc: imx@lists.linux.dev
> > > > > Cc: linux-arm-kernel@lists.infradead.org
> > > > > ---
> > > > > V2: Align both clock to 266 MHz and update commit message
> > > > > ---
> > > > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > 
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > > > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > > > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > > > >  							 <&clk IMX8MP_CLK_24M>;
> > > > > -				assigned-clock-rates = <500000000>;
> > > > > +				assigned-clock-rates = <266000000>;
> > > > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > > > >  				status = "disabled";
> > > > >  

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 20+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock
@ 2024-05-06 18:55           ` Laurent Pinchart
  0 siblings, 0 replies; 20+ messages in thread
From: Laurent Pinchart @ 2024-05-06 18:55 UTC (permalink / raw)
  To: Alexander Stein
  Cc: linux-arm-kernel, Marek Vasut, Conor Dooley, Fabio Estevam,
	Krzysztof Kozlowski, Paul Elder, Pengutronix Kernel Team,
	Rob Herring, Sascha Hauer, Shawn Guo, devicetree, imx

On Mon, May 06, 2024 at 08:19:57AM +0200, Alexander Stein wrote:
> Am Freitag, 3. Mai 2024, 15:45:57 CEST schrieb Laurent Pinchart:
> > On Fri, May 03, 2024 at 02:58:19PM +0200, Alexander Stein wrote:
> > > Am Mittwoch, 17. April 2024, 11:12:04 CEST schrieb Alexander Stein:
> > > > Am Dienstag, 16. April 2024, 16:19:10 CEST schrieb Marek Vasut:
> > > > > Configure both CSI2 assigned-clock-rates the same way.
> > > > > There does not seem to be any reason for keeping the
> > > > > two CSI2 pixel clock set to different frequencies.
> > > > > 
> > > > > This also reduces first CSI2 clock from overdrive mode
> > > > > frequency which is 500 MHz down below the regular mode
> > > > > frequency of 400 MHz.
> > > > > 
> > > > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > > 
> > > > Apparently there is no difference when using imx415 (3840x2160) sensor.
> > > 
> > > Just for the records: While this change does not affect imx415 (3840x2160)
> > > processing, reducing clock-frequency as well (v3) imx415 does not work.
> > > So I assume that for this image size a higher than default frequency is
> > > required.
> > 
> > For the time being I expect sensor overlays to override the default
> > clock setup.
> 
> Yep, that's what I did in the end.
> 
> > Ideally the clock frequencies should be configured
> > automatically at runtime by the CSI-2 RX driver.
> 
> Ideally, yes. In this case it depends on whether it is MIPI-CSI 1 in normal
> or overdrive mode, if it is MIPI-CSI 2 or if both cameras a run
> simultaneously. I wonder if it really worth to add that much infrastructure
> for a use case which is essentially fixed setup.

There could be platforms where two cameras are connected, and the user
would want to operate them either concurrently at lower resolutions (and
speed), or separately at higher resolutions.

> > > > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > > > 
> > > > > ---
> > > > > Cc: Conor Dooley <conor+dt@kernel.org>
> > > > > Cc: Fabio Estevam <festevam@gmail.com>
> > > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> > > > > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > > > > Cc: Paul Elder <paul.elder@ideasonboard.com>
> > > > > Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> > > > > Cc: Rob Herring <robh@kernel.org>
> > > > > Cc: Sascha Hauer <s.hauer@pengutronix.de>
> > > > > Cc: Shawn Guo <shawnguo@kernel.org>
> > > > > Cc: devicetree@vger.kernel.org
> > > > > Cc: imx@lists.linux.dev
> > > > > Cc: linux-arm-kernel@lists.infradead.org
> > > > > ---
> > > > > V2: Align both clock to 266 MHz and update commit message
> > > > > ---
> > > > >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
> > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > 
> > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > > index 1bb96e96639f2..7883f5c056f4e 100644
> > > > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > > > @@ -1667,7 +1667,7 @@ mipi_csi_0: csi@32e40000 {
> > > > >  						  <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
> > > > >  				assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
> > > > >  							 <&clk IMX8MP_CLK_24M>;
> > > > > -				assigned-clock-rates = <500000000>;
> > > > > +				assigned-clock-rates = <266000000>;
> > > > >  				power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
> > > > >  				status = "disabled";
> > > > >  

-- 
Regards,

Laurent Pinchart

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 20+ messages in thread
end of thread, other threads:[~2024-05-06 18:56 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-04-16 14:19 [PATCH v2] arm64: dts: imx8mp: Align both CSI2 pixel clock Marek Vasut
2024-04-16 14:19 ` Marek Vasut
2024-04-16 15:01 ` Peng Fan
2024-04-16 15:01   ` Peng Fan
2024-04-17  9:12 ` Alexander Stein
2024-04-17  9:12   ` Alexander Stein
2024-05-03 12:58   ` Alexander Stein
2024-05-03 12:58     ` Alexander Stein
2024-05-03 13:45     ` Laurent Pinchart
2024-05-03 13:45       ` Laurent Pinchart
2024-05-06  6:19       ` Alexander Stein
2024-05-06  6:19         ` Alexander Stein
2024-05-06 18:55         ` Laurent Pinchart
2024-05-06 18:55           ` Laurent Pinchart
2024-04-17 10:14 ` Ahmad Fatoum
2024-04-17 10:14   ` Ahmad Fatoum
2024-04-17 10:17   ` Ahmad Fatoum
2024-04-17 10:17     ` Ahmad Fatoum
2024-04-17 11:06     ` Marek Vasut
2024-04-17 11:06       ` Marek Vasut

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