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From: Phil Edworthy <phil.edworthy@renesas.com>
To: linux-arm-kernel@lists.infradead.org
Subject: RE: [PATCH v7 01/10] PCI: host: rcar: Add Renesas R-Car PCIe driver
Date: Thu, 01 May 2014 09:50:56 +0000	[thread overview]
Message-ID: <b9160c7a49304270b5070dcf49482723@HKXPR06MB168.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <20140430154345.GA1705@obsidianresearch.com>

Hi Jason,

On 30 April 2014 16:44, Jason wrote:
> On Wed, Apr 30, 2014 at 10:33:08AM +0000, Phil Edworthy wrote:
> 
> > > You set the value of the integrated bus based on the bus number in the
> > > TYPE0 accesses the driver performs and it shows up in the PCI config
> > > space of the root port bridge:
> > >
> > > root@koelsch:~# lspci -vv
> > > 00:00.0 PCI bridge: Renesas Technology Corp. Device 001f (prog-if 00
> > > [Normal decode])
> > >         Bus: primary\0, secondary\x01, subordinate\x01, sec-latency=0
> > >
> > > The value here will be also be exported on-the-wire in certain PCI-E
> > > TLPs.
> > >
> > > So it is important, and must be set properly.
> > I am not so sure about this...
> >
> > There are three things we need to consider:
> > 1) talking to the host bridge itself
> > 2) talking to immediate device (connected directly to host bridge)
> > 3) talking to other devices
> >
> > The PCI standard tells us we use type 1's for 3) and type 0's for
> > 2). The driver uses root_bus_nr to make this decision.  For 1),
> > there is a note in the driver that the hardware cannot target
> > itself. The driver has code in rcar_pcie_config_access() to check if
> > it's an access to the host bridge, and if so, use I/O (readl/writel)
> > to perform the config access.
> 
> The logic should be:
>  if (bus = primary)
>     do io access to host bridge
>  else if (bus = secondary)
>     issue type 0 TLP on the wire
>  else if (bus > secondary && bus <= subordinate)
>     issue type 1 TLP on the wire
>  else
>     fail, invalid bus number
> Where the three values come from the register in the PCI host bridge's
> configuration space, and are kept in sync with the programming from
> the Linux PCI core.
> 
> It is just a happy hapenstance that root_bus_nr equals the value the
> PCI core programmed into secondary - that is not guarenteed, you must
> use the primary value directly.
For type0 TLPs, we are not checking that root_bus_nr equals the value the PCI core programmed into secondary, we are checking that the (root_bus_nr = bus->parent->number). The only way this wouldn't work is if root_bus_nr was not the root bus number.

Since the Synopsys DW driver also saves off sys->busnr and later uses this to determine if accesses are for the host bridge, I guess that means it won't always work either, right? Or is it ok because the DW driver saves sys->busnr in its .scan function?

When would the PCI core change the root bus number to something other than set in sys->busnr?

> I recommend capturing it on write to the host bridge config
> space.

Thanks
Phil


WARNING: multiple messages have this Message-ID (diff)
From: Phil Edworthy <phil.edworthy@renesas.com>
To: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	"linux-sh@vger.kernel.org" <linux-sh@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	"Valentine Barshak" <valentine.barshak@cogentembedded.com>,
	Simon Horman <horms@verge.net.au>,
	Ben Dooks <ben.dooks@codethink.co.uk>,
	LAKML <linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v7 01/10] PCI: host: rcar: Add Renesas R-Car PCIe driver
Date: Thu, 1 May 2014 09:50:56 +0000	[thread overview]
Message-ID: <b9160c7a49304270b5070dcf49482723@HKXPR06MB168.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <20140430154345.GA1705@obsidianresearch.com>

Hi Jason,

On 30 April 2014 16:44, Jason wrote:
> On Wed, Apr 30, 2014 at 10:33:08AM +0000, Phil Edworthy wrote:
> 
> > > You set the value of the integrated bus based on the bus number in the
> > > TYPE0 accesses the driver performs and it shows up in the PCI config
> > > space of the root port bridge:
> > >
> > > root@koelsch:~# lspci -vv
> > > 00:00.0 PCI bridge: Renesas Technology Corp. Device 001f (prog-if 00
> > > [Normal decode])
> > >         Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> > >
> > > The value here will be also be exported on-the-wire in certain PCI-E
> > > TLPs.
> > >
> > > So it is important, and must be set properly.
> > I am not so sure about this...
> >
> > There are three things we need to consider:
> > 1) talking to the host bridge itself
> > 2) talking to immediate device (connected directly to host bridge)
> > 3) talking to other devices
> >
> > The PCI standard tells us we use type 1's for 3) and type 0's for
> > 2). The driver uses root_bus_nr to make this decision.  For 1),
> > there is a note in the driver that the hardware cannot target
> > itself. The driver has code in rcar_pcie_config_access() to check if
> > it's an access to the host bridge, and if so, use I/O (readl/writel)
> > to perform the config access.
> 
> The logic should be:
>  if (bus == primary)
>     do io access to host bridge
>  else if (bus == secondary)
>     issue type 0 TLP on the wire
>  else if (bus > secondary && bus <= subordinate)
>     issue type 1 TLP on the wire
>  else
>     fail, invalid bus number
> Where the three values come from the register in the PCI host bridge's
> configuration space, and are kept in sync with the programming from
> the Linux PCI core.
> 
> It is just a happy hapenstance that root_bus_nr equals the value the
> PCI core programmed into secondary - that is not guarenteed, you must
> use the primary value directly.
For type0 TLPs, we are not checking that root_bus_nr equals the value the PCI core programmed into secondary, we are checking that the (root_bus_nr == bus->parent->number). The only way this wouldn't work is if root_bus_nr was not the root bus number.

Since the Synopsys DW driver also saves off sys->busnr and later uses this to determine if accesses are for the host bridge, I guess that means it won't always work either, right? Or is it ok because the DW driver saves sys->busnr in its .scan function?

When would the PCI core change the root bus number to something other than set in sys->busnr?

> I recommend capturing it on write to the host bridge config
> space.

Thanks
Phil


WARNING: multiple messages have this Message-ID (diff)
From: phil.edworthy@renesas.com (Phil Edworthy)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 01/10] PCI: host: rcar: Add Renesas R-Car PCIe driver
Date: Thu, 1 May 2014 09:50:56 +0000	[thread overview]
Message-ID: <b9160c7a49304270b5070dcf49482723@HKXPR06MB168.apcprd06.prod.outlook.com> (raw)
In-Reply-To: <20140430154345.GA1705@obsidianresearch.com>

Hi Jason,

On 30 April 2014 16:44, Jason wrote:
> On Wed, Apr 30, 2014 at 10:33:08AM +0000, Phil Edworthy wrote:
> 
> > > You set the value of the integrated bus based on the bus number in the
> > > TYPE0 accesses the driver performs and it shows up in the PCI config
> > > space of the root port bridge:
> > >
> > > root at koelsch:~# lspci -vv
> > > 00:00.0 PCI bridge: Renesas Technology Corp. Device 001f (prog-if 00
> > > [Normal decode])
> > >         Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> > >
> > > The value here will be also be exported on-the-wire in certain PCI-E
> > > TLPs.
> > >
> > > So it is important, and must be set properly.
> > I am not so sure about this...
> >
> > There are three things we need to consider:
> > 1) talking to the host bridge itself
> > 2) talking to immediate device (connected directly to host bridge)
> > 3) talking to other devices
> >
> > The PCI standard tells us we use type 1's for 3) and type 0's for
> > 2). The driver uses root_bus_nr to make this decision.  For 1),
> > there is a note in the driver that the hardware cannot target
> > itself. The driver has code in rcar_pcie_config_access() to check if
> > it's an access to the host bridge, and if so, use I/O (readl/writel)
> > to perform the config access.
> 
> The logic should be:
>  if (bus == primary)
>     do io access to host bridge
>  else if (bus == secondary)
>     issue type 0 TLP on the wire
>  else if (bus > secondary && bus <= subordinate)
>     issue type 1 TLP on the wire
>  else
>     fail, invalid bus number
> Where the three values come from the register in the PCI host bridge's
> configuration space, and are kept in sync with the programming from
> the Linux PCI core.
> 
> It is just a happy hapenstance that root_bus_nr equals the value the
> PCI core programmed into secondary - that is not guarenteed, you must
> use the primary value directly.
For type0 TLPs, we are not checking that root_bus_nr equals the value the PCI core programmed into secondary, we are checking that the (root_bus_nr == bus->parent->number). The only way this wouldn't work is if root_bus_nr was not the root bus number.

Since the Synopsys DW driver also saves off sys->busnr and later uses this to determine if accesses are for the host bridge, I guess that means it won't always work either, right? Or is it ok because the DW driver saves sys->busnr in its .scan function?

When would the PCI core change the root bus number to something other than set in sys->busnr?

> I recommend capturing it on write to the host bridge config
> space.

Thanks
Phil

  reply	other threads:[~2014-05-01  9:50 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-31 10:30 [PATCH v7 00/10] R-Car Gen2 PCIe host driver Phil Edworthy
2014-03-31 10:30 ` Phil Edworthy
2014-03-31 10:30 ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 01/10] PCI: host: rcar: Add Renesas R-Car PCIe driver Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-04-24 19:19   ` Bjorn Helgaas
2014-04-24 19:19     ` Bjorn Helgaas
2014-04-24 19:19     ` Bjorn Helgaas
2014-04-28 10:03     ` Phil Edworthy
2014-04-28 10:03       ` Phil Edworthy
2014-04-28 10:03       ` Phil Edworthy
2014-04-28 19:11       ` Bjorn Helgaas
2014-04-28 19:11         ` Bjorn Helgaas
2014-04-28 19:11         ` Bjorn Helgaas
2014-04-28 20:35         ` Jason Gunthorpe
2014-04-28 20:35           ` Jason Gunthorpe
2014-04-28 20:35           ` Jason Gunthorpe
2014-04-30 10:33           ` Phil Edworthy
2014-04-30 10:33             ` Phil Edworthy
2014-04-30 10:33             ` Phil Edworthy
2014-04-30 15:43             ` Jason Gunthorpe
2014-04-30 15:43               ` Jason Gunthorpe
2014-04-30 15:43               ` Jason Gunthorpe
2014-05-01  9:50               ` Phil Edworthy [this message]
2014-05-01  9:50                 ` Phil Edworthy
2014-05-01  9:50                 ` Phil Edworthy
2014-05-01 16:50                 ` Jason Gunthorpe
2014-05-01 16:50                   ` Jason Gunthorpe
2014-05-01 16:50                   ` Jason Gunthorpe
2014-05-06 10:46                   ` Phil Edworthy
2014-05-06 10:46                     ` Phil Edworthy
2014-05-06 10:46                     ` Phil Edworthy
2014-05-01 17:31                 ` Bjorn Helgaas
2014-05-01 17:31                   ` Bjorn Helgaas
2014-05-01 17:31                   ` Bjorn Helgaas
2014-05-06 12:49                   ` Phil Edworthy
2014-05-06 12:49                     ` Phil Edworthy
2014-05-06 12:49                     ` Phil Edworthy
2014-04-30 10:20         ` Phil Edworthy
2014-04-30 10:20           ` Phil Edworthy
2014-04-30 10:20           ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 02/10] PCI: host: rcar: Add MSI support Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-04-04  8:53   ` Lucas Stach
2014-04-04  8:53     ` Lucas Stach
2014-04-04  8:53     ` Lucas Stach
2014-03-31 10:30 ` [PATCH v7 03/10] ARM: shmobile: r8a7790: Add PCIe clock device tree nodes Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 04/10] ARM: shmobile: r8a7791: " Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 05/10] dt-bindings: pci: rcar pcie device tree bindings Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-04-04  9:08   ` Lucas Stach
2014-04-04  9:08     ` Lucas Stach
2014-04-04  9:08     ` Lucas Stach
2014-03-31 10:30 ` [PATCH v7 06/10] ARM: shmobile: r8a7790: Add PCIe device nodes Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 07/10] ARM: shmobile: lager: " Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 08/10] ARM: shmobile: r8a7791: " Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 09/10] ARM: shmobile: koelsch: " Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30 ` [PATCH v7 10/10] ARM: shmobile: koelsch: Add PCIe to defconfig Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-03-31 10:30   ` Phil Edworthy
2014-04-04  8:22 ` [PATCH v7 00/10] R-Car Gen2 PCIe host driver Phil Edworthy
2014-04-04  8:22   ` Phil Edworthy
2014-04-04  8:22   ` Phil Edworthy
2014-04-04  8:30 ` Phil Edworthy
2014-04-04  8:30   ` Phil Edworthy
2014-04-04  8:30   ` Phil Edworthy

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