[PATCH v2 0/2] AM64: Update the locations of various elements in SRAM

[PATCH v2 0/2] AM64: Update the locations of various elements in SRAM

[Aswath Govindraju]

The following series of patches,
- Update the location of TF-A
- Indicate reserved locations for DMSC code and secure proxy

changes since v1:
- Moved the load address of TF-A to 0x701c0000 to account for future
  increments in the size of TF-A
- Reworded the title of patch 2

Aswath Govindraju (2):
  configs: am64x_evm_a53_defconfig: Move TF-A load address to 0x701c0000
  arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy
    communication

 arch/arm/dts/k3-am64-main.dtsi  | 12 ++++++++++--
 configs/am64x_evm_a53_defconfig |  2 +-
 2 files changed, 11 insertions(+), 3 deletions(-)

-- 
2.17.1

[PATCH v2 1/2] configs: am64x_evm_a53_defconfig: Move TF-A load address to 0x701c0000

[Aswath Govindraju]

Earlier, the region 0x701c0000 to 0x701dffff was firewalled off because of
a bug in SYSFW. In the v2021.05 release of SYSFW this bug has been fixed
and this region can now be used for other allocations.

Therefore, move TF-A's load address to 0x701c0000 and update its location
in the device tree node. Also, increase the size allocated for TF-A to
account for future expansions.

Fixes: defd62ca137b ("arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its max size")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
 arch/arm/dts/k3-am64-main.dtsi  | 4 ++--
 configs/am64x_evm_a53_defconfig | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 6b5ebec6b1fe..f68b969a2e9b 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -13,8 +13,8 @@
 		#size-cells = <1>;
 		ranges = <0x0 0x00 0x70000000 0x200000>;
 
-		atf-sram@0 {
-			reg = <0x1a0000 0x1c000>;
+		tfa-sram@1c0000 {
+			reg = <0x1c0000 0x20000>;
 		};
 	};
 
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index fbce9e96748f..c8935dbde5f9 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SOC_K3_AM642=y
-CONFIG_K3_ATF_LOAD_ADDR=0x701a0000
+CONFIG_K3_ATF_LOAD_ADDR=0x701c0000
 CONFIG_TARGET_AM642_A53_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
-- 
2.17.1

Re: [PATCH v2 1/2] configs: am64x_evm_a53_defconfig: Move TF-A load address to 0x701c0000

[Suman Anna]

On 6/16/21 11:38 AM, Aswath Govindraju wrote:
> Earlier, the region 0x701c0000 to 0x701dffff was firewalled off because of
> a bug in SYSFW. In the v2021.05 release of SYSFW this bug has been fixed
> and this region can now be used for other allocations.
> 
> Therefore, move TF-A's load address to 0x701c0000 and update its location
> in the device tree node. Also, increase the size allocated for TF-A to
> account for future expansions.
> 
> Fixes: defd62ca137b ("arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its max size")
> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>

Reviewed-by: Suman Anna <s-anna@ti.com>

> ---
>  arch/arm/dts/k3-am64-main.dtsi  | 4 ++--
>  configs/am64x_evm_a53_defconfig | 2 +-
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
> index 6b5ebec6b1fe..f68b969a2e9b 100644
> --- a/arch/arm/dts/k3-am64-main.dtsi
> +++ b/arch/arm/dts/k3-am64-main.dtsi
> @@ -13,8 +13,8 @@
>  		#size-cells = <1>;
>  		ranges = <0x0 0x00 0x70000000 0x200000>;
>  
> -		atf-sram@0 {
> -			reg = <0x1a0000 0x1c000>;
> +		tfa-sram@1c0000 {
> +			reg = <0x1c0000 0x20000>;
>  		};
>  	};
>  
> diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
> index fbce9e96748f..c8935dbde5f9 100644
> --- a/configs/am64x_evm_a53_defconfig
> +++ b/configs/am64x_evm_a53_defconfig
> @@ -5,7 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
>  CONFIG_SYS_MALLOC_F_LEN=0x8000
>  CONFIG_NR_DRAM_BANKS=2
>  CONFIG_SOC_K3_AM642=y
> -CONFIG_K3_ATF_LOAD_ADDR=0x701a0000
> +CONFIG_K3_ATF_LOAD_ADDR=0x701c0000
>  CONFIG_TARGET_AM642_A53_EVM=y
>  CONFIG_ENV_SIZE=0x20000
>  CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
> 

[PATCH v2 2/2] arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication

[Aswath Govindraju]

The final 128KB in SRAM is reserved by default for DMSC-lite code and
secure proxy communication buffer. The memory region used for DMSC-lite
code can be optionally freed up by secure firmware API[1]. However, the
buffer for secure proxy communication is not configurable. This default
hardware configuration is unique for AM64.

Therefore, indicate the area reserved for DMSC-lite code and secure proxy
communication buffer in the oc_sram device tree node.

[1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
 arch/arm/dts/k3-am64-main.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index f68b969a2e9b..c5af2ffb8ee1 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -16,6 +16,14 @@
 		tfa-sram@1c0000 {
 			reg = <0x1c0000 0x20000>;
 		};
+
+		dmsc-sram@1e0000 {
+			reg = <0x1e0000 0x1c000>;
+		};
+
+		sproxy-sram@1fc000 {
+			reg = <0x1fc000 0x4000>;
+		};
 	};
 
 	gic500: interrupt-controller@1800000 {
-- 
2.17.1

Re: [PATCH v2 2/2] arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication

[Suman Anna]

On 6/16/21 11:38 AM, Aswath Govindraju wrote:
> The final 128KB in SRAM is reserved by default for DMSC-lite code and
> secure proxy communication buffer. The memory region used for DMSC-lite
> code can be optionally freed up by secure firmware API[1]. However, the
> buffer for secure proxy communication is not configurable. This default
> hardware configuration is unique for AM64.
> 
> Therefore, indicate the area reserved for DMSC-lite code and secure proxy
> communication buffer in the oc_sram device tree node.
> 
> [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover
> 
> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>

Acked-by: Suman Anna <s-anna@ti.com>

You may actually want to reorder so that this patch is first.

regards
Suman

> ---
>  arch/arm/dts/k3-am64-main.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
> index f68b969a2e9b..c5af2ffb8ee1 100644
> --- a/arch/arm/dts/k3-am64-main.dtsi
> +++ b/arch/arm/dts/k3-am64-main.dtsi
> @@ -16,6 +16,14 @@
>  		tfa-sram@1c0000 {
>  			reg = <0x1c0000 0x20000>;
>  		};
> +
> +		dmsc-sram@1e0000 {
> +			reg = <0x1e0000 0x1c000>;
> +		};
> +
> +		sproxy-sram@1fc000 {
> +			reg = <0x1fc000 0x4000>;
> +		};
>  	};
>  
>  	gic500: interrupt-controller@1800000 {
> 

Re: [PATCH v2 2/2] arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication

[Aswath Govindraju]

Hi Suman,

On 16/06/21 10:49 pm, Suman Anna wrote:
> On 6/16/21 11:38 AM, Aswath Govindraju wrote:
>> The final 128KB in SRAM is reserved by default for DMSC-lite code and
>> secure proxy communication buffer. The memory region used for DMSC-lite
>> code can be optionally freed up by secure firmware API[1]. However, the
>> buffer for secure proxy communication is not configurable. This default
>> hardware configuration is unique for AM64.
>>
>> Therefore, indicate the area reserved for DMSC-lite code and secure proxy
>> communication buffer in the oc_sram device tree node.
>>
>> [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover
>>
>> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
> 
> Acked-by: Suman Anna <s-anna@ti.com>
> 
> You may actually want to reorder so that this patch is first.
> 

Thank you for the Acked-by.

The reason why I chose this order is that patch 1, is a fixes patch and
that has to apply cleanly on top of previous commit.

Thanks,
Aswath


> regards
> Suman
> 
>> ---
>>  arch/arm/dts/k3-am64-main.dtsi | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
>> index f68b969a2e9b..c5af2ffb8ee1 100644
>> --- a/arch/arm/dts/k3-am64-main.dtsi
>> +++ b/arch/arm/dts/k3-am64-main.dtsi
>> @@ -16,6 +16,14 @@
>>  		tfa-sram@1c0000 {
>>  			reg = <0x1c0000 0x20000>;
>>  		};
>> +
>> +		dmsc-sram@1e0000 {
>> +			reg = <0x1e0000 0x1c000>;
>> +		};
>> +
>> +		sproxy-sram@1fc000 {
>> +			reg = <0x1fc000 0x4000>;
>> +		};
>>  	};
>>  
>>  	gic500: interrupt-controller@1800000 {
>>
> 

Re: [PATCH v2 0/2] AM64: Update the locations of various elements in SRAM

[Lokesh Vutla]

On Wed, 16 Jun 2021 22:08:19 +0530, Aswath Govindraju wrote:
> The following series of patches,
> - Update the location of TF-A
> - Indicate reserved locations for DMSC code and secure proxy
> 
> changes since v1:
> - Moved the load address of TF-A to 0x701c0000 to account for future
>   increments in the size of TF-A
> - Reworded the title of patch 2
> 
> [...]
 
Applied to https://source.denx.de/u-boot/custodians/u-boot-ti.git for-rc, thanks!
[1/2] configs: am64x_evm_a53_defconfig: Move TF-A load address to 0x701c0000
      https://source.denx.de/u-boot/custodians/u-boot-ti/-/commit/7500c2febe
[2/2] arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication
      https://source.denx.de/u-boot/custodians/u-boot-ti/-/commit/9199110350
 
--
Thanks and Regards,
Lokesh