* [PATCH] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC
@ 2015-03-25 13:19 Stephane Viau
2015-03-26 9:13 ` Rajendra Nayak
0 siblings, 1 reply; 3+ messages in thread
From: Stephane Viau @ 2015-03-25 13:19 UTC (permalink / raw)
To: linux-arm-msm; +Cc: linux-kernel, Stephane Viau
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
---
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/mmcc-apq8084.c | 56 ++++++++++++++++++++++++++-
include/dt-bindings/clock/qcom,mmcc-apq8084.h | 8 ++++
3 files changed, 64 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 4dadfc9..89879e1 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -15,6 +15,7 @@ config APQ_GCC_8084
config APQ_MMCC_8084
tristate "APQ8084 Multimedia Clock Controller"
select APQ_GCC_8084
+ select QCOM_GDSC
depends on COMMON_CLK_QCOM
help
Support for the multimedia clock controller on apq8084 devices.
diff --git a/drivers/clk/qcom/mmcc-apq8084.c b/drivers/clk/qcom/mmcc-apq8084.c
index 157139a..626adbd 100644
--- a/drivers/clk/qcom/mmcc-apq8084.c
+++ b/drivers/clk/qcom/mmcc-apq8084.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -26,6 +26,7 @@
#include "clk-rcg.h"
#include "clk-branch.h"
#include "reset.h"
+#include "gdsc.h"
#define P_XO 0
#define P_MMPLL0 1
@@ -3075,6 +3076,48 @@ static const struct pll_config mmpll3_config = {
.aux_output_mask = BIT(1),
};
+static struct gdsc venus0_gdsc = {
+ .gdscr = 0x1024,
+ .pd = {
+ .name = "venus0",
+ },
+};
+
+static struct gdsc mdss_gdsc = {
+ .gdscr = 0x2304,
+ .pd = {
+ .name = "mdss",
+ },
+};
+
+static struct gdsc camss_jpeg_gdsc = {
+ .gdscr = 0x35a4,
+ .pd = {
+ .name = "camss_jpeg",
+ },
+};
+
+static struct gdsc camss_vfe_gdsc = {
+ .gdscr = 0x36a4,
+ .pd = {
+ .name = "camss_vfe",
+ },
+};
+
+static struct gdsc oxili_gdsc = {
+ .gdscr = 0x4024,
+ .pd = {
+ .name = "oxili",
+ },
+};
+
+static struct gdsc oxilicx_gdsc = {
+ .gdscr = 0x4034,
+ .pd = {
+ .name = "oxilicx",
+ },
+};
+
static struct clk_regmap *mmcc_apq8084_clocks[] = {
[MMSS_AHB_CLK_SRC] = &mmss_ahb_clk_src.clkr,
[MMSS_AXI_CLK_SRC] = &mmss_axi_clk_src.clkr,
@@ -3292,6 +3335,15 @@ static const struct qcom_reset_map mmcc_apq8084_resets[] = {
[MMSSNOCAXI_RESET] = { 0x5060 },
};
+static struct generic_pm_domain *mmcc_apq8084_gdscs[] = {
+ [VENUS0_GDSC] = &venus0_gdsc.pd,
+ [MDSS_GDSC] = &mdss_gdsc.pd,
+ [CAMSS_JPEG_GDSC] = &camss_jpeg_gdsc.pd,
+ [CAMSS_VFE_GDSC] = &camss_vfe_gdsc.pd,
+ [OXILI_GDSC] = &oxili_gdsc.pd,
+ [OXILICX_GDSC] = &oxilicx_gdsc.pd,
+};
+
static const struct regmap_config mmcc_apq8084_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
@@ -3306,6 +3358,8 @@ static const struct qcom_cc_desc mmcc_apq8084_desc = {
.num_clks = ARRAY_SIZE(mmcc_apq8084_clocks),
.resets = mmcc_apq8084_resets,
.num_resets = ARRAY_SIZE(mmcc_apq8084_resets),
+ .gdscs = mmcc_apq8084_gdscs,
+ .num_gdscs = ARRAY_SIZE(mmcc_apq8084_gdscs),
};
static const struct of_device_id mmcc_apq8084_match_table[] = {
diff --git a/include/dt-bindings/clock/qcom,mmcc-apq8084.h b/include/dt-bindings/clock/qcom,mmcc-apq8084.h
index d72b5b3..21fec5d 100644
--- a/include/dt-bindings/clock/qcom,mmcc-apq8084.h
+++ b/include/dt-bindings/clock/qcom,mmcc-apq8084.h
@@ -180,4 +180,12 @@
#define VPU_SLEEP_CLK 163
#define VPU_VDP_CLK 164
+/* GDSCs */
+#define VENUS0_GDSC 0
+#define MDSS_GDSC 1
+#define CAMSS_JPEG_GDSC 2
+#define CAMSS_VFE_GDSC 3
+#define OXILI_GDSC 4
+#define OXILICX_GDSC 5
+
#endif
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC
2015-03-25 13:19 [PATCH] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC Stephane Viau
@ 2015-03-26 9:13 ` Rajendra Nayak
2015-03-26 14:43 ` "Stéphane Viau"
0 siblings, 1 reply; 3+ messages in thread
From: Rajendra Nayak @ 2015-03-26 9:13 UTC (permalink / raw)
To: Stephane Viau, linux-arm-msm; +Cc: linux-kernel
On 03/25/2015 06:49 PM, Stephane Viau wrote:
> Add the GDSC instances that exist as part of apq8084 MMCC block.
>
> Signed-off-by: Stephane Viau <sviau@codeaurora.org>
> ---
> drivers/clk/qcom/Kconfig | 1 +
> drivers/clk/qcom/mmcc-apq8084.c | 56 ++++++++++++++++++++++++++-
> include/dt-bindings/clock/qcom,mmcc-apq8084.h | 8 ++++
> 3 files changed, 64 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 4dadfc9..89879e1 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -15,6 +15,7 @@ config APQ_GCC_8084
> config APQ_MMCC_8084
> tristate "APQ8084 Multimedia Clock Controller"
> select APQ_GCC_8084
> + select QCOM_GDSC
> depends on COMMON_CLK_QCOM
> help
> Support for the multimedia clock controller on apq8084 devices.
> diff --git a/drivers/clk/qcom/mmcc-apq8084.c b/drivers/clk/qcom/mmcc-apq8084.c
> index 157139a..626adbd 100644
> --- a/drivers/clk/qcom/mmcc-apq8084.c
> +++ b/drivers/clk/qcom/mmcc-apq8084.c
> @@ -1,5 +1,5 @@
> /*
> - * Copyright (c) 2014, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
> *
> * This software is licensed under the terms of the GNU General Public
> * License version 2, as published by the Free Software Foundation, and
> @@ -26,6 +26,7 @@
> #include "clk-rcg.h"
> #include "clk-branch.h"
> #include "reset.h"
> +#include "gdsc.h"
>
> #define P_XO 0
> #define P_MMPLL0 1
> @@ -3075,6 +3076,48 @@ static const struct pll_config mmpll3_config = {
> .aux_output_mask = BIT(1),
> };
>
> +static struct gdsc venus0_gdsc = {
> + .gdscr = 0x1024,
> + .pd = {
> + .name = "venus0",
> + },
> +};
> +
> +static struct gdsc mdss_gdsc = {
> + .gdscr = 0x2304,
> + .pd = {
> + .name = "mdss",
> + },
> +};
> +
> +static struct gdsc camss_jpeg_gdsc = {
> + .gdscr = 0x35a4,
> + .pd = {
> + .name = "camss_jpeg",
> + },
> +};
> +
> +static struct gdsc camss_vfe_gdsc = {
> + .gdscr = 0x36a4,
> + .pd = {
> + .name = "camss_vfe",
> + },
> +};
> +
> +static struct gdsc oxili_gdsc = {
> + .gdscr = 0x4024,
> + .pd = {
> + .name = "oxili",
> + },
> +};
> +
> +static struct gdsc oxilicx_gdsc = {
> + .gdscr = 0x4034,
> + .pd = {
> + .name = "oxilicx",
> + },
> +};
> +
> static struct clk_regmap *mmcc_apq8084_clocks[] = {
> [MMSS_AHB_CLK_SRC] = &mmss_ahb_clk_src.clkr,
> [MMSS_AXI_CLK_SRC] = &mmss_axi_clk_src.clkr,
> @@ -3292,6 +3335,15 @@ static const struct qcom_reset_map mmcc_apq8084_resets[] = {
> [MMSSNOCAXI_RESET] = { 0x5060 },
> };
>
> +static struct generic_pm_domain *mmcc_apq8084_gdscs[] = {
With my v3, I changed this to an array of struct gdsc, I will
update this patch and include it in my gdsc series v4 repost, that I
will do shortly.
regards,
Rajendra
> + [VENUS0_GDSC] = &venus0_gdsc.pd,
> + [MDSS_GDSC] = &mdss_gdsc.pd,
> + [CAMSS_JPEG_GDSC] = &camss_jpeg_gdsc.pd,
> + [CAMSS_VFE_GDSC] = &camss_vfe_gdsc.pd,
> + [OXILI_GDSC] = &oxili_gdsc.pd,
> + [OXILICX_GDSC] = &oxilicx_gdsc.pd,
> +};
> +
> static const struct regmap_config mmcc_apq8084_regmap_config = {
> .reg_bits = 32,
> .reg_stride = 4,
> @@ -3306,6 +3358,8 @@ static const struct qcom_cc_desc mmcc_apq8084_desc = {
> .num_clks = ARRAY_SIZE(mmcc_apq8084_clocks),
> .resets = mmcc_apq8084_resets,
> .num_resets = ARRAY_SIZE(mmcc_apq8084_resets),
> + .gdscs = mmcc_apq8084_gdscs,
> + .num_gdscs = ARRAY_SIZE(mmcc_apq8084_gdscs),
> };
>
> static const struct of_device_id mmcc_apq8084_match_table[] = {
> diff --git a/include/dt-bindings/clock/qcom,mmcc-apq8084.h b/include/dt-bindings/clock/qcom,mmcc-apq8084.h
> index d72b5b3..21fec5d 100644
> --- a/include/dt-bindings/clock/qcom,mmcc-apq8084.h
> +++ b/include/dt-bindings/clock/qcom,mmcc-apq8084.h
> @@ -180,4 +180,12 @@
> #define VPU_SLEEP_CLK 163
> #define VPU_VDP_CLK 164
>
> +/* GDSCs */
> +#define VENUS0_GDSC 0
> +#define MDSS_GDSC 1
> +#define CAMSS_JPEG_GDSC 2
> +#define CAMSS_VFE_GDSC 3
> +#define OXILI_GDSC 4
> +#define OXILICX_GDSC 5
> +
> #endif
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC
2015-03-26 9:13 ` Rajendra Nayak
@ 2015-03-26 14:43 ` "Stéphane Viau"
0 siblings, 0 replies; 3+ messages in thread
From: "Stéphane Viau" @ 2015-03-26 14:43 UTC (permalink / raw)
To: Rajendra Nayak; +Cc: Stephane Viau, linux-arm-msm, linux-kernel
>
> On 03/25/2015 06:49 PM, Stephane Viau wrote:
>> Add the GDSC instances that exist as part of apq8084 MMCC block.
>>
>> Signed-off-by: Stephane Viau <sviau@codeaurora.org>
>> ---
>> drivers/clk/qcom/Kconfig | 1 +
>> drivers/clk/qcom/mmcc-apq8084.c | 56
> ++++++++++++++++++++++++++-
>> include/dt-bindings/clock/qcom,mmcc-apq8084.h | 8 ++++
>> 3 files changed, 64 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
>> index 4dadfc9..89879e1 100644
>> --- a/drivers/clk/qcom/Kconfig
>> +++ b/drivers/clk/qcom/Kconfig
>> @@ -15,6 +15,7 @@ config APQ_GCC_8084
>> config APQ_MMCC_8084
>> tristate "APQ8084 Multimedia Clock Controller"
>> select APQ_GCC_8084
>> + select QCOM_GDSC
>> depends on COMMON_CLK_QCOM
>> help
>> Support for the multimedia clock controller on apq8084 devices.
>> diff --git a/drivers/clk/qcom/mmcc-apq8084.c
> b/drivers/clk/qcom/mmcc-apq8084.c
>> index 157139a..626adbd 100644
>> --- a/drivers/clk/qcom/mmcc-apq8084.c
>> +++ b/drivers/clk/qcom/mmcc-apq8084.c
>> @@ -1,5 +1,5 @@
>> /*
>> - * Copyright (c) 2014, The Linux Foundation. All rights reserved.
>> + * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
>> *
>> * This software is licensed under the terms of the GNU General Public
>> * License version 2, as published by the Free Software Foundation,
> and
>> @@ -26,6 +26,7 @@
>> #include "clk-rcg.h"
>> #include "clk-branch.h"
>> #include "reset.h"
>> +#include "gdsc.h"
>>
>> #define P_XO 0
>> #define P_MMPLL0 1
>> @@ -3075,6 +3076,48 @@ static const struct pll_config mmpll3_config = {
>> .aux_output_mask = BIT(1),
>> };
>>
>> +static struct gdsc venus0_gdsc = {
>> + .gdscr = 0x1024,
>> + .pd = {
>> + .name = "venus0",
>> + },
>> +};
>> +
>> +static struct gdsc mdss_gdsc = {
>> + .gdscr = 0x2304,
>> + .pd = {
>> + .name = "mdss",
>> + },
>> +};
>> +
>> +static struct gdsc camss_jpeg_gdsc = {
>> + .gdscr = 0x35a4,
>> + .pd = {
>> + .name = "camss_jpeg",
>> + },
>> +};
>> +
>> +static struct gdsc camss_vfe_gdsc = {
>> + .gdscr = 0x36a4,
>> + .pd = {
>> + .name = "camss_vfe",
>> + },
>> +};
>> +
>> +static struct gdsc oxili_gdsc = {
>> + .gdscr = 0x4024,
>> + .pd = {
>> + .name = "oxili",
>> + },
>> +};
>> +
>> +static struct gdsc oxilicx_gdsc = {
>> + .gdscr = 0x4034,
>> + .pd = {
>> + .name = "oxilicx",
>> + },
>> +};
>> +
>> static struct clk_regmap *mmcc_apq8084_clocks[] = {
>> [MMSS_AHB_CLK_SRC] = &mmss_ahb_clk_src.clkr,
>> [MMSS_AXI_CLK_SRC] = &mmss_axi_clk_src.clkr,
>> @@ -3292,6 +3335,15 @@ static const struct qcom_reset_map
> mmcc_apq8084_resets[] = {
>> [MMSSNOCAXI_RESET] = { 0x5060 },
>> };
>>
>> +static struct generic_pm_domain *mmcc_apq8084_gdscs[] = {
>
> With my v3, I changed this to an array of struct gdsc, I will
> update this patch and include it in my gdsc series v4 repost, that I
> will do shortly.
Thanks for rebasing, Rajendra.
Regards,
Stephane.
>
> regards,
> Rajendra
>
>> + [VENUS0_GDSC] = &venus0_gdsc.pd,
>> + [MDSS_GDSC] = &mdss_gdsc.pd,
>> + [CAMSS_JPEG_GDSC] = &camss_jpeg_gdsc.pd,
>> + [CAMSS_VFE_GDSC] = &camss_vfe_gdsc.pd,
>> + [OXILI_GDSC] = &oxili_gdsc.pd,
>> + [OXILICX_GDSC] = &oxilicx_gdsc.pd,
>> +};
>> +
>> static const struct regmap_config mmcc_apq8084_regmap_config = {
>> .reg_bits = 32,
>> .reg_stride = 4,
>> @@ -3306,6 +3358,8 @@ static const struct qcom_cc_desc mmcc_apq8084_desc
> = {
>> .num_clks = ARRAY_SIZE(mmcc_apq8084_clocks),
>> .resets = mmcc_apq8084_resets,
>> .num_resets = ARRAY_SIZE(mmcc_apq8084_resets),
>> + .gdscs = mmcc_apq8084_gdscs,
>> + .num_gdscs = ARRAY_SIZE(mmcc_apq8084_gdscs),
>> };
>>
>> static const struct of_device_id mmcc_apq8084_match_table[] = {
>> diff --git a/include/dt-bindings/clock/qcom,mmcc-apq8084.h
> b/include/dt-bindings/clock/qcom,mmcc-apq8084.h
>> index d72b5b3..21fec5d 100644
>> --- a/include/dt-bindings/clock/qcom,mmcc-apq8084.h
>> +++ b/include/dt-bindings/clock/qcom,mmcc-apq8084.h
>> @@ -180,4 +180,12 @@
>> #define VPU_SLEEP_CLK 163
>> #define VPU_VDP_CLK 164
>>
>> +/* GDSCs */
>> +#define VENUS0_GDSC 0
>> +#define MDSS_GDSC 1
>> +#define CAMSS_JPEG_GDSC 2
>> +#define CAMSS_VFE_GDSC 3
>> +#define OXILI_GDSC 4
>> +#define OXILICX_GDSC 5
>> +
>> #endif
>>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> hosted by The Linux Foundation
>
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2015-03-26 14:43 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-03-25 13:19 [PATCH] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC Stephane Viau
2015-03-26 9:13 ` Rajendra Nayak
2015-03-26 14:43 ` "Stéphane Viau"
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.