Re: [PATCH 0/2] mtd: rawnand: micron: Fix on-die ECC

[Chris Packham <Chris.Packham@alliedtelesis.co.nz>]

Hi Boris,

On 10/07/18 20:11, Boris Brezillon wrote:
> On Mon,  9 Jul 2018 23:09:35 +0200
> Boris Brezillon <boris.brezillon@bootlin.com> wrote:
> 
>> Chris, Bean,
>>
>> Here are 2 patches for you to review/test. The first one is fixing
>> the layout definition, and unless I missed something it should be
>> correct.
>>
>> The second one is just my understanding of how byte 5 of READ_ID works
>> based on our experience with the 4bit/512 on-die ECC chip we have
>> worked on and the other datasheet I had a look at.
>> I'm not 100% sure this will work for all chips, but might work for the
>> 2 chips we support right now.
> 
> I tested it on a MT29F2G08ABAEAH4 (4bit/512bytes on-die ECC) and it
> works as expected. When I do the SET_FEATURES(ECC_EN) the ECC enabled
> bit in READID byte 5 is set, and when I do SET_FEATURES(ECC_DIS), the
> bit is cleared.
> 
> Now we need to make sure it works correctly on MT29F1G08ABAFAWP.

I'll test that as soon as I can get access to the hardware (probably 
Monday next week).

> 
>> So please test and/or review it and let me know if this approach works.
>>
>> Regards,
>>
>> Boris
>>
>> Boris Brezillon (2):
>>    mtd: rawnand: micron: Define the proper layout for 8bit/512bytes
>>      on-die ECC
>>    mtd: rawnand: micron: Fix on-die ECC detection logic
>>
>>   drivers/mtd/nand/raw/nand_micron.c | 110 +++++++++++++++++++++++++------------
>>   1 file changed, 75 insertions(+), 35 deletions(-)
>>
> 
>