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* [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
@ 2021-09-11 22:43 Marek Vasut
  2021-09-11 22:53 ` Marcel Ziswiler
  2021-10-07 14:12 ` sbabic
  0 siblings, 2 replies; 7+ messages in thread
From: Marek Vasut @ 2021-09-11 22:43 UTC (permalink / raw)
  To: u-boot; +Cc: Marek Vasut, Marcel Ziswiler, Max Krummenacher, Oleksandr Suvorov

Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
the Micrel PHY driver correctly configures the delay register. The Verdin PHY
is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
---
 arch/arm/dts/imx8mm-verdin.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts
index fb0756d6e19..ac2a4b69d3c 100644
--- a/arch/arm/dts/imx8mm-verdin.dts
+++ b/arch/arm/dts/imx8mm-verdin.dts
@@ -160,7 +160,7 @@
 &fec1 {
 	fsl,magic-packet;
 	phy-handle = <&ethphy0>;
-	phy-mode = "rgmii";
+	phy-mode = "rgmii-id";
 	phy-supply = <&reg_ethphy>;
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&pinctrl_fec1>;
-- 
2.33.0


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
  2021-09-11 22:43 [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID Marek Vasut
@ 2021-09-11 22:53 ` Marcel Ziswiler
  2021-09-11 22:57   ` Marek Vasut
  2021-10-07 14:12 ` sbabic
  1 sibling, 1 reply; 7+ messages in thread
From: Marcel Ziswiler @ 2021-09-11 22:53 UTC (permalink / raw)
  To: marex, u-boot; +Cc: Max Krummenacher, Oleksandr Suvorov

Hi Marek

On Sun, 2021-09-12 at 00:43 +0200, Marek Vasut wrote:
> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
> the Micrel PHY driver correctly configures the delay register. The Verdin PHY
> is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.

Yes, however, one should also get rid of the proprietary PHY setup in our board setup.

Remember, I already did send this as part of my target refresh series:

https://marc.info/?l=u-boot&m=162990456210415

> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Cc: Max Krummenacher <max.krummenacher@toradex.com>
> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
> ---
>  arch/arm/dts/imx8mm-verdin.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts
> index fb0756d6e19..ac2a4b69d3c 100644
> --- a/arch/arm/dts/imx8mm-verdin.dts
> +++ b/arch/arm/dts/imx8mm-verdin.dts
> @@ -160,7 +160,7 @@
>  &fec1 {
>         fsl,magic-packet;
>         phy-handle = <&ethphy0>;
> -       phy-mode = "rgmii";
> +       phy-mode = "rgmii-id";
>         phy-supply = <&reg_ethphy>;
>         pinctrl-names = "default", "sleep";
>         pinctrl-0 = <&pinctrl_fec1>;

Cheers

Marcel

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
  2021-09-11 22:53 ` Marcel Ziswiler
@ 2021-09-11 22:57   ` Marek Vasut
  0 siblings, 0 replies; 7+ messages in thread
From: Marek Vasut @ 2021-09-11 22:57 UTC (permalink / raw)
  To: Marcel Ziswiler, u-boot
  Cc: Max Krummenacher, Oleksandr Suvorov, Stefano Babic

On 9/12/21 12:53 AM, Marcel Ziswiler wrote:
> Hi Marek
> 
> On Sun, 2021-09-12 at 00:43 +0200, Marek Vasut wrote:
>> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
>> the Micrel PHY driver correctly configures the delay register. The Verdin PHY
>> is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
> 
> Yes, however, one should also get rid of the proprietary PHY setup in our board setup.
> 
> Remember, I already did send this as part of my target refresh series:
> 
> https://marc.info/?l=u-boot&m=162990456210415

ACK, that patch of yours is a better patch too.

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
  2021-09-11 22:43 [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID Marek Vasut
  2021-09-11 22:53 ` Marcel Ziswiler
@ 2021-10-07 14:12 ` sbabic
  2021-10-07 23:56   ` Marcel Ziswiler
  1 sibling, 1 reply; 7+ messages in thread
From: sbabic @ 2021-10-07 14:12 UTC (permalink / raw)
  To: Marek Vasut, U-Boot

> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
> the Micrel PHY driver correctly configures the delay register. The Verdin PHY
> is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Cc: Max Krummenacher <max.krummenacher@toradex.com>
> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
  2021-10-07 14:12 ` sbabic
@ 2021-10-07 23:56   ` Marcel Ziswiler
  2021-10-08  0:13     ` Marcel Ziswiler
  0 siblings, 1 reply; 7+ messages in thread
From: Marcel Ziswiler @ 2021-10-07 23:56 UTC (permalink / raw)
  To: marex, U-Boot, sbabic

On Thu, 2021-10-07 at 16:12 +0200, sbabic@denx.de wrote:
> > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
> > the Micrel PHY driver correctly configures the delay register. The Verdin PHY
> > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> > Cc: Max Krummenacher <max.krummenacher@toradex.com>
> > Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
> Applied to u-boot-imx, master, thanks !

No, remember, you should not have picked that one but rather my patch series instead!

> Best regards,
> Stefano Babic

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
  2021-10-07 23:56   ` Marcel Ziswiler
@ 2021-10-08  0:13     ` Marcel Ziswiler
  2021-10-08  0:22       ` Marek Vasut
  0 siblings, 1 reply; 7+ messages in thread
From: Marcel Ziswiler @ 2021-10-08  0:13 UTC (permalink / raw)
  To: marex, U-Boot, sbabic

On Thu, 2021-10-07 at 23:56 +0000, Marcel Ziswiler wrote:
> On Thu, 2021-10-07 at 16:12 +0200, sbabic@denx.de wrote:
> > > Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
> > > the Micrel PHY driver correctly configures the delay register. The Verdin PHY
> > > is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
> > > Signed-off-by: Marek Vasut <marex@denx.de>
> > > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> > > Cc: Max Krummenacher <max.krummenacher@toradex.com>
> > > Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
> > Applied to u-boot-imx, master, thanks !
> 
> No, remember, you should not have picked that one but rather my patch series instead!

Okay, let me send a v5 of my patch series re-based on top of this now with another fixes tag (;-p).

> > Best regards,
> > Stefano Babic

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID
  2021-10-08  0:13     ` Marcel Ziswiler
@ 2021-10-08  0:22       ` Marek Vasut
  0 siblings, 0 replies; 7+ messages in thread
From: Marek Vasut @ 2021-10-08  0:22 UTC (permalink / raw)
  To: Marcel Ziswiler, U-Boot, sbabic

On 10/8/21 2:13 AM, Marcel Ziswiler wrote:
> On Thu, 2021-10-07 at 23:56 +0000, Marcel Ziswiler wrote:
>> On Thu, 2021-10-07 at 16:12 +0200, sbabic@denx.de wrote:
>>>> Since c6df0e2ffdc ("net: phy: micrel: add support for DLL setup on ksz9131")
>>>> the Micrel PHY driver correctly configures the delay register. The Verdin PHY
>>>> is RGMII-ID, so reflect that in DT, otherwise the ethernet no longer works.
>>>> Signed-off-by: Marek Vasut <marex@denx.de>
>>>> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
>>>> Cc: Max Krummenacher <max.krummenacher@toradex.com>
>>>> Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
>>> Applied to u-boot-imx, master, thanks !
>>
>> No, remember, you should not have picked that one but rather my patch series instead!
> 
> Okay, let me send a v5 of my patch series re-based on top of this now with another fixes tag (;-p).

Ah sigh, thanks.

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2021-10-08  0:22 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-11 22:43 [PATCH] ARM: dts: imx8mm-verdin: Set PHY mode to RGMII-ID Marek Vasut
2021-09-11 22:53 ` Marcel Ziswiler
2021-09-11 22:57   ` Marek Vasut
2021-10-07 14:12 ` sbabic
2021-10-07 23:56   ` Marcel Ziswiler
2021-10-08  0:13     ` Marcel Ziswiler
2021-10-08  0:22       ` Marek Vasut

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