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* [PATCH 1/3] drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub
@ 2019-11-19  9:11 ` Changfeng.Zhu
  0 siblings, 0 replies; 4+ messages in thread
From: Changfeng.Zhu @ 2019-11-19  9:11 UTC (permalink / raw)
  To: Christian.Koenig-5C7GfCeVMHo, Jack.Xiao-5C7GfCeVMHo,
	Tao.Zhou1-5C7GfCeVMHo, Ray.Huang-5C7GfCeVMHo,
	Xinmei.Huang-5C7GfCeVMHo,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: changzhu

From: changzhu <Changfeng.Zhu@amd.com>

SW must acquire/release one of the vm_invalidate_eng*_sem around the
invalidation req/ack. Through this way,it can avoid losing invalidate
acknowledge state across power-gating off cycle.
To use vm_invalidate_eng*_sem, it needs to initialize
vm_invalidate_eng*_sem firstly.

Change-Id: Ic7abf481b08df085c326a98eba4b00d78f33560c
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h  | 1 +
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 2 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c  | 2 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 4 ++++
 6 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 406736a1bd3d..b499a3de8bb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -77,6 +77,7 @@ struct amdgpu_gmc_fault {
 struct amdgpu_vmhub {
 	uint32_t	ctx0_ptb_addr_lo32;
 	uint32_t	ctx0_ptb_addr_hi32;
+	uint32_t	vm_inv_eng0_sem;
 	uint32_t	vm_inv_eng0_req;
 	uint32_t	vm_inv_eng0_ack;
 	uint32_t	vm_context0_cntl;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 9ec4297e61e5..e91bd7945777 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -367,6 +367,8 @@ void gfxhub_v1_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(GC, 0,
 				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
index b4f32d853ca1..b70c7b483c24 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
@@ -356,6 +356,8 @@ void gfxhub_v2_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(GC, 0,
 				 mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 6965e1e6fa9e..28105e4af507 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -420,6 +420,8 @@ void mmhub_v1_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(MMHUB, 0,
 				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index 945533634711..a7cb185d639a 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -348,6 +348,8 @@ void mmhub_v2_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(MMHUB, 0,
 				 mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 2c5adfe803a2..66efe2f7bd76 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -504,6 +504,10 @@ void mmhub_v9_4_init(struct amdgpu_device *adev)
 			SOC15_REG_OFFSET(MMHUB, 0,
 			    mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) +
 			    i * MMHUB_INSTANCE_REGISTER_OFFSET;
+		hub[i]->vm_inv_eng0_sem =
+			SOC15_REG_OFFSET(MMHUB, 0,
+					 mmVML2VC0_VM_INVALIDATE_ENG0_SEM) +
+					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
 		hub[i]->vm_inv_eng0_req =
 			SOC15_REG_OFFSET(MMHUB, 0,
 					 mmVML2VC0_VM_INVALIDATE_ENG0_REQ) +
-- 
2.17.1

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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH 1/3] drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub
@ 2019-11-19  9:11 ` Changfeng.Zhu
  0 siblings, 0 replies; 4+ messages in thread
From: Changfeng.Zhu @ 2019-11-19  9:11 UTC (permalink / raw)
  To: Christian.Koenig, Jack.Xiao, Tao.Zhou1, Ray.Huang, Xinmei.Huang, amd-gfx
  Cc: changzhu

From: changzhu <Changfeng.Zhu@amd.com>

SW must acquire/release one of the vm_invalidate_eng*_sem around the
invalidation req/ack. Through this way,it can avoid losing invalidate
acknowledge state across power-gating off cycle.
To use vm_invalidate_eng*_sem, it needs to initialize
vm_invalidate_eng*_sem firstly.

Change-Id: Ic7abf481b08df085c326a98eba4b00d78f33560c
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h  | 1 +
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 2 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c  | 2 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 4 ++++
 6 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 406736a1bd3d..b499a3de8bb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -77,6 +77,7 @@ struct amdgpu_gmc_fault {
 struct amdgpu_vmhub {
 	uint32_t	ctx0_ptb_addr_lo32;
 	uint32_t	ctx0_ptb_addr_hi32;
+	uint32_t	vm_inv_eng0_sem;
 	uint32_t	vm_inv_eng0_req;
 	uint32_t	vm_inv_eng0_ack;
 	uint32_t	vm_context0_cntl;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 9ec4297e61e5..e91bd7945777 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -367,6 +367,8 @@ void gfxhub_v1_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(GC, 0,
 				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
index b4f32d853ca1..b70c7b483c24 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
@@ -356,6 +356,8 @@ void gfxhub_v2_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(GC, 0,
 				 mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 6965e1e6fa9e..28105e4af507 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -420,6 +420,8 @@ void mmhub_v1_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(MMHUB, 0,
 				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index 945533634711..a7cb185d639a 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -348,6 +348,8 @@ void mmhub_v2_0_init(struct amdgpu_device *adev)
 	hub->ctx0_ptb_addr_hi32 =
 		SOC15_REG_OFFSET(MMHUB, 0,
 				 mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+	hub->vm_inv_eng0_sem =
+		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_SEM);
 	hub->vm_inv_eng0_req =
 		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_REQ);
 	hub->vm_inv_eng0_ack =
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 2c5adfe803a2..66efe2f7bd76 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -504,6 +504,10 @@ void mmhub_v9_4_init(struct amdgpu_device *adev)
 			SOC15_REG_OFFSET(MMHUB, 0,
 			    mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) +
 			    i * MMHUB_INSTANCE_REGISTER_OFFSET;
+		hub[i]->vm_inv_eng0_sem =
+			SOC15_REG_OFFSET(MMHUB, 0,
+					 mmVML2VC0_VM_INVALIDATE_ENG0_SEM) +
+					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
 		hub[i]->vm_inv_eng0_req =
 			SOC15_REG_OFFSET(MMHUB, 0,
 					 mmVML2VC0_VM_INVALIDATE_ENG0_REQ) +
-- 
2.17.1

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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH 1/3] drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub
@ 2019-11-19  9:22     ` Christian König
  0 siblings, 0 replies; 4+ messages in thread
From: Christian König @ 2019-11-19  9:22 UTC (permalink / raw)
  To: Changfeng.Zhu, Jack.Xiao-5C7GfCeVMHo, Tao.Zhou1-5C7GfCeVMHo,
	Ray.Huang-5C7GfCeVMHo, Xinmei.Huang-5C7GfCeVMHo,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Am 19.11.19 um 10:11 schrieb Changfeng.Zhu:
> From: changzhu <Changfeng.Zhu@amd.com>
>
> SW must acquire/release one of the vm_invalidate_eng*_sem around the
> invalidation req/ack. Through this way,it can avoid losing invalidate
> acknowledge state across power-gating off cycle.
> To use vm_invalidate_eng*_sem, it needs to initialize
> vm_invalidate_eng*_sem firstly.
>
> Change-Id: Ic7abf481b08df085c326a98eba4b00d78f33560c
> Signed-off-by: changzhu <Changfeng.Zhu@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h  | 1 +
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c  | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 4 ++++
>   6 files changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 406736a1bd3d..b499a3de8bb6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -77,6 +77,7 @@ struct amdgpu_gmc_fault {
>   struct amdgpu_vmhub {
>   	uint32_t	ctx0_ptb_addr_lo32;
>   	uint32_t	ctx0_ptb_addr_hi32;
> +	uint32_t	vm_inv_eng0_sem;
>   	uint32_t	vm_inv_eng0_req;
>   	uint32_t	vm_inv_eng0_ack;
>   	uint32_t	vm_context0_cntl;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index 9ec4297e61e5..e91bd7945777 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -367,6 +367,8 @@ void gfxhub_v1_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(GC, 0,
>   				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> index b4f32d853ca1..b70c7b483c24 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> @@ -356,6 +356,8 @@ void gfxhub_v2_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(GC, 0,
>   				 mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 6965e1e6fa9e..28105e4af507 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -420,6 +420,8 @@ void mmhub_v1_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(MMHUB, 0,
>   				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> index 945533634711..a7cb185d639a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> @@ -348,6 +348,8 @@ void mmhub_v2_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(MMHUB, 0,
>   				 mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> index 2c5adfe803a2..66efe2f7bd76 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> @@ -504,6 +504,10 @@ void mmhub_v9_4_init(struct amdgpu_device *adev)
>   			SOC15_REG_OFFSET(MMHUB, 0,
>   			    mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) +
>   			    i * MMHUB_INSTANCE_REGISTER_OFFSET;
> +		hub[i]->vm_inv_eng0_sem =
> +			SOC15_REG_OFFSET(MMHUB, 0,
> +					 mmVML2VC0_VM_INVALIDATE_ENG0_SEM) +
> +					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
>   		hub[i]->vm_inv_eng0_req =
>   			SOC15_REG_OFFSET(MMHUB, 0,
>   					 mmVML2VC0_VM_INVALIDATE_ENG0_REQ) +

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^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 1/3] drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub
@ 2019-11-19  9:22     ` Christian König
  0 siblings, 0 replies; 4+ messages in thread
From: Christian König @ 2019-11-19  9:22 UTC (permalink / raw)
  To: Changfeng.Zhu, Jack.Xiao, Tao.Zhou1, Ray.Huang, Xinmei.Huang, amd-gfx

Am 19.11.19 um 10:11 schrieb Changfeng.Zhu:
> From: changzhu <Changfeng.Zhu@amd.com>
>
> SW must acquire/release one of the vm_invalidate_eng*_sem around the
> invalidation req/ack. Through this way,it can avoid losing invalidate
> acknowledge state across power-gating off cycle.
> To use vm_invalidate_eng*_sem, it needs to initialize
> vm_invalidate_eng*_sem firstly.
>
> Change-Id: Ic7abf481b08df085c326a98eba4b00d78f33560c
> Signed-off-by: changzhu <Changfeng.Zhu@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h  | 1 +
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c  | 2 ++
>   drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c  | 4 ++++
>   6 files changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 406736a1bd3d..b499a3de8bb6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -77,6 +77,7 @@ struct amdgpu_gmc_fault {
>   struct amdgpu_vmhub {
>   	uint32_t	ctx0_ptb_addr_lo32;
>   	uint32_t	ctx0_ptb_addr_hi32;
> +	uint32_t	vm_inv_eng0_sem;
>   	uint32_t	vm_inv_eng0_req;
>   	uint32_t	vm_inv_eng0_ack;
>   	uint32_t	vm_context0_cntl;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index 9ec4297e61e5..e91bd7945777 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -367,6 +367,8 @@ void gfxhub_v1_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(GC, 0,
>   				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> index b4f32d853ca1..b70c7b483c24 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> @@ -356,6 +356,8 @@ void gfxhub_v2_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(GC, 0,
>   				 mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 6965e1e6fa9e..28105e4af507 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -420,6 +420,8 @@ void mmhub_v1_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(MMHUB, 0,
>   				 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> index 945533634711..a7cb185d639a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> @@ -348,6 +348,8 @@ void mmhub_v2_0_init(struct amdgpu_device *adev)
>   	hub->ctx0_ptb_addr_hi32 =
>   		SOC15_REG_OFFSET(MMHUB, 0,
>   				 mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
> +	hub->vm_inv_eng0_sem =
> +		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_SEM);
>   	hub->vm_inv_eng0_req =
>   		SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_REQ);
>   	hub->vm_inv_eng0_ack =
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> index 2c5adfe803a2..66efe2f7bd76 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> @@ -504,6 +504,10 @@ void mmhub_v9_4_init(struct amdgpu_device *adev)
>   			SOC15_REG_OFFSET(MMHUB, 0,
>   			    mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) +
>   			    i * MMHUB_INSTANCE_REGISTER_OFFSET;
> +		hub[i]->vm_inv_eng0_sem =
> +			SOC15_REG_OFFSET(MMHUB, 0,
> +					 mmVML2VC0_VM_INVALIDATE_ENG0_SEM) +
> +					 i * MMHUB_INSTANCE_REGISTER_OFFSET;
>   		hub[i]->vm_inv_eng0_req =
>   			SOC15_REG_OFFSET(MMHUB, 0,
>   					 mmVML2VC0_VM_INVALIDATE_ENG0_REQ) +

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^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-11-19  9:23 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-19  9:11 [PATCH 1/3] drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub Changfeng.Zhu
2019-11-19  9:11 ` Changfeng.Zhu
     [not found] ` <20191119091149.4543-1-changfeng.zhu-5C7GfCeVMHo@public.gmane.org>
2019-11-19  9:22   ` Christian König
2019-11-19  9:22     ` Christian König

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