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* [Intel-gfx] [PATCH] drm/i915/display/psr: Add sink not reliable check to intel_psr_work()
@ 2021-03-12 13:34 Gwan-gyeong Mun
  2021-03-12 13:37 ` Souza, Jose
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Gwan-gyeong Mun @ 2021-03-12 13:34 UTC (permalink / raw)
  To: intel-gfx

If the sink state is not reliable, it does not need to wait for
PSR "IDLE state" for re-enabling PSR. And it should not try to re-enable
PSR.

Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index cd434285e3b7..7f555407de06 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1686,6 +1686,9 @@ static void intel_psr_work(struct work_struct *work)
 	if (READ_ONCE(intel_dp->psr.irq_aux_error))
 		intel_psr_handle_irq(intel_dp);
 
+	if (intel_dp->psr.sink_not_reliable)
+		goto unlock;
+
 	/*
 	 * We have to make sure PSR is ready for re-enable
 	 * otherwise it keeps disabled until next full enable/disable cycle.
-- 
2.30.1

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^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-03-16 14:38 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-12 13:34 [Intel-gfx] [PATCH] drm/i915/display/psr: Add sink not reliable check to intel_psr_work() Gwan-gyeong Mun
2021-03-12 13:37 ` Souza, Jose
2021-03-13 20:01   ` Mun, Gwan-gyeong
2021-03-16 14:38     ` Souza, Jose
2021-03-12 14:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-03-12 15:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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