[PATCH libdrm 0/4] Dynamicly disable suites and tets.

[PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Andrey Grodzovsky]

THe following  patch series intoroduce  dynamic tests dusabling/enabling
in amdgpu  tester using Cunit API. Today test suits that
don't apply to specific HW just return success w/o executing while
single tests that can't be executed properly are commented out.

Suits are diasbled based on hooks they provide (e.g incompatible 
ASIC or missing blocks) while single tests are diasbled explicitly since this is 
usually due to some bug preventing from the tester  or the system  to handle
the test w/o crashing or killing the tester.

Inside this series also a minor cleanup and new test for memory over allocation.

Andrey Grodzovsky (4):
  amdgpu: Add functions to disable suites and tests.
  amdgpu: Use new suite/test disabling functionality.
  amdgpu: Move memory alloc tests in bo suite.
  amdgpu: Add memory over allocation test.

 tests/amdgpu/amdgpu_test.c    | 169 +++++++++++++++++++++++++++++++++++++-----
 tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
 tests/amdgpu/basic_tests.c    |  49 ------------
 tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
 tests/amdgpu/deadlock_tests.c |   8 +-
 tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
 tests/amdgpu/vce_tests.c      |  65 ++++++++--------
 tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
 8 files changed, 363 insertions(+), 198 deletions(-)

-- 
2.7.4

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[PATCH libdrm 2/4] amdgpu: Use new suite/test disabling functionality.

[Andrey Grodzovsky]

Switch from disabling tests during run to using the new disable
API.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 tests/amdgpu/amdgpu_test.c    | 14 ++++++--
 tests/amdgpu/amdgpu_test.h    | 15 ++++++++
 tests/amdgpu/deadlock_tests.c |  8 +----
 tests/amdgpu/uvd_enc_tests.c  | 81 +++++++++++++++++--------------------------
 tests/amdgpu/vce_tests.c      | 65 +++++++++++++++++-----------------
 tests/amdgpu/vcn_tests.c      | 74 +++++++++++++++++----------------------
 6 files changed, 123 insertions(+), 134 deletions(-)

diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 68ec5d3..91010dc 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -150,15 +150,15 @@ static Suites_Active_Status suites_active_stat[] = {
 		},
 		{
 			.pName = VCE_TESTS_STR,
-			.pActive = always_active,
+			.pActive = suite_vce_tests_enable,
 		},
 		{
 			.pName = VCN_TESTS_STR,
-			.pActive = always_active,
+			.pActive = suite_vcn_tests_enable,
 		},
 		{
 			.pName = UVD_ENC_TESTS_STR,
-			.pActive = always_active,
+			.pActive = suite_uvd_enc_tests_enable,
 		},
 		{
 			.pName = DEADLOCK_TESTS_STR,
@@ -409,6 +409,14 @@ static void amdgpu_disable_suits()
 		if (amdgpu_set_suite_active(suites_active_stat[i].pName,
 				suites_active_stat[i].pActive()))
 			fprintf(stderr, "suit deactivation failed - %s\n", CU_get_error_msg());
+
+	/* Explicitly disable specific tests due to known bugs or preferences */
+	/*
+	* BUG: Compute ring stalls and never recovers when the address is
+	* written after the command already submitted
+	*/
+	if (amdgpu_set_test_active(DEADLOCK_TESTS_STR, "compute ring block test", CU_FALSE))
+		fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());
 }
 
 /* The main() function for setting up and running the tests.
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 9ccc1ff..dd236ed 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -100,6 +100,11 @@ int suite_vce_tests_init();
 int suite_vce_tests_clean();
 
 /**
+ * Decide if the suite is enabled by default or not.
+ */
+CU_BOOL suite_vce_tests_enable(void);
+
+/**
  * Tests in vce test suite
  */
 extern CU_TestInfo vce_tests[];
@@ -115,6 +120,11 @@ int suite_vcn_tests_init();
 int suite_vcn_tests_clean();
 
 /**
+ * Decide if the suite is enabled by default or not.
+ */
+CU_BOOL suite_vcn_tests_enable(void);
+
+/**
 + * Tests in vcn test suite
 + */
 extern CU_TestInfo vcn_tests[];
@@ -130,6 +140,11 @@ int suite_uvd_enc_tests_init();
 int suite_uvd_enc_tests_clean();
 
 /**
+ * Decide if the suite is enabled by default or not.
+ */
+CU_BOOL suite_uvd_enc_tests_enable(void);
+
+/**
  * Tests in uvd enc test suite
  */
 extern CU_TestInfo uvd_enc_tests[];
diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c
index e23d903..f5c4552 100644
--- a/tests/amdgpu/deadlock_tests.c
+++ b/tests/amdgpu/deadlock_tests.c
@@ -119,13 +119,7 @@ int suite_deadlock_tests_clean(void)
 
 CU_TestInfo deadlock_tests[] = {
 	{ "gfx ring block test",  amdgpu_deadlock_gfx },
-
-	/*
-	* BUG: Compute ring stalls and never recovers when the address is
-	* written after the command already submitted
-	*/
-	/* { "compute ring block test",  amdgpu_deadlock_compute }, */
-
+	{ "compute ring block test",  amdgpu_deadlock_compute },
 	CU_TEST_INFO_NULL,
 };
 
diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c
index bbda131..bed8494 100644
--- a/tests/amdgpu/uvd_enc_tests.c
+++ b/tests/amdgpu/uvd_enc_tests.c
@@ -79,7 +79,6 @@ static void amdgpu_cs_uvd_enc_session_init(void);
 static void amdgpu_cs_uvd_enc_encode(void);
 static void amdgpu_cs_uvd_enc_destroy(void);
 
-static bool uvd_enc_support(void);
 
 CU_TestInfo uvd_enc_tests[] = {
 	{ "UVD ENC create",  amdgpu_cs_uvd_enc_create },
@@ -89,6 +88,27 @@ CU_TestInfo uvd_enc_tests[] = {
 	CU_TEST_INFO_NULL,
 };
 
+CU_BOOL suite_uvd_enc_tests_enable(void)
+{
+	int r;
+	struct drm_amdgpu_info_hw_ip info;
+
+	if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
+					     &minor_version, &device_handle))
+		return CU_FALSE;
+
+	r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_UVD_ENC, 0, &info);
+
+	if (amdgpu_device_deinitialize(device_handle))
+		return CU_FALSE;
+
+	if (!info.available_rings)
+		printf("\n\nThe ASIC NOT support UVD ENC, suite disabled.\n");
+
+	return (r == 0 && (info.available_rings ? CU_TRUE : CU_FALSE));
+}
+
+
 int suite_uvd_enc_tests_init(void)
 {
 	int r;
@@ -100,11 +120,6 @@ int suite_uvd_enc_tests_init(void)
 
 	family_id = device_handle->info.family_id;
 
-	if (!uvd_enc_support()) {
-		printf("\n\nThe ASIC NOT support UVD ENC, all sub-tests will pass\n");
-		return CUE_SUCCESS;
-	}
-
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
 	if (r)
 		return CUE_SINIT_FAILED;
@@ -123,28 +138,18 @@ int suite_uvd_enc_tests_clean(void)
 {
 	int r;
 
-	if (!uvd_enc_support()) {
-
-		r = amdgpu_device_deinitialize(device_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-
-		return CUE_SUCCESS;
-	} else {
-
-		r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
-					     ib_mc_address, IB_SIZE);
-		if (r)
-			return CUE_SCLEAN_FAILED;
+	r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
+				     ib_mc_address, IB_SIZE);
+	if (r)
+		return CUE_SCLEAN_FAILED;
 
-		r = amdgpu_cs_ctx_free(context_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
+	r = amdgpu_cs_ctx_free(context_handle);
+	if (r)
+		return CUE_SCLEAN_FAILED;
 
-		r = amdgpu_device_deinitialize(device_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-	}
+	r = amdgpu_device_deinitialize(device_handle);
+	if (r)
+		return CUE_SCLEAN_FAILED;
 
 	return CUE_SUCCESS;
 }
@@ -240,26 +245,10 @@ static void free_resource(struct amdgpu_uvd_enc_bo *uvd_enc_bo)
 	memset(uvd_enc_bo, 0, sizeof(*uvd_enc_bo));
 }
 
-static bool uvd_enc_support(void)
-{
-	int r;
-	struct drm_amdgpu_info_hw_ip info;
-
-	r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_UVD_ENC, 0, &info);
-
-	if (r)
-		return false;
-	else
-		return (info.available_rings?true:false);
-}
-
 static void amdgpu_cs_uvd_enc_create(void)
 {
 	int len, r;
 
-	if (!uvd_enc_support())
-		return;
-
 	enc.width = 160;
 	enc.height = 128;
 
@@ -296,9 +285,6 @@ static void amdgpu_cs_uvd_enc_session_init(void)
 {
 	int len, r;
 
-	if (!uvd_enc_support())
-		return;
-
 	len = 0;
 	memcpy((ib_cpu + len), uve_session_info, sizeof(uve_session_info));
 	len += sizeof(uve_session_info) / 4;
@@ -354,8 +340,6 @@ static void amdgpu_cs_uvd_enc_encode(void)
 	vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
 	cpb_size = vbuf_size * 10;
 
-	if (!uvd_enc_support())
-		return;
 
 	num_resources  = 0;
 	alloc_resource(&enc.fb, 4096, AMDGPU_GEM_DOMAIN_VRAM);
@@ -489,9 +473,6 @@ static void amdgpu_cs_uvd_enc_destroy(void)
 	struct amdgpu_uvd_enc_bo sw_ctx;
 	int len, r;
 
-	if (!uvd_enc_support())
-		return;
-
 	num_resources  = 0;
 	resources[num_resources++] = ib_handle;
 
diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
index cf44c13..75821bb 100644
--- a/tests/amdgpu/vce_tests.c
+++ b/tests/amdgpu/vce_tests.c
@@ -88,6 +88,27 @@ CU_TestInfo vce_tests[] = {
 	CU_TEST_INFO_NULL,
 };
 
+
+CU_BOOL suite_vce_tests_enable(void)
+{
+	if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
+					     &minor_version, &device_handle))
+		return CU_FALSE;
+
+	family_id = device_handle->info.family_id;
+
+	if (amdgpu_device_deinitialize(device_handle))
+		return CU_FALSE;
+
+
+	if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
+		printf("\n\nThe ASIC NOT support VCE, suite disabled\n");
+		return CU_FALSE;
+	}
+
+	return CU_TRUE;
+}
+
 int suite_vce_tests_init(void)
 {
 	int r;
@@ -106,11 +127,6 @@ int suite_vce_tests_init(void)
 	family_id = device_handle->info.family_id;
 	vce_harvest_config = device_handle->info.vce_harvest_config;
 
-	if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
-		printf("\n\nThe ASIC NOT support VCE, all sub-tests will pass\n");
-		return CUE_SUCCESS;
-	}
-
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
 	if (r)
 		return CUE_SINIT_FAILED;
@@ -131,24 +147,18 @@ int suite_vce_tests_clean(void)
 {
 	int r;
 
-	if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
-		r = amdgpu_device_deinitialize(device_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-	} else {
-		r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
-					     ib_mc_address, IB_SIZE);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-
-		r = amdgpu_cs_ctx_free(context_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-
-		r = amdgpu_device_deinitialize(device_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-	}
+	r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
+				     ib_mc_address, IB_SIZE);
+	if (r)
+		return CUE_SCLEAN_FAILED;
+
+	r = amdgpu_cs_ctx_free(context_handle);
+	if (r)
+		return CUE_SCLEAN_FAILED;
+
+	r = amdgpu_device_deinitialize(device_handle);
+	if (r)
+		return CUE_SCLEAN_FAILED;
 
 	return CUE_SUCCESS;
 }
@@ -248,9 +258,6 @@ static void amdgpu_cs_vce_create(void)
 	unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
 	int len, r;
 
-	if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI)
-		return;
-
 	enc.width = vce_create[6];
 	enc.height = vce_create[7];
 
@@ -444,9 +451,6 @@ static void amdgpu_cs_vce_encode(void)
 	unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
 	int i, r;
 
-	if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI)
-		return;
-
 	vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
 	cpb_size = vbuf_size * 10;
 	num_resources = 0;
@@ -525,9 +529,6 @@ static void amdgpu_cs_vce_destroy(void)
 {
 	int len, r;
 
-	if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI)
-		return;
-
 	num_resources  = 0;
 	alloc_resource(&enc.fb[0], 4096, AMDGPU_GEM_DOMAIN_GTT);
 	resources[num_resources++] = enc.fb[0].handle;
diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
index 2b1696d..53a2d08 100644
--- a/tests/amdgpu/vcn_tests.c
+++ b/tests/amdgpu/vcn_tests.c
@@ -82,6 +82,27 @@ CU_TestInfo vcn_tests[] = {
 	CU_TEST_INFO_NULL,
 };
 
+CU_BOOL suite_vcn_tests_enable(void)
+{
+
+	if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
+				   &minor_version, &device_handle))
+		return CU_FALSE;
+
+	family_id = device_handle->info.family_id;
+
+	if (amdgpu_device_deinitialize(device_handle))
+			return CU_FALSE;
+
+
+	if (family_id < AMDGPU_FAMILY_RV) {
+		printf("\n\nThe ASIC NOT support VCN, suite disabled\n");
+		return CU_FALSE;
+	}
+
+	return CU_TRUE;
+}
+
 int suite_vcn_tests_init(void)
 {
 	int r;
@@ -93,11 +114,6 @@ int suite_vcn_tests_init(void)
 
 	family_id = device_handle->info.family_id;
 
-	if (family_id < AMDGPU_FAMILY_RV) {
-		printf("\n\nThe ASIC NOT support VCN, all sub-tests will pass\n");
-		return CUE_SUCCESS;
-	}
-
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
 	if (r)
 		return CUE_SINIT_FAILED;
@@ -116,26 +132,18 @@ int suite_vcn_tests_clean(void)
 {
 	int r;
 
-	if (family_id < AMDGPU_FAMILY_RV) {
-		r = amdgpu_device_deinitialize(device_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-	} else {
-		r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
-				     ib_mc_address, IB_SIZE);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-
-		r = amdgpu_cs_ctx_free(context_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-
-		r = amdgpu_device_deinitialize(device_handle);
-		if (r)
-			return CUE_SCLEAN_FAILED;
-	}
+	r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
+			     ib_mc_address, IB_SIZE);
+	if (r)
+		return CUE_SCLEAN_FAILED;
 
-	return CUE_SUCCESS;
+	r = amdgpu_cs_ctx_free(context_handle);
+	if (r)
+		return CUE_SCLEAN_FAILED;
+
+	r = amdgpu_device_deinitialize(device_handle);
+	if (r)
+		return CUE_SCLEAN_FAILED;
 }
 
 static int submit(unsigned ndw, unsigned ip)
@@ -244,9 +252,6 @@ static void amdgpu_cs_vcn_dec_create(void)
 	struct amdgpu_vcn_bo msg_buf;
 	int len, r;
 
-	if (family_id < AMDGPU_FAMILY_RV)
-		return;
-
 	num_resources  = 0;
 	alloc_resource(&msg_buf, 4096, AMDGPU_GEM_DOMAIN_GTT);
 	resources[num_resources++] = msg_buf.handle;
@@ -282,9 +287,6 @@ static void amdgpu_cs_vcn_dec_decode(void)
 	int size, len, i, r;
 	uint8_t *dec;
 
-	if (family_id < AMDGPU_FAMILY_RV)
-		return;
-
 	size = 4*1024; /* msg */
 	size += 4*1024; /* fb */
 	size += 4096; /*it_scaling_table*/
@@ -355,9 +357,6 @@ static void amdgpu_cs_vcn_dec_destroy(void)
 	struct amdgpu_vcn_bo msg_buf;
 	int len, r;
 
-	if (family_id < AMDGPU_FAMILY_RV)
-		return;
-
 	num_resources  = 0;
 	alloc_resource(&msg_buf, 1024, AMDGPU_GEM_DOMAIN_GTT);
 	resources[num_resources++] = msg_buf.handle;
@@ -387,24 +386,15 @@ static void amdgpu_cs_vcn_dec_destroy(void)
 
 static void amdgpu_cs_vcn_enc_create(void)
 {
-	if (family_id < AMDGPU_FAMILY_RV)
-		return;
-
 	/* TODO */
 }
 
 static void amdgpu_cs_vcn_enc_encode(void)
 {
-	if (family_id < AMDGPU_FAMILY_RV)
-		return;
-
 	/* TODO */
 }
 
 static void amdgpu_cs_vcn_enc_destroy(void)
 {
-	if (family_id < AMDGPU_FAMILY_RV)
-		return;
-
 	/* TODO */
 }
-- 
2.7.4

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Re: [PATCH libdrm 2/4] amdgpu: Use new suite/test disabling functionality.

[Emil Velikov]

On 10 November 2017 at 04:30, Andrey Grodzovsky
<andrey.grodzovsky@amd.com> wrote:
> Switch from disabling tests during run to using the new disable
> API.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
> ---
>  tests/amdgpu/amdgpu_test.c    | 14 ++++++--
>  tests/amdgpu/amdgpu_test.h    | 15 ++++++++
>  tests/amdgpu/deadlock_tests.c |  8 +----
>  tests/amdgpu/uvd_enc_tests.c  | 81 +++++++++++++++++--------------------------
>  tests/amdgpu/vce_tests.c      | 65 +++++++++++++++++-----------------
>  tests/amdgpu/vcn_tests.c      | 74 +++++++++++++++++----------------------
>  6 files changed, 123 insertions(+), 134 deletions(-)
>
> diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
> index 68ec5d3..91010dc 100644
> --- a/tests/amdgpu/amdgpu_test.c
> +++ b/tests/amdgpu/amdgpu_test.c
> @@ -150,15 +150,15 @@ static Suites_Active_Status suites_active_stat[] = {
>                 },
>                 {
>                         .pName = VCE_TESTS_STR,
> -                       .pActive = always_active,
> +                       .pActive = suite_vce_tests_enable,
>                 },
>                 {
>                         .pName = VCN_TESTS_STR,
> -                       .pActive = always_active,
> +                       .pActive = suite_vcn_tests_enable,
>                 },
>                 {
>                         .pName = UVD_ENC_TESTS_STR,
> -                       .pActive = always_active,
> +                       .pActive = suite_uvd_enc_tests_enable,
>                 },
>                 {
>                         .pName = DEADLOCK_TESTS_STR,
> @@ -409,6 +409,14 @@ static void amdgpu_disable_suits()
>                 if (amdgpu_set_suite_active(suites_active_stat[i].pName,
>                                 suites_active_stat[i].pActive()))
>                         fprintf(stderr, "suit deactivation failed - %s\n", CU_get_error_msg());
> +
> +       /* Explicitly disable specific tests due to known bugs or preferences */
> +       /*
> +       * BUG: Compute ring stalls and never recovers when the address is
> +       * written after the command already submitted
> +       */
> +       if (amdgpu_set_test_active(DEADLOCK_TESTS_STR, "compute ring block test", CU_FALSE))
> +               fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());
>  }
>
>  /* The main() function for setting up and running the tests.
> diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
> index 9ccc1ff..dd236ed 100644
> --- a/tests/amdgpu/amdgpu_test.h
> +++ b/tests/amdgpu/amdgpu_test.h
> @@ -100,6 +100,11 @@ int suite_vce_tests_init();
>  int suite_vce_tests_clean();
>
>  /**
> + * Decide if the suite is enabled by default or not.
> + */
> +CU_BOOL suite_vce_tests_enable(void);
> +
> +/**
>   * Tests in vce test suite
>   */
>  extern CU_TestInfo vce_tests[];
> @@ -115,6 +120,11 @@ int suite_vcn_tests_init();
>  int suite_vcn_tests_clean();
>
>  /**
> + * Decide if the suite is enabled by default or not.
> + */
> +CU_BOOL suite_vcn_tests_enable(void);
> +
> +/**
>  + * Tests in vcn test suite
>  + */
>  extern CU_TestInfo vcn_tests[];
> @@ -130,6 +140,11 @@ int suite_uvd_enc_tests_init();
>  int suite_uvd_enc_tests_clean();
>
>  /**
> + * Decide if the suite is enabled by default or not.
> + */
> +CU_BOOL suite_uvd_enc_tests_enable(void);
> +
> +/**
>   * Tests in uvd enc test suite
>   */
>  extern CU_TestInfo uvd_enc_tests[];
> diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c
> index e23d903..f5c4552 100644
> --- a/tests/amdgpu/deadlock_tests.c
> +++ b/tests/amdgpu/deadlock_tests.c
> @@ -119,13 +119,7 @@ int suite_deadlock_tests_clean(void)
>
>  CU_TestInfo deadlock_tests[] = {
>         { "gfx ring block test",  amdgpu_deadlock_gfx },
> -
> -       /*
> -       * BUG: Compute ring stalls and never recovers when the address is
> -       * written after the command already submitted
> -       */
> -       /* { "compute ring block test",  amdgpu_deadlock_compute }, */
> -
> +       { "compute ring block test",  amdgpu_deadlock_compute },
>         CU_TEST_INFO_NULL,
>  };
>
> diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c
> index bbda131..bed8494 100644
> --- a/tests/amdgpu/uvd_enc_tests.c
> +++ b/tests/amdgpu/uvd_enc_tests.c
> @@ -79,7 +79,6 @@ static void amdgpu_cs_uvd_enc_session_init(void);
>  static void amdgpu_cs_uvd_enc_encode(void);
>  static void amdgpu_cs_uvd_enc_destroy(void);
>
> -static bool uvd_enc_support(void);
>
>  CU_TestInfo uvd_enc_tests[] = {
>         { "UVD ENC create",  amdgpu_cs_uvd_enc_create },
> @@ -89,6 +88,27 @@ CU_TestInfo uvd_enc_tests[] = {
>         CU_TEST_INFO_NULL,
>  };
>
> +CU_BOOL suite_uvd_enc_tests_enable(void)
> +{
> +       int r;
> +       struct drm_amdgpu_info_hw_ip info;
> +
> +       if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
> +                                            &minor_version, &device_handle))
> +               return CU_FALSE;
> +
> +       r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_UVD_ENC, 0, &info);
> +
> +       if (amdgpu_device_deinitialize(device_handle))
> +               return CU_FALSE;
> +
> +       if (!info.available_rings)
> +               printf("\n\nThe ASIC NOT support UVD ENC, suite disabled.\n");
> +
> +       return (r == 0 && (info.available_rings ? CU_TRUE : CU_FALSE));
> +}
> +
> +
>  int suite_uvd_enc_tests_init(void)
>  {
>         int r;
> @@ -100,11 +120,6 @@ int suite_uvd_enc_tests_init(void)
>
>         family_id = device_handle->info.family_id;
>
> -       if (!uvd_enc_support()) {
> -               printf("\n\nThe ASIC NOT support UVD ENC, all sub-tests will pass\n");
> -               return CUE_SUCCESS;
> -       }
> -
>         r = amdgpu_cs_ctx_create(device_handle, &context_handle);
>         if (r)
>                 return CUE_SINIT_FAILED;
> @@ -123,28 +138,18 @@ int suite_uvd_enc_tests_clean(void)
>  {
>         int r;
>
> -       if (!uvd_enc_support()) {
> -
> -               r = amdgpu_device_deinitialize(device_handle);
> -               if (r)
> -                       return CUE_SCLEAN_FAILED;
> -
> -               return CUE_SUCCESS;
> -       } else {
> -
> -               r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
> -                                            ib_mc_address, IB_SIZE);
> -               if (r)
> -                       return CUE_SCLEAN_FAILED;
> +       r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
> +                                    ib_mc_address, IB_SIZE);
> +       if (r)
> +               return CUE_SCLEAN_FAILED;
>
> -               r = amdgpu_cs_ctx_free(context_handle);
> -               if (r)
> -                       return CUE_SCLEAN_FAILED;
> +       r = amdgpu_cs_ctx_free(context_handle);
> +       if (r)
> +               return CUE_SCLEAN_FAILED;
>
> -               r = amdgpu_device_deinitialize(device_handle);
> -               if (r)
> -                       return CUE_SCLEAN_FAILED;
> -       }
> +       r = amdgpu_device_deinitialize(device_handle);
> +       if (r)
> +               return CUE_SCLEAN_FAILED;
>
>         return CUE_SUCCESS;
Seems like this return disappeared somewhere between patching and
pushing the patch.
See https://bugs.freedesktop.org/show_bug.cgi?id=104280

-Emil
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[PATCH libdrm] tests/amdgpu: Restore return CUE_SUCCESS to suite_vcn_tests_clean.

[Andrey Grodzovsky]

    fixes: 806d0803600000faecb4025d8e9c7490cb097c25 (amdgpu: Use new suite/test disabling functionality.)
    bug: https://bugs.freedesktop.org/show_bug.cgi?id=104280

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 tests/amdgpu/vcn_tests.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
index 53a2d08..9224bc3 100644
--- a/tests/amdgpu/vcn_tests.c
+++ b/tests/amdgpu/vcn_tests.c
@@ -144,6 +144,8 @@ int suite_vcn_tests_clean(void)
 	r = amdgpu_device_deinitialize(device_handle);
 	if (r)
 		return CUE_SCLEAN_FAILED;
+
+	return CUE_SUCCESS;
 }
 
 static int submit(unsigned ndw, unsigned ip)
-- 
2.7.4

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Re: [PATCH libdrm] tests/amdgpu: Restore return CUE_SUCCESS to suite_vcn_tests_clean.

[Christian König]

Am 15.12.2017 um 19:27 schrieb Andrey Grodzovsky:
>      fixes: 806d0803600000faecb4025d8e9c7490cb097c25 (amdgpu: Use new suite/test disabling functionality.)
>      bug: https://bugs.freedesktop.org/show_bug.cgi?id=104280
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   tests/amdgpu/vcn_tests.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
> index 53a2d08..9224bc3 100644
> --- a/tests/amdgpu/vcn_tests.c
> +++ b/tests/amdgpu/vcn_tests.c
> @@ -144,6 +144,8 @@ int suite_vcn_tests_clean(void)
>   	r = amdgpu_device_deinitialize(device_handle);
>   	if (r)
>   		return CUE_SCLEAN_FAILED;
> +
> +	return CUE_SUCCESS;
>   }
>   
>   static int submit(unsigned ndw, unsigned ip)

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Re: [PATCH libdrm] tests/amdgpu: Restore return CUE_SUCCESS to suite_vcn_tests_clean.

[Emil Velikov]

On 15 December 2017 at 18:27, Andrey Grodzovsky
<andrey.grodzovsky@amd.com> wrote:
>     fixes: 806d0803600000faecb4025d8e9c7490cb097c25 (amdgpu: Use new suite/test disabling functionality.)
>     bug: https://bugs.freedesktop.org/show_bug.cgi?id=104280
Nit: remove the leading space.

>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Thanks for the quick fixup.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

-Emil
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[PATCH libdrm 1/4] amdgpu: Add functions to disable suites and tests.

[Andrey Grodzovsky]

Suits are diasbled based on hooks they provide (e.g incompatible
ASIC or missing blocks). Single tests are diasbled explicitly.
Suit or test can be forced to execute even if disabled by adding -f 
flag after specifying suit [test] ids.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 tests/amdgpu/amdgpu_test.c | 157 +++++++++++++++++++++++++++++++++++++++------
 tests/amdgpu/amdgpu_test.h |  31 +++++++++
 2 files changed, 170 insertions(+), 18 deletions(-)

diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index a82d9ab..68ec5d3 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -50,6 +50,16 @@
 
 #include "amdgpu_test.h"
 
+/* Test suit names */
+#define BASIC_TESTS_STR "Basic Tests"
+#define BO_TESTS_STR "BO Tests"
+#define CS_TESTS_STR "CS Tests"
+#define VCE_TESTS_STR "VCE Tests"
+#define VCN_TESTS_STR "VCN Tests"
+#define UVD_ENC_TESTS_STR "UVD ENC Tests"
+#define DEADLOCK_TESTS_STR "Deadlock Tests"
+#define VM_TESTS_STR "VM Tests"
+
 /**
  *  Open handles for amdgpu devices
  *
@@ -62,49 +72,49 @@ int open_render_node = 0;	/* By default run most tests on primary node */
 /** The table of all known test suites to run */
 static CU_SuiteInfo suites[] = {
 	{
-		.pName = "Basic Tests",
+		.pName = BASIC_TESTS_STR,
 		.pInitFunc = suite_basic_tests_init,
 		.pCleanupFunc = suite_basic_tests_clean,
 		.pTests = basic_tests,
 	},
 	{
-		.pName = "BO Tests",
+		.pName = BO_TESTS_STR,
 		.pInitFunc = suite_bo_tests_init,
 		.pCleanupFunc = suite_bo_tests_clean,
 		.pTests = bo_tests,
 	},
 	{
-		.pName = "CS Tests",
+		.pName = CS_TESTS_STR,
 		.pInitFunc = suite_cs_tests_init,
 		.pCleanupFunc = suite_cs_tests_clean,
 		.pTests = cs_tests,
 	},
 	{
-		.pName = "VCE Tests",
+		.pName = VCE_TESTS_STR,
 		.pInitFunc = suite_vce_tests_init,
 		.pCleanupFunc = suite_vce_tests_clean,
 		.pTests = vce_tests,
 	},
 	{
-		.pName = "VCN Tests",
+		.pName = VCN_TESTS_STR,
 		.pInitFunc = suite_vcn_tests_init,
 		.pCleanupFunc = suite_vcn_tests_clean,
 		.pTests = vcn_tests,
 	},
 	{
-		.pName = "UVD ENC Tests",
+		.pName = UVD_ENC_TESTS_STR,
 		.pInitFunc = suite_uvd_enc_tests_init,
 		.pCleanupFunc = suite_uvd_enc_tests_clean,
 		.pTests = uvd_enc_tests,
 	},
 	{
-		.pName = "Deadlock Tests",
+		.pName = DEADLOCK_TESTS_STR,
 		.pInitFunc = suite_deadlock_tests_init,
 		.pCleanupFunc = suite_deadlock_tests_clean,
 		.pTests = deadlock_tests,
 	},
 	{
-		.pName = "VM Tests",
+		.pName = VM_TESTS_STR,
 		.pInitFunc = suite_vm_tests_init,
 		.pCleanupFunc = suite_vm_tests_clean,
 		.pTests = vm_tests,
@@ -113,23 +123,99 @@ static CU_SuiteInfo suites[] = {
 	CU_SUITE_INFO_NULL,
 };
 
+typedef CU_BOOL (*active__stat_func)(void);
+
+typedef struct Suites_Active_Status {
+	char*             pName;
+	active__stat_func pActive;
+}Suites_Active_Status;
+
+static CU_BOOL always_active()
+{
+	return CU_TRUE;
+}
+
+static Suites_Active_Status suites_active_stat[] = {
+		{
+			.pName = BASIC_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = BO_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = CS_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = VCE_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = VCN_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = UVD_ENC_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = DEADLOCK_TESTS_STR,
+			.pActive = always_active,
+		},
+		{
+			.pName = VM_TESTS_STR,
+			.pActive = always_active,
+		},
+};
+
 
-/** Display information about all  suites and their tests */
+/*
+ * Display information about all  suites and their tests
+ *
+ * NOTE: Must be run after registry is initialized and suites registered.
+ */
 static void display_test_suites(void)
 {
 	int iSuite;
 	int iTest;
+	CU_pSuite pSuite = NULL;
+	CU_pTest  pTest  = NULL;
 
 	printf("Suites\n");
 
 	for (iSuite = 0; suites[iSuite].pName != NULL; iSuite++) {
-		printf("Suite id = %d: Name '%s'\n",
-				iSuite + 1, suites[iSuite].pName);
+
+		pSuite = CU_get_suite_by_index((unsigned int) iSuite + 1,
+						      CU_get_registry());
+
+		if (!pSuite) {
+			fprintf(stderr, "Invalid suite id : %d\n", iSuite + 1);
+			continue;
+		}
+
+		printf("Suite id = %d: Name '%s status: %s'\n",
+				iSuite + 1, suites[iSuite].pName,
+				pSuite->fActive ? "ENABLED" : "DISABLED");
+
+
 
 		for (iTest = 0; suites[iSuite].pTests[iTest].pName != NULL;
 			iTest++) {
-			printf("	Test id %d: Name: '%s'\n", iTest + 1,
-					suites[iSuite].pTests[iTest].pName);
+
+			pTest = CU_get_test_by_index((unsigned int) iTest + 1,
+									pSuite);
+
+			if (!pTest) {
+				fprintf(stderr, "Invalid test id : %d\n", iTest + 1);
+				continue;
+			}
+
+			printf("Test id %d: Name: '%s status: %s'\n", iTest + 1,
+					suites[iSuite].pTests[iTest].pName,
+					pSuite->fActive && pTest->fActive ?
+						     "ENABLED" : "DISABLED");
 		}
 	}
 }
@@ -137,7 +223,7 @@ static void display_test_suites(void)
 
 /** Help string for command line parameters */
 static const char usage[] =
-	"Usage: %s [-hlpr] [<-s <suite id>> [-t <test id>]] "
+	"Usage: %s [-hlpr] [<-s <suite id>> [-t <test id>] [-f]] "
 	"[-b <pci_bus_id> [-d <pci_device_id>]]\n"
 	"where:\n"
 	"       l - Display all suites and their tests\n"
@@ -145,9 +231,10 @@ static const char usage[] =
 	"       b - Specify device's PCI bus id to run tests\n"
 	"       d - Specify device's PCI device id to run tests (optional)\n"
 	"       p - Display information of AMDGPU devices in system\n"
+	"       f - Force executing inactive suite or test\n"
 	"       h - Display this help\n";
 /** Specified options strings for getopt */
-static const char options[]   = "hlrps:t:b:d:";
+static const char options[]   = "hlrps:t:b:d:f";
 
 /* Open AMD devices.
  * Return the number of AMD device openned.
@@ -312,6 +399,18 @@ static int amdgpu_find_device(uint8_t bus, uint16_t dev)
 	return -1;
 }
 
+static void amdgpu_disable_suits()
+{
+	int i;
+	int size = sizeof(suites_active_stat) / sizeof(suites_active_stat[0]);
+
+	/* Set active status for suits based on their policies */
+	for (i = 0; i < size; ++i)
+		if (amdgpu_set_suite_active(suites_active_stat[i].pName,
+				suites_active_stat[i].pActive()))
+			fprintf(stderr, "suit deactivation failed - %s\n", CU_get_error_msg());
+}
+
 /* The main() function for setting up and running the tests.
  * Returns a CUE_SUCCESS on successful running, another
  * CUnit error code on failure.
@@ -328,6 +427,8 @@ int main(int argc, char **argv)
 	CU_pSuite pSuite = NULL;
 	CU_pTest  pTest  = NULL;
 	int test_device_index;
+	int display_list = 0;
+	int force_run = 0;
 
 	for (i = 0; i < MAX_CARDS_SUPPORTED; i++)
 		drm_amdgpu[i] = -1;
@@ -338,8 +439,8 @@ int main(int argc, char **argv)
 	while ((c = getopt(argc, argv, options)) != -1) {
 		switch (c) {
 		case 'l':
-			display_test_suites();
-			exit(EXIT_SUCCESS);
+			display_list = 1;
+			break;
 		case 's':
 			suite_id = atoi(optarg);
 			break;
@@ -358,6 +459,9 @@ int main(int argc, char **argv)
 		case 'r':
 			open_render_node = 1;
 			break;
+		case 'f':
+			force_run = 1;
+			break;
 		case '?':
 		case 'h':
 			fprintf(stderr, usage, argv[0]);
@@ -423,17 +527,33 @@ int main(int argc, char **argv)
 	/* Run tests using the CUnit Basic interface */
 	CU_basic_set_mode(CU_BRM_VERBOSE);
 
+	/* Disable suits and individual tests based on misc. conditions */
+	amdgpu_disable_suits();
+
+	if (display_list) {
+		display_test_suites();
+		goto end;
+	}
+
 	if (suite_id != -1) {	/* If user specify particular suite? */
 		pSuite = CU_get_suite_by_index((unsigned int) suite_id,
 						CU_get_registry());
 
 		if (pSuite) {
+
+			if (force_run)
+				CU_set_suite_active(pSuite, CU_TRUE);
+
 			if (test_id != -1) {   /* If user specify test id */
 				pTest = CU_get_test_by_index(
 						(unsigned int) test_id,
 						pSuite);
-				if (pTest)
+				if (pTest) {
+					if (force_run)
+						CU_set_test_active(pTest, CU_TRUE);
+
 					CU_basic_run_test(pSuite, pTest);
+				}
 				else {
 					fprintf(stderr, "Invalid test id: %d\n",
 								test_id);
@@ -453,6 +573,7 @@ int main(int argc, char **argv)
 	} else
 		CU_basic_run_tests();
 
+end:
 	CU_cleanup_registry();
 	amdgpu_close_devices();
 	return CU_get_error();
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 4fffbc6..9ccc1ff 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -296,4 +296,35 @@ amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
 	return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list);
 }
 
+
+static inline CU_ErrorCode amdgpu_set_suite_active(const char *suit_name,
+							  CU_BOOL active)
+{
+	CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suit_name), active);
+
+	if (r != CUE_SUCCESS)
+		fprintf(stderr, "Failed to obtain suite %s\n", suit_name);
+
+	return r;
+}
+
+static inline CU_ErrorCode amdgpu_set_test_active(const char *suit_name,
+				  const char *test_name, CU_BOOL active)
+{
+	CU_ErrorCode r;
+	CU_pSuite pSuite = CU_get_suite(suit_name);
+
+	if (!pSuite) {
+		fprintf(stderr, "Failed to obtain suite %s\n",
+				suit_name);
+		return CUE_NOSUITE;
+	}
+
+	r = CU_set_test_active(CU_get_test(pSuite, test_name), active);
+	if (r != CUE_SUCCESS)
+		fprintf(stderr, "Failed to obtain test %s\n", test_name);
+
+	return r;
+}
+
 #endif  /* #ifdef _AMDGPU_TEST_H_ */
-- 
2.7.4

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[PATCH libdrm 3/4] amdgpu: Move memory alloc tests in bo suite.

[Andrey Grodzovsky]

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 tests/amdgpu/basic_tests.c | 49 ----------------------------------------------
 tests/amdgpu/bo_tests.c    | 49 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 18bcf91..e7f48e3 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -44,7 +44,6 @@ static  uint32_t  minor_version;
 static  uint32_t  family_id;
 
 static void amdgpu_query_info_test(void);
-static void amdgpu_memory_alloc(void);
 static void amdgpu_command_submission_gfx(void);
 static void amdgpu_command_submission_compute(void);
 static void amdgpu_command_submission_multi_fence(void);
@@ -58,7 +57,6 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
 
 CU_TestInfo basic_tests[] = {
 	{ "Query Info Test",  amdgpu_query_info_test },
-	{ "Memory alloc Test",  amdgpu_memory_alloc },
 	{ "Userptr Test",  amdgpu_userptr_test },
 	{ "Command submission Test (GFX)",  amdgpu_command_submission_gfx },
 	{ "Command submission Test (Compute)", amdgpu_command_submission_compute },
@@ -277,53 +275,6 @@ static void amdgpu_query_info_test(void)
 	CU_ASSERT_EQUAL(r, 0);
 }
 
-static void amdgpu_memory_alloc(void)
-{
-	amdgpu_bo_handle bo;
-	amdgpu_va_handle va_handle;
-	uint64_t bo_mc;
-	int r;
-
-	/* Test visible VRAM */
-	bo = gpu_mem_alloc(device_handle,
-			4096, 4096,
-			AMDGPU_GEM_DOMAIN_VRAM,
-			AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
-			&bo_mc, &va_handle);
-
-	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
-	CU_ASSERT_EQUAL(r, 0);
-
-	/* Test invisible VRAM */
-	bo = gpu_mem_alloc(device_handle,
-			4096, 4096,
-			AMDGPU_GEM_DOMAIN_VRAM,
-			AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
-			&bo_mc, &va_handle);
-
-	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
-	CU_ASSERT_EQUAL(r, 0);
-
-	/* Test GART Cacheable */
-	bo = gpu_mem_alloc(device_handle,
-			4096, 4096,
-			AMDGPU_GEM_DOMAIN_GTT,
-			0, &bo_mc, &va_handle);
-
-	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
-	CU_ASSERT_EQUAL(r, 0);
-
-	/* Test GART USWC */
-	bo = gpu_mem_alloc(device_handle,
-			4096, 4096,
-			AMDGPU_GEM_DOMAIN_GTT,
-			AMDGPU_GEM_CREATE_CPU_GTT_USWC,
-			&bo_mc, &va_handle);
-
-	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
-	CU_ASSERT_EQUAL(r, 0);
-}
-
 static void amdgpu_command_submission_gfx_separate_ibs(void)
 {
 	amdgpu_context_handle context_handle;
diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
index 74b5e77..4545196 100644
--- a/tests/amdgpu/bo_tests.c
+++ b/tests/amdgpu/bo_tests.c
@@ -46,6 +46,7 @@ static amdgpu_va_handle va_handle;
 static void amdgpu_bo_export_import(void);
 static void amdgpu_bo_metadata(void);
 static void amdgpu_bo_map_unmap(void);
+static void amdgpu_memory_alloc(void);
 
 CU_TestInfo bo_tests[] = {
 	{ "Export/Import",  amdgpu_bo_export_import },
@@ -53,6 +54,7 @@ CU_TestInfo bo_tests[] = {
 	{ "Metadata",  amdgpu_bo_metadata },
 #endif
 	{ "CPU map/unmap",  amdgpu_bo_map_unmap },
+	{ "Memory alloc Test",  amdgpu_memory_alloc },
 	CU_TEST_INFO_NULL,
 };
 
@@ -195,3 +197,50 @@ static void amdgpu_bo_map_unmap(void)
 	r = amdgpu_bo_cpu_unmap(buffer_handle);
 	CU_ASSERT_EQUAL(r, 0);
 }
+
+static void amdgpu_memory_alloc(void)
+{
+	amdgpu_bo_handle bo;
+	amdgpu_va_handle va_handle;
+	uint64_t bo_mc;
+	int r;
+
+	/* Test visible VRAM */
+	bo = gpu_mem_alloc(device_handle,
+			4096, 4096,
+			AMDGPU_GEM_DOMAIN_VRAM,
+			AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+			&bo_mc, &va_handle);
+
+	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+	CU_ASSERT_EQUAL(r, 0);
+
+	/* Test invisible VRAM */
+	bo = gpu_mem_alloc(device_handle,
+			4096, 4096,
+			AMDGPU_GEM_DOMAIN_VRAM,
+			AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
+			&bo_mc, &va_handle);
+
+	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+	CU_ASSERT_EQUAL(r, 0);
+
+	/* Test GART Cacheable */
+	bo = gpu_mem_alloc(device_handle,
+			4096, 4096,
+			AMDGPU_GEM_DOMAIN_GTT,
+			0, &bo_mc, &va_handle);
+
+	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+	CU_ASSERT_EQUAL(r, 0);
+
+	/* Test GART USWC */
+	bo = gpu_mem_alloc(device_handle,
+			4096, 4096,
+			AMDGPU_GEM_DOMAIN_GTT,
+			AMDGPU_GEM_CREATE_CPU_GTT_USWC,
+			&bo_mc, &va_handle);
+
+	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+	CU_ASSERT_EQUAL(r, 0);
+}
-- 
2.7.4

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[PATCH libdrm 4/4] amdgpu: Add memory over allocation test.

[Andrey Grodzovsky]

Allocates 1 TB of memory. Test is disabled by default
since it's triggers OOM killer.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 tests/amdgpu/amdgpu_test.c |  4 ++++
 tests/amdgpu/bo_tests.c    | 20 ++++++++++++++++++++
 2 files changed, 24 insertions(+)

diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 91010dc..3b10f82 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -417,6 +417,10 @@ static void amdgpu_disable_suits()
 	*/
 	if (amdgpu_set_test_active(DEADLOCK_TESTS_STR, "compute ring block test", CU_FALSE))
 		fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());
+
+	/* This test triggers OOM killer terminating the tester itself */
+	if (amdgpu_set_test_active(BO_TESTS_STR, "Memory fail alloc Test", CU_FALSE))
+			fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());
 }
 
 /* The main() function for setting up and running the tests.
diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
index 4545196..c6d89aa 100644
--- a/tests/amdgpu/bo_tests.c
+++ b/tests/amdgpu/bo_tests.c
@@ -47,6 +47,7 @@ static void amdgpu_bo_export_import(void);
 static void amdgpu_bo_metadata(void);
 static void amdgpu_bo_map_unmap(void);
 static void amdgpu_memory_alloc(void);
+static void amdgpu_memory_fail_alloc(void);
 
 CU_TestInfo bo_tests[] = {
 	{ "Export/Import",  amdgpu_bo_export_import },
@@ -55,6 +56,7 @@ CU_TestInfo bo_tests[] = {
 #endif
 	{ "CPU map/unmap",  amdgpu_bo_map_unmap },
 	{ "Memory alloc Test",  amdgpu_memory_alloc },
+	{ "Memory fail alloc Test",  amdgpu_memory_fail_alloc },
 	CU_TEST_INFO_NULL,
 };
 
@@ -244,3 +246,21 @@ static void amdgpu_memory_alloc(void)
 	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
 	CU_ASSERT_EQUAL(r, 0);
 }
+
+static void amdgpu_memory_fail_alloc(void)
+{
+	amdgpu_bo_handle bo;
+	amdgpu_va_handle va_handle;
+	uint64_t bo_mc;
+	int r;
+
+	/* Test impossible mem allocation, 1TB */
+	bo = gpu_mem_alloc(device_handle, 0xE8D4A51000, 4096,
+			AMDGPU_GEM_DOMAIN_VRAM,
+			AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
+	&bo_mc, &va_handle);
+
+	r = gpu_mem_free(bo, va_handle, bo_mc, 0xE8D4A51000);
+	CU_ASSERT_EQUAL(r, 0);
+}
+
-- 
2.7.4

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Christian König]

Series is Acked-by: Christian König <christian.koenig@amd.com>.

Please note that I think your OOM killer test shows quite a bug we 
currently have in the kernel driver.

A single allocation of 1TB shouldn't trigger the OOM killer, but rather 
be reacted immediately.

Instead I expected that we need to do multiple 1GB allocations to 
trigger the next problem that our TTM code doesn't imply a global limit.

Regards,
Christian.

Am 10.11.2017 um 05:29 schrieb Andrey Grodzovsky:
> THe following  patch series intoroduce  dynamic tests dusabling/enabling
> in amdgpu  tester using Cunit API. Today test suits that
> don't apply to specific HW just return success w/o executing while
> single tests that can't be executed properly are commented out.
>
> Suits are diasbled based on hooks they provide (e.g incompatible
> ASIC or missing blocks) while single tests are diasbled explicitly since this is
> usually due to some bug preventing from the tester  or the system  to handle
> the test w/o crashing or killing the tester.
>
> Inside this series also a minor cleanup and new test for memory over allocation.
>
> Andrey Grodzovsky (4):
>    amdgpu: Add functions to disable suites and tests.
>    amdgpu: Use new suite/test disabling functionality.
>    amdgpu: Move memory alloc tests in bo suite.
>    amdgpu: Add memory over allocation test.
>
>   tests/amdgpu/amdgpu_test.c    | 169 +++++++++++++++++++++++++++++++++++++-----
>   tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
>   tests/amdgpu/basic_tests.c    |  49 ------------
>   tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
>   tests/amdgpu/deadlock_tests.c |   8 +-
>   tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
>   tests/amdgpu/vce_tests.c      |  65 ++++++++--------
>   tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
>   8 files changed, 363 insertions(+), 198 deletions(-)
>

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Christian König]

Am 10.11.2017 um 13:17 schrieb Christian König:
> Series is Acked-by: Christian König <christian.koenig@amd.com>.
>
> Please note that I think your OOM killer test shows quite a bug we 
> currently have in the kernel driver.
>
> A single allocation of 1TB shouldn't trigger the OOM killer, but 
> rather be reacted immediately.

Typo: "rejected immediately".

Christian.

>
> Instead I expected that we need to do multiple 1GB allocations to 
> trigger the next problem that our TTM code doesn't imply a global limit.
>
> Regards,
> Christian.
>
> Am 10.11.2017 um 05:29 schrieb Andrey Grodzovsky:
>> THe following  patch series intoroduce dynamic tests dusabling/enabling
>> in amdgpu  tester using Cunit API. Today test suits that
>> don't apply to specific HW just return success w/o executing while
>> single tests that can't be executed properly are commented out.
>>
>> Suits are diasbled based on hooks they provide (e.g incompatible
>> ASIC or missing blocks) while single tests are diasbled explicitly 
>> since this is
>> usually due to some bug preventing from the tester  or the system  to 
>> handle
>> the test w/o crashing or killing the tester.
>>
>> Inside this series also a minor cleanup and new test for memory over 
>> allocation.
>>
>> Andrey Grodzovsky (4):
>>    amdgpu: Add functions to disable suites and tests.
>>    amdgpu: Use new suite/test disabling functionality.
>>    amdgpu: Move memory alloc tests in bo suite.
>>    amdgpu: Add memory over allocation test.
>>
>>   tests/amdgpu/amdgpu_test.c    | 169 
>> +++++++++++++++++++++++++++++++++++++-----
>>   tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
>>   tests/amdgpu/basic_tests.c    |  49 ------------
>>   tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
>>   tests/amdgpu/deadlock_tests.c |   8 +-
>>   tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
>>   tests/amdgpu/vce_tests.c      |  65 ++++++++--------
>>   tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
>>   8 files changed, 363 insertions(+), 198 deletions(-)
>>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel


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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Andrey Grodzovsky]

On 11/10/2017 07:17 AM, Christian König wrote:
> Series is Acked-by: Christian König <christian.koenig@amd.com>.
>
> Please note that I think your OOM killer test shows quite a bug we 
> currently have in the kernel driver.
>
> A single allocation of 1TB shouldn't trigger the OOM killer, but 
> rather be reacted immediately.

Maybe we should add a second test which does incremental 1GB allocations 
but still keep this tests ? With this test  i get a callstack as bellow 
+ crash of the test suite
with general protection fault - As normal behavior I would have expected 
just some errno returning from the amdgpu_bo_alloc which we could check 
in the test.

Thanks,
Andrey

[169053.128981 <72032.811683>] ------------[ cut here ]------------
[169053.129006 <    0.000025>] WARNING: CPU: 0 PID: 22883 at 
mm/page_alloc.c:3883 __alloc_pages_slowpath+0xf03/0x14e0
[169053.129007 <    0.000001>] Modules linked in: amdgpu chash ttm 
drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect 
sysimgblt edac_mce_amd kvm_amd kvm irqbypass crct10dif_pclmul 
crc32_pclmul snd_hda_codec_realtek ghash_clmulni_intel 
snd_hda_codec_generic pcbc snd_hda_codec_hdmi snd_hda_intel aesni_intel 
snd_hda_codec aes_x86_64 snd_hda_core crypto_simd glue_helper snd_hwdep 
rfkill_gpio cryptd snd_pcm snd_seq_midi snd_seq_midi_event serio_raw 
snd_rawmidi snd_seq cdc_ether usbnet snd_seq_device joydev fam15h_power 
k10temp r8152 snd_timer mii i2c_piix4 rtsx_pci_ms snd memstick soundcore 
shpchp 8250_dw i2c_designware_platform i2c_designware_core mac_hid 
binfmt_misc nfsd auth_rpcgss nfs_acl lockd grace sunrpc parport_pc ppdev 
lp parport autofs4 rtsx_pci_sdmmc psmouse rtsx_pci sdhci_pci ahci sdhci 
libahci
[169053.129084 <    0.000077>]  video i2c_hid hid_generic usbhid hid
[169053.129096 <    0.000012>] CPU: 0 PID: 22883 Comm: lt-amdgpu_test 
Tainted: G        W       4.14.0-rc3+ #1
[169053.129097 <    0.000001>] Hardware name: AMD Gardenia/Gardenia, 
BIOS RGA1101C 07/20/2015
[169053.129099 <    0.000002>] task: ffff880048803d80 task.stack: 
ffff880064688000
[169053.129103 <    0.000004>] RIP: 0010:__alloc_pages_slowpath+0xf03/0x14e0
[169053.129105 <    0.000002>] RSP: 0018:ffff88006468f108 EFLAGS: 00010246
[169053.129108 <    0.000003>] RAX: 0000000000000000 RBX: 
00000000014000c0 RCX: ffffffff81279065
[169053.129109 <    0.000001>] RDX: dffffc0000000000 RSI: 
000000000000000f RDI: ffffffff82609000
[169053.129111 <    0.000002>] RBP: ffff88006468f328 R08: 
0000000000000000 R09: ffffffffffff8576
[169053.129113 <    0.000002>] R10: 000000005c2044e7 R11: 
0000000000000000 R12: ffff88006468f3d8
[169053.129114 <    0.000001>] R13: ffff880048803d80 R14: 
000000000140c0c0 R15: 000000000000000f
[169053.129117 <    0.000003>] FS:  00007f707863b700(0000) 
GS:ffff88006ce00000(0000) knlGS:0000000000000000
[169053.129119 <    0.000002>] CS:  0010 DS: 0000 ES: 0000 CR0: 
0000000080050033
[169053.129120 <    0.000001>] CR2: 0000000001250000 CR3: 
00000000644cf000 CR4: 00000000001406f0
[169053.129122 <    0.000002>] Call Trace:
[169053.129131 <    0.000009>]  ? __module_address+0x145/0x190
[169053.129135 <    0.000004>]  ? is_bpf_text_address+0xe/0x20
[169053.129140 <    0.000005>]  ? __kernel_text_address+0x12/0x40
[169053.129144 <    0.000004>]  ? unwind_get_return_address+0x36/0x50
[169053.129150 <    0.000006>]  ? memcmp+0x5b/0x90
[169053.129152 <    0.000002>]  ? warn_alloc+0x250/0x250
[169053.129156 <    0.000004>]  ? get_page_from_freelist+0x147/0x10f0
[169053.129160 <    0.000004>]  ? save_stack_trace+0x1b/0x20
[169053.129164 <    0.000004>]  ? kasan_kmalloc+0xad/0xe0
[169053.129186 <    0.000022>]  ? ttm_bo_mem_space+0x79/0x6b0 [ttm]
[169053.129196 <    0.000010>]  ? ttm_bo_validate+0x178/0x220 [ttm]
[169053.129200 <    0.000004>] __alloc_pages_nodemask+0x3c4/0x400
[169053.129203 <    0.000003>]  ? __alloc_pages_slowpath+0x14e0/0x14e0
[169053.129205 <    0.000002>]  ? __save_stack_trace+0x66/0xd0
[169053.129209 <    0.000004>]  ? rb_insert_color+0x32/0x3e0
[169053.129213 <    0.000004>]  ? do_syscall_64+0xea/0x280
[169053.129217 <    0.000004>]  alloc_pages_current+0x75/0x110
[169053.129221 <    0.000004>]  kmalloc_order+0x1f/0x80
[169053.129223 <    0.000002>]  kmalloc_order_trace+0x24/0xa0
[169053.129226 <    0.000003>]  __kmalloc+0x264/0x280
[169053.129383 <    0.000157>] amdgpu_vram_mgr_new+0x11b/0x3b0 [amdgpu]
[169053.129391 <    0.000008>]  ? 
reservation_object_reserve_shared+0x64/0xf0
[169053.129401 <    0.000010>]  ttm_bo_mem_space+0x196/0x6b0 [ttm]
[169053.129478 <    0.000077>]  ? add_hole+0x20a/0x220 [drm]
[169053.129489 <    0.000011>]  ttm_bo_validate+0x178/0x220 [ttm]
[169053.129498 <    0.000009>]  ? ttm_bo_evict_mm+0x70/0x70 [ttm]
[169053.129508 <    0.000010>]  ? ttm_check_swapping+0xf6/0x110 [ttm]
[169053.129541 <    0.000033>]  ? drm_vma_offset_add+0x5b/0x80 [drm]
[169053.129572 <    0.000031>]  ? drm_vma_offset_add+0x68/0x80 [drm]
[169053.129584 <    0.000012>] ttm_bo_init_reserved+0x546/0x630 [ttm]
[169053.129716 <    0.000132>] amdgpu_bo_do_create+0x28b/0x630 [amdgpu]
[169053.129816 <    0.000100>]  ? amdgpu_fill_buffer+0x580/0x580 [amdgpu]
[169053.129952 <    0.000136>]  ? 
amdgpu_ttm_placement_from_domain+0x320/0x320 [amdgpu]
[169053.129956 <    0.000004>]  ? try_to_wake_up+0xbe/0x720
[169053.130054 <    0.000098>]  amdgpu_bo_create+0x85/0x400 [amdgpu]
[169053.130153 <    0.000099>]  ? amdgpu_bo_do_create+0x630/0x630 [amdgpu]
[169053.130155 <    0.000002>]  ? wake_up_process+0x15/0x20
[169053.130158 <    0.000003>]  ? insert_work+0xf3/0x110
[169053.130257 <    0.000099>] amdgpu_gem_object_create+0x101/0x190 [amdgpu]
[169053.130356 <    0.000099>]  ? amdgpu_gem_object_free+0xe0/0xe0 [amdgpu]
[169053.130360 <    0.000004>]  ? 
tty_insert_flip_string_fixed_flag+0xab/0x110
[169053.130468 <    0.000108>] amdgpu_gem_create_ioctl+0x364/0x460 [amdgpu]
[169053.130695 <    0.000227>]  ? amdgpu_gem_object_close+0x320/0x320 
[amdgpu]
[169053.130767 <    0.000072>]  ? drm_dev_printk+0x120/0x120 [drm]
[169053.130840 <    0.000073>]  ? __wake_up_common_lock+0xe9/0x170
[169053.130989 <    0.000149>]  ? amdgpu_gem_object_close+0x320/0x320 
[amdgpu]
[169053.131061 <    0.000072>]  drm_ioctl_kernel+0xae/0xf0 [drm]
[169053.131115 <    0.000054>]  drm_ioctl+0x466/0x520 [drm]
[169053.131238 <    0.000123>]  ? amdgpu_gem_object_close+0x320/0x320 
[amdgpu]
[169053.131291 <    0.000053>]  ? drm_getunique+0xf0/0xf0 [drm]
[169053.131426 <    0.000135>]  amdgpu_drm_ioctl+0x78/0xd0 [amdgpu]
[169053.131451 <    0.000025>]  do_vfs_ioctl+0x12e/0x860
[169053.131466 <    0.000015>]  ? apparmor_file_permission+0x1a/0x20
[169053.131489 <    0.000023>]  ? ioctl_preallocate+0x130/0x130
[169053.131503 <    0.000014>]  ? rw_verify_area+0x78/0x140
[169053.131520 <    0.000017>]  ? vfs_write+0x1a2/0x260
[169053.131544 <    0.000024>]  ? syscall_trace_enter+0x1fd/0x520
[169053.131568 <    0.000024>]  ? sched_clock+0x9/0x10
[169053.131584 <    0.000016>]  ? exit_to_usermode_loop+0xc0/0xc0
[169053.131607 <    0.000023>]  ? __fget_light+0xa7/0xc0
[169053.131631 <    0.000024>]  SyS_ioctl+0x79/0x90
[169053.131651 <    0.000020>]  ? __context_tracking_exit.part.4+0x53/0xc0
[169053.131672 <    0.000021>]  ? do_vfs_ioctl+0x860/0x860
[169053.131683 <    0.000011>]  do_syscall_64+0xea/0x280
[169053.131708 <    0.000025>] entry_SYSCALL64_slow_path+0x25/0x25
[169053.131720 <    0.000012>] RIP: 0033:0x7f70778eef07
[169053.131740 <    0.000020>] RSP: 002b:00007ffc509d13d8 EFLAGS: 
00000202 ORIG_RAX: 0000000000000010
[169053.131756 <    0.000016>] RAX: ffffffffffffffda RBX: 
000000000000001e RCX: 00007f70778eef07
[169053.131778 <    0.000022>] RDX: 00007ffc509d1490 RSI: 
00000000c0206440 RDI: 0000000000000004
[169053.131798 <    0.000020>] RBP: 00007ffc509d1410 R08: 
000000000124c660 R09: 0000000000000000
[169053.131815 <    0.000017>] R10: 000000000000006e R11: 
0000000000000202 R12: 000000000124b530
[169053.131835 <    0.000020>] R13: 00007ffc509d1800 R14: 
0000000000000000 R15: 0000000000000000
[169053.131854 <    0.000019>] Code: 89 85 c8 fe ff ff e9 5d fc ff ff 8d 
42 ff 45 31 f6 c6 85 d0 fe ff ff 01 89 85 c8 fe ff ff e9 45 fc ff ff 41 
89 c5 e9 10 fc ff ff <0f> ff e9 ba f1 ff ff 0f ff 89 d8 25 ff ff f7 ff 
89 85 8c fe ff
[169053.131933 <    0.000079>] ---[ end trace 8253dc1e92579724 ]---
[169053.132622 <    0.000689>] [drm:amdgpu_gem_object_create [amdgpu]] 
*ERROR* Failed to allocate GEM object (1000000000000, 6, 4096, -12)
[169053.132877 <    0.000255>] traps: lt-amdgpu_test[22883] general 
protection ip:7f7077ff6007 sp:7ffc509d13e0 error:0 in 
libdrm_amdgpu.so.1.0.0[7f7077ff2000+b000]


>
> Instead I expected that we need to do multiple 1GB allocations to 
> trigger the next problem that our TTM code doesn't imply a global limit.
>
> Regards,
> Christian.
>
> Am 10.11.2017 um 05:29 schrieb Andrey Grodzovsky:
>> THe following  patch series intoroduce dynamic tests dusabling/enabling
>> in amdgpu  tester using Cunit API. Today test suits that
>> don't apply to specific HW just return success w/o executing while
>> single tests that can't be executed properly are commented out.
>>
>> Suits are diasbled based on hooks they provide (e.g incompatible
>> ASIC or missing blocks) while single tests are diasbled explicitly 
>> since this is
>> usually due to some bug preventing from the tester  or the system  to 
>> handle
>> the test w/o crashing or killing the tester.
>>
>> Inside this series also a minor cleanup and new test for memory over 
>> allocation.
>>
>> Andrey Grodzovsky (4):
>>    amdgpu: Add functions to disable suites and tests.
>>    amdgpu: Use new suite/test disabling functionality.
>>    amdgpu: Move memory alloc tests in bo suite.
>>    amdgpu: Add memory over allocation test.
>>
>>   tests/amdgpu/amdgpu_test.c    | 169 
>> +++++++++++++++++++++++++++++++++++++-----
>>   tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
>>   tests/amdgpu/basic_tests.c    |  49 ------------
>>   tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
>>   tests/amdgpu/deadlock_tests.c |   8 +-
>>   tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
>>   tests/amdgpu/vce_tests.c      |  65 ++++++++--------
>>   tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
>>   8 files changed, 363 insertions(+), 198 deletions(-)
>>
>

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Christian König]

Am 10.11.2017 um 16:36 schrieb Andrey Grodzovsky:
>
>
> On 11/10/2017 07:17 AM, Christian König wrote:
>> Series is Acked-by: Christian König <christian.koenig@amd.com>.
>>
>> Please note that I think your OOM killer test shows quite a bug we 
>> currently have in the kernel driver.
>>
>> A single allocation of 1TB shouldn't trigger the OOM killer, but 
>> rather be reacted immediately.
>
> Maybe we should add a second test which does incremental 1GB 
> allocations but still keep this tests ? With this test  i get a 
> callstack as bellow + crash of the test suite
> with general protection fault - As normal behavior I would have 
> expected just some errno returning from the amdgpu_bo_alloc which we 
> could check in the test.

Yeah, totally agree. And when this works correctly we should really 
enable this test case by default as well.

When I implemented scattered eviction I completely removed the check 
which limited the BO size. That was probably a bit to extreme.

We still need to check the size here so that we don't create a BO larger 
than what makes sense for the domain it should be stored in.

Regards,
Christian.

>
> Thanks,
> Andrey
>
> [169053.128981 <72032.811683>] ------------[ cut here ]------------
> [169053.129006 <    0.000025>] WARNING: CPU: 0 PID: 22883 at 
> mm/page_alloc.c:3883 __alloc_pages_slowpath+0xf03/0x14e0
> [169053.129007 <    0.000001>] Modules linked in: amdgpu chash ttm 
> drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect 
> sysimgblt edac_mce_amd kvm_amd kvm irqbypass crct10dif_pclmul 
> crc32_pclmul snd_hda_codec_realtek ghash_clmulni_intel 
> snd_hda_codec_generic pcbc snd_hda_codec_hdmi snd_hda_intel 
> aesni_intel snd_hda_codec aes_x86_64 snd_hda_core crypto_simd 
> glue_helper snd_hwdep rfkill_gpio cryptd snd_pcm snd_seq_midi 
> snd_seq_midi_event serio_raw snd_rawmidi snd_seq cdc_ether usbnet 
> snd_seq_device joydev fam15h_power k10temp r8152 snd_timer mii 
> i2c_piix4 rtsx_pci_ms snd memstick soundcore shpchp 8250_dw 
> i2c_designware_platform i2c_designware_core mac_hid binfmt_misc nfsd 
> auth_rpcgss nfs_acl lockd grace sunrpc parport_pc ppdev lp parport 
> autofs4 rtsx_pci_sdmmc psmouse rtsx_pci sdhci_pci ahci sdhci libahci
> [169053.129084 <    0.000077>]  video i2c_hid hid_generic usbhid hid
> [169053.129096 <    0.000012>] CPU: 0 PID: 22883 Comm: lt-amdgpu_test 
> Tainted: G        W       4.14.0-rc3+ #1
> [169053.129097 <    0.000001>] Hardware name: AMD Gardenia/Gardenia, 
> BIOS RGA1101C 07/20/2015
> [169053.129099 <    0.000002>] task: ffff880048803d80 task.stack: 
> ffff880064688000
> [169053.129103 <    0.000004>] RIP: 
> 0010:__alloc_pages_slowpath+0xf03/0x14e0
> [169053.129105 <    0.000002>] RSP: 0018:ffff88006468f108 EFLAGS: 
> 00010246
> [169053.129108 <    0.000003>] RAX: 0000000000000000 RBX: 
> 00000000014000c0 RCX: ffffffff81279065
> [169053.129109 <    0.000001>] RDX: dffffc0000000000 RSI: 
> 000000000000000f RDI: ffffffff82609000
> [169053.129111 <    0.000002>] RBP: ffff88006468f328 R08: 
> 0000000000000000 R09: ffffffffffff8576
> [169053.129113 <    0.000002>] R10: 000000005c2044e7 R11: 
> 0000000000000000 R12: ffff88006468f3d8
> [169053.129114 <    0.000001>] R13: ffff880048803d80 R14: 
> 000000000140c0c0 R15: 000000000000000f
> [169053.129117 <    0.000003>] FS:  00007f707863b700(0000) 
> GS:ffff88006ce00000(0000) knlGS:0000000000000000
> [169053.129119 <    0.000002>] CS:  0010 DS: 0000 ES: 0000 CR0: 
> 0000000080050033
> [169053.129120 <    0.000001>] CR2: 0000000001250000 CR3: 
> 00000000644cf000 CR4: 00000000001406f0
> [169053.129122 <    0.000002>] Call Trace:
> [169053.129131 <    0.000009>]  ? __module_address+0x145/0x190
> [169053.129135 <    0.000004>]  ? is_bpf_text_address+0xe/0x20
> [169053.129140 <    0.000005>]  ? __kernel_text_address+0x12/0x40
> [169053.129144 <    0.000004>]  ? unwind_get_return_address+0x36/0x50
> [169053.129150 <    0.000006>]  ? memcmp+0x5b/0x90
> [169053.129152 <    0.000002>]  ? warn_alloc+0x250/0x250
> [169053.129156 <    0.000004>]  ? get_page_from_freelist+0x147/0x10f0
> [169053.129160 <    0.000004>]  ? save_stack_trace+0x1b/0x20
> [169053.129164 <    0.000004>]  ? kasan_kmalloc+0xad/0xe0
> [169053.129186 <    0.000022>]  ? ttm_bo_mem_space+0x79/0x6b0 [ttm]
> [169053.129196 <    0.000010>]  ? ttm_bo_validate+0x178/0x220 [ttm]
> [169053.129200 <    0.000004>] __alloc_pages_nodemask+0x3c4/0x400
> [169053.129203 <    0.000003>]  ? __alloc_pages_slowpath+0x14e0/0x14e0
> [169053.129205 <    0.000002>]  ? __save_stack_trace+0x66/0xd0
> [169053.129209 <    0.000004>]  ? rb_insert_color+0x32/0x3e0
> [169053.129213 <    0.000004>]  ? do_syscall_64+0xea/0x280
> [169053.129217 <    0.000004>] alloc_pages_current+0x75/0x110
> [169053.129221 <    0.000004>]  kmalloc_order+0x1f/0x80
> [169053.129223 <    0.000002>] kmalloc_order_trace+0x24/0xa0
> [169053.129226 <    0.000003>]  __kmalloc+0x264/0x280
> [169053.129383 <    0.000157>] amdgpu_vram_mgr_new+0x11b/0x3b0 [amdgpu]
> [169053.129391 <    0.000008>]  ? 
> reservation_object_reserve_shared+0x64/0xf0
> [169053.129401 <    0.000010>]  ttm_bo_mem_space+0x196/0x6b0 [ttm]
> [169053.129478 <    0.000077>]  ? add_hole+0x20a/0x220 [drm]
> [169053.129489 <    0.000011>]  ttm_bo_validate+0x178/0x220 [ttm]
> [169053.129498 <    0.000009>]  ? ttm_bo_evict_mm+0x70/0x70 [ttm]
> [169053.129508 <    0.000010>]  ? ttm_check_swapping+0xf6/0x110 [ttm]
> [169053.129541 <    0.000033>]  ? drm_vma_offset_add+0x5b/0x80 [drm]
> [169053.129572 <    0.000031>]  ? drm_vma_offset_add+0x68/0x80 [drm]
> [169053.129584 <    0.000012>] ttm_bo_init_reserved+0x546/0x630 [ttm]
> [169053.129716 <    0.000132>] amdgpu_bo_do_create+0x28b/0x630 [amdgpu]
> [169053.129816 <    0.000100>]  ? amdgpu_fill_buffer+0x580/0x580 [amdgpu]
> [169053.129952 <    0.000136>]  ? 
> amdgpu_ttm_placement_from_domain+0x320/0x320 [amdgpu]
> [169053.129956 <    0.000004>]  ? try_to_wake_up+0xbe/0x720
> [169053.130054 <    0.000098>]  amdgpu_bo_create+0x85/0x400 [amdgpu]
> [169053.130153 <    0.000099>]  ? amdgpu_bo_do_create+0x630/0x630 
> [amdgpu]
> [169053.130155 <    0.000002>]  ? wake_up_process+0x15/0x20
> [169053.130158 <    0.000003>]  ? insert_work+0xf3/0x110
> [169053.130257 <    0.000099>] amdgpu_gem_object_create+0x101/0x190 
> [amdgpu]
> [169053.130356 <    0.000099>]  ? amdgpu_gem_object_free+0xe0/0xe0 
> [amdgpu]
> [169053.130360 <    0.000004>]  ? 
> tty_insert_flip_string_fixed_flag+0xab/0x110
> [169053.130468 <    0.000108>] amdgpu_gem_create_ioctl+0x364/0x460 
> [amdgpu]
> [169053.130695 <    0.000227>]  ? amdgpu_gem_object_close+0x320/0x320 
> [amdgpu]
> [169053.130767 <    0.000072>]  ? drm_dev_printk+0x120/0x120 [drm]
> [169053.130840 <    0.000073>]  ? __wake_up_common_lock+0xe9/0x170
> [169053.130989 <    0.000149>]  ? amdgpu_gem_object_close+0x320/0x320 
> [amdgpu]
> [169053.131061 <    0.000072>]  drm_ioctl_kernel+0xae/0xf0 [drm]
> [169053.131115 <    0.000054>]  drm_ioctl+0x466/0x520 [drm]
> [169053.131238 <    0.000123>]  ? amdgpu_gem_object_close+0x320/0x320 
> [amdgpu]
> [169053.131291 <    0.000053>]  ? drm_getunique+0xf0/0xf0 [drm]
> [169053.131426 <    0.000135>]  amdgpu_drm_ioctl+0x78/0xd0 [amdgpu]
> [169053.131451 <    0.000025>]  do_vfs_ioctl+0x12e/0x860
> [169053.131466 <    0.000015>]  ? apparmor_file_permission+0x1a/0x20
> [169053.131489 <    0.000023>]  ? ioctl_preallocate+0x130/0x130
> [169053.131503 <    0.000014>]  ? rw_verify_area+0x78/0x140
> [169053.131520 <    0.000017>]  ? vfs_write+0x1a2/0x260
> [169053.131544 <    0.000024>]  ? syscall_trace_enter+0x1fd/0x520
> [169053.131568 <    0.000024>]  ? sched_clock+0x9/0x10
> [169053.131584 <    0.000016>]  ? exit_to_usermode_loop+0xc0/0xc0
> [169053.131607 <    0.000023>]  ? __fget_light+0xa7/0xc0
> [169053.131631 <    0.000024>]  SyS_ioctl+0x79/0x90
> [169053.131651 <    0.000020>]  ? 
> __context_tracking_exit.part.4+0x53/0xc0
> [169053.131672 <    0.000021>]  ? do_vfs_ioctl+0x860/0x860
> [169053.131683 <    0.000011>]  do_syscall_64+0xea/0x280
> [169053.131708 <    0.000025>] entry_SYSCALL64_slow_path+0x25/0x25
> [169053.131720 <    0.000012>] RIP: 0033:0x7f70778eef07
> [169053.131740 <    0.000020>] RSP: 002b:00007ffc509d13d8 EFLAGS: 
> 00000202 ORIG_RAX: 0000000000000010
> [169053.131756 <    0.000016>] RAX: ffffffffffffffda RBX: 
> 000000000000001e RCX: 00007f70778eef07
> [169053.131778 <    0.000022>] RDX: 00007ffc509d1490 RSI: 
> 00000000c0206440 RDI: 0000000000000004
> [169053.131798 <    0.000020>] RBP: 00007ffc509d1410 R08: 
> 000000000124c660 R09: 0000000000000000
> [169053.131815 <    0.000017>] R10: 000000000000006e R11: 
> 0000000000000202 R12: 000000000124b530
> [169053.131835 <    0.000020>] R13: 00007ffc509d1800 R14: 
> 0000000000000000 R15: 0000000000000000
> [169053.131854 <    0.000019>] Code: 89 85 c8 fe ff ff e9 5d fc ff ff 
> 8d 42 ff 45 31 f6 c6 85 d0 fe ff ff 01 89 85 c8 fe ff ff e9 45 fc ff 
> ff 41 89 c5 e9 10 fc ff ff <0f> ff e9 ba f1 ff ff 0f ff 89 d8 25 ff ff 
> f7 ff 89 85 8c fe ff
> [169053.131933 <    0.000079>] ---[ end trace 8253dc1e92579724 ]---
> [169053.132622 <    0.000689>] [drm:amdgpu_gem_object_create [amdgpu]] 
> *ERROR* Failed to allocate GEM object (1000000000000, 6, 4096, -12)
> [169053.132877 <    0.000255>] traps: lt-amdgpu_test[22883] general 
> protection ip:7f7077ff6007 sp:7ffc509d13e0 error:0 in 
> libdrm_amdgpu.so.1.0.0[7f7077ff2000+b000]
>
>
>>
>> Instead I expected that we need to do multiple 1GB allocations to 
>> trigger the next problem that our TTM code doesn't imply a global limit.
>>
>> Regards,
>> Christian.
>>
>> Am 10.11.2017 um 05:29 schrieb Andrey Grodzovsky:
>>> THe following  patch series intoroduce dynamic tests dusabling/enabling
>>> in amdgpu  tester using Cunit API. Today test suits that
>>> don't apply to specific HW just return success w/o executing while
>>> single tests that can't be executed properly are commented out.
>>>
>>> Suits are diasbled based on hooks they provide (e.g incompatible
>>> ASIC or missing blocks) while single tests are diasbled explicitly 
>>> since this is
>>> usually due to some bug preventing from the tester  or the system  
>>> to handle
>>> the test w/o crashing or killing the tester.
>>>
>>> Inside this series also a minor cleanup and new test for memory over 
>>> allocation.
>>>
>>> Andrey Grodzovsky (4):
>>>    amdgpu: Add functions to disable suites and tests.
>>>    amdgpu: Use new suite/test disabling functionality.
>>>    amdgpu: Move memory alloc tests in bo suite.
>>>    amdgpu: Add memory over allocation test.
>>>
>>>   tests/amdgpu/amdgpu_test.c    | 169 
>>> +++++++++++++++++++++++++++++++++++++-----
>>>   tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
>>>   tests/amdgpu/basic_tests.c    |  49 ------------
>>>   tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
>>>   tests/amdgpu/deadlock_tests.c |   8 +-
>>>   tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
>>>   tests/amdgpu/vce_tests.c      |  65 ++++++++--------
>>>   tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
>>>   8 files changed, 363 insertions(+), 198 deletions(-)
>>>
>>
>

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Andrey Grodzovsky]

[-- Attachment #1: Type: text/plain, Size: 12265 bytes --]



On 11/10/2017 10:48 AM, Christian König wrote:
> Am 10.11.2017 um 16:36 schrieb Andrey Grodzovsky:
>>
>>
>> On 11/10/2017 07:17 AM, Christian König wrote:
>>> Series is Acked-by: Christian König <christian.koenig@amd.com>.
>>>
>>> Please note that I think your OOM killer test shows quite a bug we 
>>> currently have in the kernel driver.
>>>
>>> A single allocation of 1TB shouldn't trigger the OOM killer, but 
>>> rather be reacted immediately.
>>
>> Maybe we should add a second test which does incremental 1GB 
>> allocations but still keep this tests ? With this test  i get a 
>> callstack as bellow + crash of the test suite
>> with general protection fault - As normal behavior I would have 
>> expected just some errno returning from the amdgpu_bo_alloc which we 
>> could check in the test.
>
> Yeah, totally agree. And when this works correctly we should really 
> enable this test case by default as well.
>
> When I implemented scattered eviction I completely removed the check 
> which limited the BO size. That was probably a bit to extreme.
>
> We still need to check the size here so that we don't create a BO 
> larger than what makes sense for the domain it should be stored in.

Patch attached, tested with the DRM tester, call stack is gone but I 
still get SIGSEV and tester crashes, attaching debugger shows SIGSEV 
recived when the tester is still in the IOCTL -
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_CREATE,
                 &args, sizeof(args));

dmesg

[  104.608664 <   16.227791>] [drm:amdgpu_bo_do_create [amdgpu]] *ERROR* 
BO size 1000000000000 > total memory in domain: 1073741824
[  104.608911 <    0.000247>] [drm:amdgpu_bo_do_create [amdgpu]] *ERROR* 
BO size 1000000000000 > total memory in domain: 3221225472
[  104.609168 <    0.000257>] [drm:amdgpu_gem_object_create [amdgpu]] 
*ERROR* Failed to allocate GEM object (1000000000000, 6, 4096, -12)
[  104.609301 <    0.000133>] traps: lt-amdgpu_test[1142] general 
protection ip:7f21c9ed6007 sp:7ffe08ae1e30 error:0 in 
libdrm_amdgpu.so.1.0.0[7f21c9ed2000+b000]


Thanks,
Andrey

>
> Regards,
> Christian.
>
>>
>> Thanks,
>> Andrey
>>
>> [169053.128981 <72032.811683>] ------------[ cut here ]------------
>> [169053.129006 <    0.000025>] WARNING: CPU: 0 PID: 22883 at 
>> mm/page_alloc.c:3883 __alloc_pages_slowpath+0xf03/0x14e0
>> [169053.129007 <    0.000001>] Modules linked in: amdgpu chash ttm 
>> drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect 
>> sysimgblt edac_mce_amd kvm_amd kvm irqbypass crct10dif_pclmul 
>> crc32_pclmul snd_hda_codec_realtek ghash_clmulni_intel 
>> snd_hda_codec_generic pcbc snd_hda_codec_hdmi snd_hda_intel 
>> aesni_intel snd_hda_codec aes_x86_64 snd_hda_core crypto_simd 
>> glue_helper snd_hwdep rfkill_gpio cryptd snd_pcm snd_seq_midi 
>> snd_seq_midi_event serio_raw snd_rawmidi snd_seq cdc_ether usbnet 
>> snd_seq_device joydev fam15h_power k10temp r8152 snd_timer mii 
>> i2c_piix4 rtsx_pci_ms snd memstick soundcore shpchp 8250_dw 
>> i2c_designware_platform i2c_designware_core mac_hid binfmt_misc nfsd 
>> auth_rpcgss nfs_acl lockd grace sunrpc parport_pc ppdev lp parport 
>> autofs4 rtsx_pci_sdmmc psmouse rtsx_pci sdhci_pci ahci sdhci libahci
>> [169053.129084 <    0.000077>]  video i2c_hid hid_generic usbhid hid
>> [169053.129096 <    0.000012>] CPU: 0 PID: 22883 Comm: lt-amdgpu_test 
>> Tainted: G        W       4.14.0-rc3+ #1
>> [169053.129097 <    0.000001>] Hardware name: AMD Gardenia/Gardenia, 
>> BIOS RGA1101C 07/20/2015
>> [169053.129099 <    0.000002>] task: ffff880048803d80 task.stack: 
>> ffff880064688000
>> [169053.129103 <    0.000004>] RIP: 
>> 0010:__alloc_pages_slowpath+0xf03/0x14e0
>> [169053.129105 <    0.000002>] RSP: 0018:ffff88006468f108 EFLAGS: 
>> 00010246
>> [169053.129108 <    0.000003>] RAX: 0000000000000000 RBX: 
>> 00000000014000c0 RCX: ffffffff81279065
>> [169053.129109 <    0.000001>] RDX: dffffc0000000000 RSI: 
>> 000000000000000f RDI: ffffffff82609000
>> [169053.129111 <    0.000002>] RBP: ffff88006468f328 R08: 
>> 0000000000000000 R09: ffffffffffff8576
>> [169053.129113 <    0.000002>] R10: 000000005c2044e7 R11: 
>> 0000000000000000 R12: ffff88006468f3d8
>> [169053.129114 <    0.000001>] R13: ffff880048803d80 R14: 
>> 000000000140c0c0 R15: 000000000000000f
>> [169053.129117 <    0.000003>] FS:  00007f707863b700(0000) 
>> GS:ffff88006ce00000(0000) knlGS:0000000000000000
>> [169053.129119 <    0.000002>] CS:  0010 DS: 0000 ES: 0000 CR0: 
>> 0000000080050033
>> [169053.129120 <    0.000001>] CR2: 0000000001250000 CR3: 
>> 00000000644cf000 CR4: 00000000001406f0
>> [169053.129122 <    0.000002>] Call Trace:
>> [169053.129131 <    0.000009>]  ? __module_address+0x145/0x190
>> [169053.129135 <    0.000004>]  ? is_bpf_text_address+0xe/0x20
>> [169053.129140 <    0.000005>]  ? __kernel_text_address+0x12/0x40
>> [169053.129144 <    0.000004>]  ? unwind_get_return_address+0x36/0x50
>> [169053.129150 <    0.000006>]  ? memcmp+0x5b/0x90
>> [169053.129152 <    0.000002>]  ? warn_alloc+0x250/0x250
>> [169053.129156 <    0.000004>]  ? get_page_from_freelist+0x147/0x10f0
>> [169053.129160 <    0.000004>]  ? save_stack_trace+0x1b/0x20
>> [169053.129164 <    0.000004>]  ? kasan_kmalloc+0xad/0xe0
>> [169053.129186 <    0.000022>]  ? ttm_bo_mem_space+0x79/0x6b0 [ttm]
>> [169053.129196 <    0.000010>]  ? ttm_bo_validate+0x178/0x220 [ttm]
>> [169053.129200 <    0.000004>] __alloc_pages_nodemask+0x3c4/0x400
>> [169053.129203 <    0.000003>]  ? __alloc_pages_slowpath+0x14e0/0x14e0
>> [169053.129205 <    0.000002>]  ? __save_stack_trace+0x66/0xd0
>> [169053.129209 <    0.000004>]  ? rb_insert_color+0x32/0x3e0
>> [169053.129213 <    0.000004>]  ? do_syscall_64+0xea/0x280
>> [169053.129217 <    0.000004>] alloc_pages_current+0x75/0x110
>> [169053.129221 <    0.000004>]  kmalloc_order+0x1f/0x80
>> [169053.129223 <    0.000002>] kmalloc_order_trace+0x24/0xa0
>> [169053.129226 <    0.000003>]  __kmalloc+0x264/0x280
>> [169053.129383 <    0.000157>] amdgpu_vram_mgr_new+0x11b/0x3b0 [amdgpu]
>> [169053.129391 <    0.000008>]  ? 
>> reservation_object_reserve_shared+0x64/0xf0
>> [169053.129401 <    0.000010>] ttm_bo_mem_space+0x196/0x6b0 [ttm]
>> [169053.129478 <    0.000077>]  ? add_hole+0x20a/0x220 [drm]
>> [169053.129489 <    0.000011>] ttm_bo_validate+0x178/0x220 [ttm]
>> [169053.129498 <    0.000009>]  ? ttm_bo_evict_mm+0x70/0x70 [ttm]
>> [169053.129508 <    0.000010>]  ? ttm_check_swapping+0xf6/0x110 [ttm]
>> [169053.129541 <    0.000033>]  ? drm_vma_offset_add+0x5b/0x80 [drm]
>> [169053.129572 <    0.000031>]  ? drm_vma_offset_add+0x68/0x80 [drm]
>> [169053.129584 <    0.000012>] ttm_bo_init_reserved+0x546/0x630 [ttm]
>> [169053.129716 <    0.000132>] amdgpu_bo_do_create+0x28b/0x630 [amdgpu]
>> [169053.129816 <    0.000100>]  ? amdgpu_fill_buffer+0x580/0x580 
>> [amdgpu]
>> [169053.129952 <    0.000136>]  ? 
>> amdgpu_ttm_placement_from_domain+0x320/0x320 [amdgpu]
>> [169053.129956 <    0.000004>]  ? try_to_wake_up+0xbe/0x720
>> [169053.130054 <    0.000098>] amdgpu_bo_create+0x85/0x400 [amdgpu]
>> [169053.130153 <    0.000099>]  ? amdgpu_bo_do_create+0x630/0x630 
>> [amdgpu]
>> [169053.130155 <    0.000002>]  ? wake_up_process+0x15/0x20
>> [169053.130158 <    0.000003>]  ? insert_work+0xf3/0x110
>> [169053.130257 <    0.000099>] amdgpu_gem_object_create+0x101/0x190 
>> [amdgpu]
>> [169053.130356 <    0.000099>]  ? amdgpu_gem_object_free+0xe0/0xe0 
>> [amdgpu]
>> [169053.130360 <    0.000004>]  ? 
>> tty_insert_flip_string_fixed_flag+0xab/0x110
>> [169053.130468 <    0.000108>] amdgpu_gem_create_ioctl+0x364/0x460 
>> [amdgpu]
>> [169053.130695 <    0.000227>]  ? amdgpu_gem_object_close+0x320/0x320 
>> [amdgpu]
>> [169053.130767 <    0.000072>]  ? drm_dev_printk+0x120/0x120 [drm]
>> [169053.130840 <    0.000073>]  ? __wake_up_common_lock+0xe9/0x170
>> [169053.130989 <    0.000149>]  ? amdgpu_gem_object_close+0x320/0x320 
>> [amdgpu]
>> [169053.131061 <    0.000072>]  drm_ioctl_kernel+0xae/0xf0 [drm]
>> [169053.131115 <    0.000054>]  drm_ioctl+0x466/0x520 [drm]
>> [169053.131238 <    0.000123>]  ? amdgpu_gem_object_close+0x320/0x320 
>> [amdgpu]
>> [169053.131291 <    0.000053>]  ? drm_getunique+0xf0/0xf0 [drm]
>> [169053.131426 <    0.000135>]  amdgpu_drm_ioctl+0x78/0xd0 [amdgpu]
>> [169053.131451 <    0.000025>]  do_vfs_ioctl+0x12e/0x860
>> [169053.131466 <    0.000015>]  ? apparmor_file_permission+0x1a/0x20
>> [169053.131489 <    0.000023>]  ? ioctl_preallocate+0x130/0x130
>> [169053.131503 <    0.000014>]  ? rw_verify_area+0x78/0x140
>> [169053.131520 <    0.000017>]  ? vfs_write+0x1a2/0x260
>> [169053.131544 <    0.000024>]  ? syscall_trace_enter+0x1fd/0x520
>> [169053.131568 <    0.000024>]  ? sched_clock+0x9/0x10
>> [169053.131584 <    0.000016>]  ? exit_to_usermode_loop+0xc0/0xc0
>> [169053.131607 <    0.000023>]  ? __fget_light+0xa7/0xc0
>> [169053.131631 <    0.000024>]  SyS_ioctl+0x79/0x90
>> [169053.131651 <    0.000020>]  ? 
>> __context_tracking_exit.part.4+0x53/0xc0
>> [169053.131672 <    0.000021>]  ? do_vfs_ioctl+0x860/0x860
>> [169053.131683 <    0.000011>]  do_syscall_64+0xea/0x280
>> [169053.131708 <    0.000025>] entry_SYSCALL64_slow_path+0x25/0x25
>> [169053.131720 <    0.000012>] RIP: 0033:0x7f70778eef07
>> [169053.131740 <    0.000020>] RSP: 002b:00007ffc509d13d8 EFLAGS: 
>> 00000202 ORIG_RAX: 0000000000000010
>> [169053.131756 <    0.000016>] RAX: ffffffffffffffda RBX: 
>> 000000000000001e RCX: 00007f70778eef07
>> [169053.131778 <    0.000022>] RDX: 00007ffc509d1490 RSI: 
>> 00000000c0206440 RDI: 0000000000000004
>> [169053.131798 <    0.000020>] RBP: 00007ffc509d1410 R08: 
>> 000000000124c660 R09: 0000000000000000
>> [169053.131815 <    0.000017>] R10: 000000000000006e R11: 
>> 0000000000000202 R12: 000000000124b530
>> [169053.131835 <    0.000020>] R13: 00007ffc509d1800 R14: 
>> 0000000000000000 R15: 0000000000000000
>> [169053.131854 <    0.000019>] Code: 89 85 c8 fe ff ff e9 5d fc ff ff 
>> 8d 42 ff 45 31 f6 c6 85 d0 fe ff ff 01 89 85 c8 fe ff ff e9 45 fc ff 
>> ff 41 89 c5 e9 10 fc ff ff <0f> ff e9 ba f1 ff ff 0f ff 89 d8 25 ff 
>> ff f7 ff 89 85 8c fe ff
>> [169053.131933 <    0.000079>] ---[ end trace 8253dc1e92579724 ]---
>> [169053.132622 <    0.000689>] [drm:amdgpu_gem_object_create 
>> [amdgpu]] *ERROR* Failed to allocate GEM object (1000000000000, 6, 
>> 4096, -12)
>> [169053.132877 <    0.000255>] traps: lt-amdgpu_test[22883] general 
>> protection ip:7f7077ff6007 sp:7ffc509d13e0 error:0 in 
>> libdrm_amdgpu.so.1.0.0[7f7077ff2000+b000]
>>
>>
>>>
>>> Instead I expected that we need to do multiple 1GB allocations to 
>>> trigger the next problem that our TTM code doesn't imply a global 
>>> limit.
>>>
>>> Regards,
>>> Christian.
>>>
>>> Am 10.11.2017 um 05:29 schrieb Andrey Grodzovsky:
>>>> THe following  patch series intoroduce dynamic tests 
>>>> dusabling/enabling
>>>> in amdgpu  tester using Cunit API. Today test suits that
>>>> don't apply to specific HW just return success w/o executing while
>>>> single tests that can't be executed properly are commented out.
>>>>
>>>> Suits are diasbled based on hooks they provide (e.g incompatible
>>>> ASIC or missing blocks) while single tests are diasbled explicitly 
>>>> since this is
>>>> usually due to some bug preventing from the tester  or the system  
>>>> to handle
>>>> the test w/o crashing or killing the tester.
>>>>
>>>> Inside this series also a minor cleanup and new test for memory 
>>>> over allocation.
>>>>
>>>> Andrey Grodzovsky (4):
>>>>    amdgpu: Add functions to disable suites and tests.
>>>>    amdgpu: Use new suite/test disabling functionality.
>>>>    amdgpu: Move memory alloc tests in bo suite.
>>>>    amdgpu: Add memory over allocation test.
>>>>
>>>>   tests/amdgpu/amdgpu_test.c    | 169 
>>>> +++++++++++++++++++++++++++++++++++++-----
>>>>   tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
>>>>   tests/amdgpu/basic_tests.c    |  49 ------------
>>>>   tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
>>>>   tests/amdgpu/deadlock_tests.c |   8 +-
>>>>   tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
>>>>   tests/amdgpu/vce_tests.c      |  65 ++++++++--------
>>>>   tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
>>>>   8 files changed, 363 insertions(+), 198 deletions(-)
>>>>
>>>
>>
>


[-- Attachment #2: 0001-drm-amdgpu-Implement-BO-size-validation.patch --]
[-- Type: text/x-patch, Size: 2140 bytes --]

>From 183abb730742cfc5b61374a3af575ca9ca4d731d Mon Sep 17 00:00:00 2001
From: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Date: Fri, 10 Nov 2017 18:35:56 -0500
Subject: drm/amdgpu: Implement BO size validation.

Validates BO size against each requested domain's total memory.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 39 ++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index a937c49..2737631 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -281,6 +281,42 @@ void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
 		*cpu_addr = NULL;
 }
 
+/* Validate bo size is bit bigger then the request domain */
+static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device *adev,
+					  unsigned long size, u32 domain)
+{
+	struct ttm_mem_type_manager *man = NULL;
+
+	if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
+		man = &adev->mman.bdev.man[TTM_PL_VRAM];
+
+		if (man && size < (man->size << PAGE_SHIFT))
+			return true;
+	}
+
+	if (domain & AMDGPU_GEM_DOMAIN_GTT) {
+		man = &adev->mman.bdev.man[TTM_PL_TT];
+
+		if (man && size < (man->size << PAGE_SHIFT))
+			return true;
+	}
+
+	if (domain & AMDGPU_GEM_DOMAIN_CPU) {
+		man = &adev->mman.bdev.man[TTM_PL_SYSTEM];
+
+		if (man && size < (man->size << PAGE_SHIFT))
+			return true;
+	}
+
+	if (man) {
+		DRM_ERROR("BO size %lu > total memory in domain: %llu\n", size,
+						      man->size << PAGE_SHIFT);
+		return false;
+	}
+
+	return true;
+}
+
 static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 			       unsigned long size, int byte_align,
 			       bool kernel, u32 domain, u64 flags,
@@ -299,6 +335,9 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 	page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
 	size = ALIGN(size, PAGE_SIZE);
 
+	if (!amdgpu_bo_validate_bo_size(adev, size, domain))
+		return -ENOMEM;
+
 	if (kernel) {
 		type = ttm_bo_type_kernel;
 	} else if (sg) {
-- 
2.7.4


[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Christian König]

A few comments on the code:

> +/* Validate bo size is bit bigger then the request domain */
> +static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device *adev,
> +                      unsigned long size, u32 domain)
Drop the inline keyword and the second _bo_ in the name here.

> +{
> +    struct ttm_mem_type_manager *man = NULL;
> +
> +    if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
> +        man = &adev->mman.bdev.man[TTM_PL_VRAM];
> +
> +        if (man && size < (man->size << PAGE_SHIFT))

Drop the extra check that man is not NULL. We get the pointer to an 
array element, that can't be NULL.

> +            return true;
Mhm, domain is a bitmask of allowed domains.

So we should check all valid domains if the size fit, not just the first 
one.

> +    }
> +
> +    if (domain & AMDGPU_GEM_DOMAIN_GTT) {
> +        man = &adev->mman.bdev.man[TTM_PL_TT];
> +
> +        if (man && size < (man->size << PAGE_SHIFT))
> +            return true;
> +    }
> +
> +    if (domain & AMDGPU_GEM_DOMAIN_CPU) {
> +        man = &adev->mman.bdev.man[TTM_PL_SYSTEM];
> +
> +        if (man && size < (man->size << PAGE_SHIFT))
> +            return true;
> +    }
IIRC we never actually set a size on the system domain, so that check 
can't succeed.

(Maybe we should set a size and actually enforce it, that would solve 
our eviction problem as well)

Regards,
Christian.

Am 11.11.2017 um 00:43 schrieb Andrey Grodzovsky:
>
>
> On 11/10/2017 10:48 AM, Christian König wrote:
>> Am 10.11.2017 um 16:36 schrieb Andrey Grodzovsky:
>>>
>>>
>>> On 11/10/2017 07:17 AM, Christian König wrote:
>>>> Series is Acked-by: Christian König <christian.koenig@amd.com>.
>>>>
>>>> Please note that I think your OOM killer test shows quite a bug we 
>>>> currently have in the kernel driver.
>>>>
>>>> A single allocation of 1TB shouldn't trigger the OOM killer, but 
>>>> rather be reacted immediately.
>>>
>>> Maybe we should add a second test which does incremental 1GB 
>>> allocations but still keep this tests ? With this test  i get a 
>>> callstack as bellow + crash of the test suite
>>> with general protection fault - As normal behavior I would have 
>>> expected just some errno returning from the amdgpu_bo_alloc which we 
>>> could check in the test.
>>
>> Yeah, totally agree. And when this works correctly we should really 
>> enable this test case by default as well.
>>
>> When I implemented scattered eviction I completely removed the check 
>> which limited the BO size. That was probably a bit to extreme.
>>
>> We still need to check the size here so that we don't create a BO 
>> larger than what makes sense for the domain it should be stored in.
>
> Patch attached, tested with the DRM tester, call stack is gone but I 
> still get SIGSEV and tester crashes, attaching debugger shows SIGSEV 
> recived when the tester is still in the IOCTL -
> r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_CREATE,
>                 &args, sizeof(args));
>
> dmesg
>
> [  104.608664 <   16.227791>] [drm:amdgpu_bo_do_create [amdgpu]] 
> *ERROR* BO size 1000000000000 > total memory in domain: 1073741824
> [  104.608911 <    0.000247>] [drm:amdgpu_bo_do_create [amdgpu]] 
> *ERROR* BO size 1000000000000 > total memory in domain: 3221225472
> [  104.609168 <    0.000257>] [drm:amdgpu_gem_object_create [amdgpu]] 
> *ERROR* Failed to allocate GEM object (1000000000000, 6, 4096, -12)
> [  104.609301 <    0.000133>] traps: lt-amdgpu_test[1142] general 
> protection ip:7f21c9ed6007 sp:7ffe08ae1e30 error:0 in 
> libdrm_amdgpu.so.1.0.0[7f21c9ed2000+b000]
>
>
> Thanks,
> Andrey
>
>>
>> Regards,
>> Christian.
>>
>>>
>>> Thanks,
>>> Andrey
>>>
>>> [169053.128981 <72032.811683>] ------------[ cut here ]------------
>>> [169053.129006 <    0.000025>] WARNING: CPU: 0 PID: 22883 at 
>>> mm/page_alloc.c:3883 __alloc_pages_slowpath+0xf03/0x14e0
>>> [169053.129007 <    0.000001>] Modules linked in: amdgpu chash ttm 
>>> drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect 
>>> sysimgblt edac_mce_amd kvm_amd kvm irqbypass crct10dif_pclmul 
>>> crc32_pclmul snd_hda_codec_realtek ghash_clmulni_intel 
>>> snd_hda_codec_generic pcbc snd_hda_codec_hdmi snd_hda_intel 
>>> aesni_intel snd_hda_codec aes_x86_64 snd_hda_core crypto_simd 
>>> glue_helper snd_hwdep rfkill_gpio cryptd snd_pcm snd_seq_midi 
>>> snd_seq_midi_event serio_raw snd_rawmidi snd_seq cdc_ether usbnet 
>>> snd_seq_device joydev fam15h_power k10temp r8152 snd_timer mii 
>>> i2c_piix4 rtsx_pci_ms snd memstick soundcore shpchp 8250_dw 
>>> i2c_designware_platform i2c_designware_core mac_hid binfmt_misc nfsd 
>>> auth_rpcgss nfs_acl lockd grace sunrpc parport_pc ppdev lp parport 
>>> autofs4 rtsx_pci_sdmmc psmouse rtsx_pci sdhci_pci ahci sdhci libahci
>>> [169053.129084 <    0.000077>]  video i2c_hid hid_generic usbhid hid
>>> [169053.129096 <    0.000012>] CPU: 0 PID: 22883 Comm: 
>>> lt-amdgpu_test Tainted: G        W       4.14.0-rc3+ #1
>>> [169053.129097 <    0.000001>] Hardware name: AMD Gardenia/Gardenia, 
>>> BIOS RGA1101C 07/20/2015
>>> [169053.129099 <    0.000002>] task: ffff880048803d80 task.stack: 
>>> ffff880064688000
>>> [169053.129103 <    0.000004>] RIP: 
>>> 0010:__alloc_pages_slowpath+0xf03/0x14e0
>>> [169053.129105 <    0.000002>] RSP: 0018:ffff88006468f108 EFLAGS: 
>>> 00010246
>>> [169053.129108 <    0.000003>] RAX: 0000000000000000 RBX: 
>>> 00000000014000c0 RCX: ffffffff81279065
>>> [169053.129109 <    0.000001>] RDX: dffffc0000000000 RSI: 
>>> 000000000000000f RDI: ffffffff82609000
>>> [169053.129111 <    0.000002>] RBP: ffff88006468f328 R08: 
>>> 0000000000000000 R09: ffffffffffff8576
>>> [169053.129113 <    0.000002>] R10: 000000005c2044e7 R11: 
>>> 0000000000000000 R12: ffff88006468f3d8
>>> [169053.129114 <    0.000001>] R13: ffff880048803d80 R14: 
>>> 000000000140c0c0 R15: 000000000000000f
>>> [169053.129117 <    0.000003>] FS: 00007f707863b700(0000) 
>>> GS:ffff88006ce00000(0000) knlGS:0000000000000000
>>> [169053.129119 <    0.000002>] CS:  0010 DS: 0000 ES: 0000 CR0: 
>>> 0000000080050033
>>> [169053.129120 <    0.000001>] CR2: 0000000001250000 CR3: 
>>> 00000000644cf000 CR4: 00000000001406f0
>>> [169053.129122 <    0.000002>] Call Trace:
>>> [169053.129131 <    0.000009>]  ? __module_address+0x145/0x190
>>> [169053.129135 <    0.000004>]  ? is_bpf_text_address+0xe/0x20
>>> [169053.129140 <    0.000005>]  ? __kernel_text_address+0x12/0x40
>>> [169053.129144 <    0.000004>]  ? unwind_get_return_address+0x36/0x50
>>> [169053.129150 <    0.000006>]  ? memcmp+0x5b/0x90
>>> [169053.129152 <    0.000002>]  ? warn_alloc+0x250/0x250
>>> [169053.129156 <    0.000004>]  ? get_page_from_freelist+0x147/0x10f0
>>> [169053.129160 <    0.000004>]  ? save_stack_trace+0x1b/0x20
>>> [169053.129164 <    0.000004>]  ? kasan_kmalloc+0xad/0xe0
>>> [169053.129186 <    0.000022>]  ? ttm_bo_mem_space+0x79/0x6b0 [ttm]
>>> [169053.129196 <    0.000010>]  ? ttm_bo_validate+0x178/0x220 [ttm]
>>> [169053.129200 <    0.000004>] __alloc_pages_nodemask+0x3c4/0x400
>>> [169053.129203 <    0.000003>]  ? __alloc_pages_slowpath+0x14e0/0x14e0
>>> [169053.129205 <    0.000002>]  ? __save_stack_trace+0x66/0xd0
>>> [169053.129209 <    0.000004>]  ? rb_insert_color+0x32/0x3e0
>>> [169053.129213 <    0.000004>]  ? do_syscall_64+0xea/0x280
>>> [169053.129217 <    0.000004>] alloc_pages_current+0x75/0x110
>>> [169053.129221 <    0.000004>]  kmalloc_order+0x1f/0x80
>>> [169053.129223 <    0.000002>] kmalloc_order_trace+0x24/0xa0
>>> [169053.129226 <    0.000003>]  __kmalloc+0x264/0x280
>>> [169053.129383 <    0.000157>] amdgpu_vram_mgr_new+0x11b/0x3b0 [amdgpu]
>>> [169053.129391 <    0.000008>]  ? 
>>> reservation_object_reserve_shared+0x64/0xf0
>>> [169053.129401 <    0.000010>] ttm_bo_mem_space+0x196/0x6b0 [ttm]
>>> [169053.129478 <    0.000077>]  ? add_hole+0x20a/0x220 [drm]
>>> [169053.129489 <    0.000011>] ttm_bo_validate+0x178/0x220 [ttm]
>>> [169053.129498 <    0.000009>]  ? ttm_bo_evict_mm+0x70/0x70 [ttm]
>>> [169053.129508 <    0.000010>]  ? ttm_check_swapping+0xf6/0x110 [ttm]
>>> [169053.129541 <    0.000033>]  ? drm_vma_offset_add+0x5b/0x80 [drm]
>>> [169053.129572 <    0.000031>]  ? drm_vma_offset_add+0x68/0x80 [drm]
>>> [169053.129584 <    0.000012>] ttm_bo_init_reserved+0x546/0x630 [ttm]
>>> [169053.129716 <    0.000132>] amdgpu_bo_do_create+0x28b/0x630 [amdgpu]
>>> [169053.129816 <    0.000100>]  ? amdgpu_fill_buffer+0x580/0x580 
>>> [amdgpu]
>>> [169053.129952 <    0.000136>]  ? 
>>> amdgpu_ttm_placement_from_domain+0x320/0x320 [amdgpu]
>>> [169053.129956 <    0.000004>]  ? try_to_wake_up+0xbe/0x720
>>> [169053.130054 <    0.000098>] amdgpu_bo_create+0x85/0x400 [amdgpu]
>>> [169053.130153 <    0.000099>]  ? amdgpu_bo_do_create+0x630/0x630 
>>> [amdgpu]
>>> [169053.130155 <    0.000002>]  ? wake_up_process+0x15/0x20
>>> [169053.130158 <    0.000003>]  ? insert_work+0xf3/0x110
>>> [169053.130257 <    0.000099>] amdgpu_gem_object_create+0x101/0x190 
>>> [amdgpu]
>>> [169053.130356 <    0.000099>]  ? amdgpu_gem_object_free+0xe0/0xe0 
>>> [amdgpu]
>>> [169053.130360 <    0.000004>]  ? 
>>> tty_insert_flip_string_fixed_flag+0xab/0x110
>>> [169053.130468 <    0.000108>] amdgpu_gem_create_ioctl+0x364/0x460 
>>> [amdgpu]
>>> [169053.130695 <    0.000227>]  ? 
>>> amdgpu_gem_object_close+0x320/0x320 [amdgpu]
>>> [169053.130767 <    0.000072>]  ? drm_dev_printk+0x120/0x120 [drm]
>>> [169053.130840 <    0.000073>]  ? __wake_up_common_lock+0xe9/0x170
>>> [169053.130989 <    0.000149>]  ? 
>>> amdgpu_gem_object_close+0x320/0x320 [amdgpu]
>>> [169053.131061 <    0.000072>] drm_ioctl_kernel+0xae/0xf0 [drm]
>>> [169053.131115 <    0.000054>]  drm_ioctl+0x466/0x520 [drm]
>>> [169053.131238 <    0.000123>]  ? 
>>> amdgpu_gem_object_close+0x320/0x320 [amdgpu]
>>> [169053.131291 <    0.000053>]  ? drm_getunique+0xf0/0xf0 [drm]
>>> [169053.131426 <    0.000135>] amdgpu_drm_ioctl+0x78/0xd0 [amdgpu]
>>> [169053.131451 <    0.000025>]  do_vfs_ioctl+0x12e/0x860
>>> [169053.131466 <    0.000015>]  ? apparmor_file_permission+0x1a/0x20
>>> [169053.131489 <    0.000023>]  ? ioctl_preallocate+0x130/0x130
>>> [169053.131503 <    0.000014>]  ? rw_verify_area+0x78/0x140
>>> [169053.131520 <    0.000017>]  ? vfs_write+0x1a2/0x260
>>> [169053.131544 <    0.000024>]  ? syscall_trace_enter+0x1fd/0x520
>>> [169053.131568 <    0.000024>]  ? sched_clock+0x9/0x10
>>> [169053.131584 <    0.000016>]  ? exit_to_usermode_loop+0xc0/0xc0
>>> [169053.131607 <    0.000023>]  ? __fget_light+0xa7/0xc0
>>> [169053.131631 <    0.000024>]  SyS_ioctl+0x79/0x90
>>> [169053.131651 <    0.000020>]  ? 
>>> __context_tracking_exit.part.4+0x53/0xc0
>>> [169053.131672 <    0.000021>]  ? do_vfs_ioctl+0x860/0x860
>>> [169053.131683 <    0.000011>]  do_syscall_64+0xea/0x280
>>> [169053.131708 <    0.000025>] entry_SYSCALL64_slow_path+0x25/0x25
>>> [169053.131720 <    0.000012>] RIP: 0033:0x7f70778eef07
>>> [169053.131740 <    0.000020>] RSP: 002b:00007ffc509d13d8 EFLAGS: 
>>> 00000202 ORIG_RAX: 0000000000000010
>>> [169053.131756 <    0.000016>] RAX: ffffffffffffffda RBX: 
>>> 000000000000001e RCX: 00007f70778eef07
>>> [169053.131778 <    0.000022>] RDX: 00007ffc509d1490 RSI: 
>>> 00000000c0206440 RDI: 0000000000000004
>>> [169053.131798 <    0.000020>] RBP: 00007ffc509d1410 R08: 
>>> 000000000124c660 R09: 0000000000000000
>>> [169053.131815 <    0.000017>] R10: 000000000000006e R11: 
>>> 0000000000000202 R12: 000000000124b530
>>> [169053.131835 <    0.000020>] R13: 00007ffc509d1800 R14: 
>>> 0000000000000000 R15: 0000000000000000
>>> [169053.131854 <    0.000019>] Code: 89 85 c8 fe ff ff e9 5d fc ff 
>>> ff 8d 42 ff 45 31 f6 c6 85 d0 fe ff ff 01 89 85 c8 fe ff ff e9 45 fc 
>>> ff ff 41 89 c5 e9 10 fc ff ff <0f> ff e9 ba f1 ff ff 0f ff 89 d8 25 
>>> ff ff f7 ff 89 85 8c fe ff
>>> [169053.131933 <    0.000079>] ---[ end trace 8253dc1e92579724 ]---
>>> [169053.132622 <    0.000689>] [drm:amdgpu_gem_object_create 
>>> [amdgpu]] *ERROR* Failed to allocate GEM object (1000000000000, 6, 
>>> 4096, -12)
>>> [169053.132877 <    0.000255>] traps: lt-amdgpu_test[22883] general 
>>> protection ip:7f7077ff6007 sp:7ffc509d13e0 error:0 in 
>>> libdrm_amdgpu.so.1.0.0[7f7077ff2000+b000]
>>>
>>>
>>>>
>>>> Instead I expected that we need to do multiple 1GB allocations to 
>>>> trigger the next problem that our TTM code doesn't imply a global 
>>>> limit.
>>>>
>>>> Regards,
>>>> Christian.
>>>>
>>>> Am 10.11.2017 um 05:29 schrieb Andrey Grodzovsky:
>>>>> THe following  patch series intoroduce dynamic tests 
>>>>> dusabling/enabling
>>>>> in amdgpu  tester using Cunit API. Today test suits that
>>>>> don't apply to specific HW just return success w/o executing while
>>>>> single tests that can't be executed properly are commented out.
>>>>>
>>>>> Suits are diasbled based on hooks they provide (e.g incompatible
>>>>> ASIC or missing blocks) while single tests are diasbled explicitly 
>>>>> since this is
>>>>> usually due to some bug preventing from the tester  or the system  
>>>>> to handle
>>>>> the test w/o crashing or killing the tester.
>>>>>
>>>>> Inside this series also a minor cleanup and new test for memory 
>>>>> over allocation.
>>>>>
>>>>> Andrey Grodzovsky (4):
>>>>>    amdgpu: Add functions to disable suites and tests.
>>>>>    amdgpu: Use new suite/test disabling functionality.
>>>>>    amdgpu: Move memory alloc tests in bo suite.
>>>>>    amdgpu: Add memory over allocation test.
>>>>>
>>>>>   tests/amdgpu/amdgpu_test.c    | 169 
>>>>> +++++++++++++++++++++++++++++++++++++-----
>>>>>   tests/amdgpu/amdgpu_test.h    |  46 ++++++++++++
>>>>>   tests/amdgpu/basic_tests.c    |  49 ------------
>>>>>   tests/amdgpu/bo_tests.c       |  69 +++++++++++++++++
>>>>>   tests/amdgpu/deadlock_tests.c |   8 +-
>>>>>   tests/amdgpu/uvd_enc_tests.c  |  81 ++++++++------------
>>>>>   tests/amdgpu/vce_tests.c      |  65 ++++++++--------
>>>>>   tests/amdgpu/vcn_tests.c      |  74 ++++++++----------
>>>>>   8 files changed, 363 insertions(+), 198 deletions(-)
>>>>>
>>>>
>>>
>>
>

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Michel Dänzer]

On 12/11/17 10:35 AM, Christian König wrote:
> A few comments on the code:
> 
>> +/* Validate bo size is bit bigger then the request domain */
>> +static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device
>> *adev,
>> +                      unsigned long size, u32 domain)
> Drop the inline keyword and the second _bo_ in the name here.
> 
>> +{
>> +    struct ttm_mem_type_manager *man = NULL;
>> +
>> +    if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
>> +        man = &adev->mman.bdev.man[TTM_PL_VRAM];
>> +
>> +        if (man && size < (man->size << PAGE_SHIFT))
> 
> Drop the extra check that man is not NULL. We get the pointer to an
> array element, that can't be NULL.
> 
>> +            return true;
> Mhm, domain is a bitmask of allowed domains.
> 
> So we should check all valid domains if the size fit, not just the first
> one.

Assuming VRAM <-> system migration of BOs larger than the GTT domain
works, I'd say we should only require that the BO can fit in any of the
allowed domains. Otherwise it must also always fit in GTT.


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer
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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Christian König]

Am 13.11.2017 um 12:32 schrieb Michel Dänzer:
> On 12/11/17 10:35 AM, Christian König wrote:
>> A few comments on the code:
>>
>>> +/* Validate bo size is bit bigger then the request domain */
>>> +static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device
>>> *adev,
>>> +                      unsigned long size, u32 domain)
>> Drop the inline keyword and the second _bo_ in the name here.
>>
>>> +{
>>> +    struct ttm_mem_type_manager *man = NULL;
>>> +
>>> +    if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
>>> +        man = &adev->mman.bdev.man[TTM_PL_VRAM];
>>> +
>>> +        if (man && size < (man->size << PAGE_SHIFT))
>> Drop the extra check that man is not NULL. We get the pointer to an
>> array element, that can't be NULL.
>>
>>> +            return true;
>> Mhm, domain is a bitmask of allowed domains.
>>
>> So we should check all valid domains if the size fit, not just the first
>> one.
> Assuming VRAM <-> system migration of BOs larger than the GTT domain
> works, I'd say we should only require that the BO can fit in any of the
> allowed domains. Otherwise it must also always fit in GTT.
Good point, and yes VRAM <-> system migration of BOs larger than the GTT 
domain works now.

I can agree on that VRAM should probably be optional, otherwise we can't 
allocate anything large when the driver uses only very low amounts of 
stolen VRAM on APUs.

But I think when userspace requests VRAM and GTT at the same time we 
still should be able to fall back to GTT.

Regards,
Christian.
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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Andrey Grodzovsky]

[-- Attachment #1: Type: text/plain, Size: 1867 bytes --]

On 11/13/2017 07:39 AM, Christian König wrote:

> Am 13.11.2017 um 12:32 schrieb Michel Dänzer:
>> On 12/11/17 10:35 AM, Christian König wrote:
>>> A few comments on the code:
>>>
>>>> +/* Validate bo size is bit bigger then the request domain */
>>>> +static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device
>>>> *adev,
>>>> +                      unsigned long size, u32 domain)
>>> Drop the inline keyword and the second _bo_ in the name here.
>>>
>>>> +{
>>>> +    struct ttm_mem_type_manager *man = NULL;
>>>> +
>>>> +    if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
>>>> +        man = &adev->mman.bdev.man[TTM_PL_VRAM];
>>>> +
>>>> +        if (man && size < (man->size << PAGE_SHIFT))
>>> Drop the extra check that man is not NULL. We get the pointer to an
>>> array element, that can't be NULL.
>>>
>>>> +            return true;
>>> Mhm, domain is a bitmask of allowed domains.
>>>
>>> So we should check all valid domains if the size fit, not just the 
>>> first
>>> one.
>> Assuming VRAM <-> system migration of BOs larger than the GTT domain
>> works, I'd say we should only require that the BO can fit in any of the
>> allowed domains. Otherwise it must also always fit in GTT.
> Good point, and yes VRAM <-> system migration of BOs larger than the 
> GTT domain works now.
>
> I can agree on that VRAM should probably be optional, otherwise we 
> can't allocate anything large when the driver uses only very low 
> amounts of stolen VRAM on APUs.
>
> But I think when userspace requests VRAM and GTT at the same time we 
> still should be able to fall back to GTT.

Attached V2 patch, I still don't understand why I experience the SIGSEV 
in the tester when the check fails and the IOCTLs will return ENOMEM

I will update the libdrm test to correctly handle mem failure, it 
segfaults at the moment.


Thanks,
Andey
>
> Regards,
> Christian.


[-- Attachment #2: 0001-drm-amdgpu-Implement-BO-size-validation-V2.patch --]
[-- Type: text/x-patch, Size: 2294 bytes --]

>From 37369b3a58027dedf7e9dc65fd9bc0f9e86d0d80 Mon Sep 17 00:00:00 2001
From: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
Date: Fri, 10 Nov 2017 18:35:56 -0500
Subject: drm/amdgpu: Implement BO size validation V2

Validates BO size against each requested domain's total memory.

v2:
Make GTT size check a MUST to allow fall back to GTT.
Rmove redundant NULL check.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 41 ++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index a937c49..5acf20c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -281,6 +281,44 @@ void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
 		*cpu_addr = NULL;
 }
 
+/* Validate bo size is bit bigger then the request domain */
+static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,
+					  unsigned long size, u32 domain)
+{
+	struct ttm_mem_type_manager *man = NULL;
+
+	/*
+	 * If GTT is part of requested domains the check must succeed to
+	 * allow fall back to GTT
+	 */
+	if (domain & AMDGPU_GEM_DOMAIN_GTT) {
+		man = &adev->mman.bdev.man[TTM_PL_TT];
+
+		if (size < (man->size << PAGE_SHIFT))
+			return true;
+		else
+			goto fail;
+	}
+
+	if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
+		man = &adev->mman.bdev.man[TTM_PL_VRAM];
+
+		if (size < (man->size << PAGE_SHIFT))
+			return true;
+		else
+			goto fail;
+	}
+
+
+	/* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */
+	return true;
+
+fail:
+	DRM_ERROR("BO size %lu > total memory in domain: %llu\n", size,
+					      man->size << PAGE_SHIFT);
+	return false;
+}
+
 static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 			       unsigned long size, int byte_align,
 			       bool kernel, u32 domain, u64 flags,
@@ -299,6 +337,9 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 	page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
 	size = ALIGN(size, PAGE_SIZE);
 
+	if (!amdgpu_bo_validate_size(adev, size, domain))
+		return -ENOMEM;
+
 	if (kernel) {
 		type = ttm_bo_type_kernel;
 	} else if (sg) {
-- 
2.7.4


[-- Attachment #3: Type: text/plain, Size: 154 bytes --]

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Christian König]

Am 13.11.2017 um 15:57 schrieb Andrey Grodzovsky:
> On 11/13/2017 07:39 AM, Christian König wrote:
>
>> Am 13.11.2017 um 12:32 schrieb Michel Dänzer:
>>> On 12/11/17 10:35 AM, Christian König wrote:
>>>> A few comments on the code:
>>>>
>>>>> +/* Validate bo size is bit bigger then the request domain */
>>>>> +static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device
>>>>> *adev,
>>>>> +                      unsigned long size, u32 domain)
>>>> Drop the inline keyword and the second _bo_ in the name here.
>>>>
>>>>> +{
>>>>> +    struct ttm_mem_type_manager *man = NULL;
>>>>> +
>>>>> +    if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
>>>>> +        man = &adev->mman.bdev.man[TTM_PL_VRAM];
>>>>> +
>>>>> +        if (man && size < (man->size << PAGE_SHIFT))
>>>> Drop the extra check that man is not NULL. We get the pointer to an
>>>> array element, that can't be NULL.
>>>>
>>>>> +            return true;
>>>> Mhm, domain is a bitmask of allowed domains.
>>>>
>>>> So we should check all valid domains if the size fit, not just the 
>>>> first
>>>> one.
>>> Assuming VRAM <-> system migration of BOs larger than the GTT domain
>>> works, I'd say we should only require that the BO can fit in any of the
>>> allowed domains. Otherwise it must also always fit in GTT.
>> Good point, and yes VRAM <-> system migration of BOs larger than the 
>> GTT domain works now.
>>
>> I can agree on that VRAM should probably be optional, otherwise we 
>> can't allocate anything large when the driver uses only very low 
>> amounts of stolen VRAM on APUs.
>>
>> But I think when userspace requests VRAM and GTT at the same time we 
>> still should be able to fall back to GTT.
>
> Attached V2 patch, I still don't understand why I experience the 
> SIGSEV in the tester when the check fails and the IOCTLs will return 
> ENOMEM
>

Reviewed-by: Christian König <christian.koenig@amd.com> for this one, 
but please use git send-email to send out patches.

> I will update the libdrm test to correctly handle mem failure, it 
> segfaults at the moment.

Sounds like it just tries to use the BO for VM or CPU mapping while the 
underlying function has failed (or we have another bug somewhere).

Please commit the kernel patch and leave me a note so that I can push 
the libdrm patches. BTW: Do you have the link where you request an 
account at hand? I want to ping the admins once more.

Regards,
Christian.

>
>
> Thanks,
> Andey
>>
>> Regards,
>> Christian.
>

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Re: [PATCH libdrm 0/4] Dynamicly disable suites and tets.

[Andrey Grodzovsky]

On 11/13/2017 10:27 AM, Christian König wrote:
> Am 13.11.2017 um 15:57 schrieb Andrey Grodzovsky:
>> On 11/13/2017 07:39 AM, Christian König wrote:
>>
>>> Am 13.11.2017 um 12:32 schrieb Michel Dänzer:
>>>> On 12/11/17 10:35 AM, Christian König wrote:
>>>>> A few comments on the code:
>>>>>
>>>>>> +/* Validate bo size is bit bigger then the request domain */
>>>>>> +static inline bool amdgpu_bo_validate_bo_size(struct amdgpu_device
>>>>>> *adev,
>>>>>> +                      unsigned long size, u32 domain)
>>>>> Drop the inline keyword and the second _bo_ in the name here.
>>>>>
>>>>>> +{
>>>>>> +    struct ttm_mem_type_manager *man = NULL;
>>>>>> +
>>>>>> +    if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
>>>>>> +        man = &adev->mman.bdev.man[TTM_PL_VRAM];
>>>>>> +
>>>>>> +        if (man && size < (man->size << PAGE_SHIFT))
>>>>> Drop the extra check that man is not NULL. We get the pointer to an
>>>>> array element, that can't be NULL.
>>>>>
>>>>>> +            return true;
>>>>> Mhm, domain is a bitmask of allowed domains.
>>>>>
>>>>> So we should check all valid domains if the size fit, not just the 
>>>>> first
>>>>> one.
>>>> Assuming VRAM <-> system migration of BOs larger than the GTT domain
>>>> works, I'd say we should only require that the BO can fit in any of 
>>>> the
>>>> allowed domains. Otherwise it must also always fit in GTT.
>>> Good point, and yes VRAM <-> system migration of BOs larger than the 
>>> GTT domain works now.
>>>
>>> I can agree on that VRAM should probably be optional, otherwise we 
>>> can't allocate anything large when the driver uses only very low 
>>> amounts of stolen VRAM on APUs.
>>>
>>> But I think when userspace requests VRAM and GTT at the same time we 
>>> still should be able to fall back to GTT.
>>
>> Attached V2 patch, I still don't understand why I experience the 
>> SIGSEV in the tester when the check fails and the IOCTLs will return 
>> ENOMEM
>>
>
> Reviewed-by: Christian König <christian.koenig@amd.com> for this one, 
> but please use git send-email to send out patches.
>
>> I will update the libdrm test to correctly handle mem failure, it 
>> segfaults at the moment.
>
> Sounds like it just tries to use the BO for VM or CPU mapping while 
> the underlying function has failed (or we have another bug somewhere).

Yes, the segfault is because I am using gpu_mem_alloc which continues 
executing after amdgpu_bo_alloc failed, the segfault is in amdgpu_bo_va_op.

>
> Please commit the kernel patch and leave me a note so that I can push 
> the libdrm patches. 

Areyou gonna push patches 1-3 from the original series and then I need 
to resend patch 4 to fix the segfault ?


> BTW: Do you have the link where you request an account at hand? I want 
> to ping the admins once more.

https://bugs.freedesktop.org/show_bug.cgi?id=103566

Thanks,
Andrey

>
> Regards,
> Christian.
>
>>
>>
>> Thanks,
>> Andey
>>>
>>> Regards,
>>> Christian.
>>
>

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[PATCH libdrm v2] amdgpu: Add memory over allocation test.

[Andrey Grodzovsky]

Allocates 1 TB of memory. Test is disabled by default
since it's triggers OOM killer.

v2:
FIx the test to only alloc the BO and assert if return value
not equal to -ENOMEM and remove test disable on start.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
---
 tests/amdgpu/bo_tests.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
index 4545196..53e76c1 100644
--- a/tests/amdgpu/bo_tests.c
+++ b/tests/amdgpu/bo_tests.c
@@ -47,6 +47,7 @@ static void amdgpu_bo_export_import(void);
 static void amdgpu_bo_metadata(void);
 static void amdgpu_bo_map_unmap(void);
 static void amdgpu_memory_alloc(void);
+static void amdgpu_mem_fail_alloc(void);
 
 CU_TestInfo bo_tests[] = {
 	{ "Export/Import",  amdgpu_bo_export_import },
@@ -55,6 +56,7 @@ CU_TestInfo bo_tests[] = {
 #endif
 	{ "CPU map/unmap",  amdgpu_bo_map_unmap },
 	{ "Memory alloc Test",  amdgpu_memory_alloc },
+	{ "Memory fail alloc Test",  amdgpu_mem_fail_alloc },
 	CU_TEST_INFO_NULL,
 };
 
@@ -244,3 +246,25 @@ static void amdgpu_memory_alloc(void)
 	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
 	CU_ASSERT_EQUAL(r, 0);
 }
+
+static void amdgpu_mem_fail_alloc(void)
+{
+	amdgpu_bo_handle bo;
+	int r;
+	struct amdgpu_bo_alloc_request req = {0};
+	amdgpu_bo_handle buf_handle;
+
+	/* Test impossible mem allocation, 1TB */
+	req.alloc_size = 0xE8D4A51000;
+	req.phys_alignment = 4096;
+	req.preferred_heap = AMDGPU_GEM_DOMAIN_VRAM;
+	req.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
+
+	r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
+	CU_ASSERT_EQUAL(r, -ENOMEM);
+
+	if (!r) {
+		r = amdgpu_bo_free(bo);
+		CU_ASSERT_EQUAL(r, 0);
+	}
+}
-- 
2.7.4

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Re: [PATCH libdrm v2] amdgpu: Add memory over allocation test.

[Christian König]

Am 13.11.2017 um 18:01 schrieb Andrey Grodzovsky:
> Allocates 1 TB of memory. Test is disabled by default
> since it's triggers OOM killer.
>
> v2:
> FIx the test to only alloc the BO and assert if return value
> not equal to -ENOMEM and remove test disable on start.
>
> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>

I was just about to scream that you need to fix the helper first, but 
then I saw that you now directly use amdgpu_bo_alloc().

The commit message could be changed and for the unlikely case that we 
actually can allocate a BO of 1TB size we should free it.

But apart from that the patch looks good to me and is Acked-by: 
Christian König <christian.koenig@amd.com>.

Regards,
Christian.

> ---
>   tests/amdgpu/bo_tests.c | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
>
> diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
> index 4545196..53e76c1 100644
> --- a/tests/amdgpu/bo_tests.c
> +++ b/tests/amdgpu/bo_tests.c
> @@ -47,6 +47,7 @@ static void amdgpu_bo_export_import(void);
>   static void amdgpu_bo_metadata(void);
>   static void amdgpu_bo_map_unmap(void);
>   static void amdgpu_memory_alloc(void);
> +static void amdgpu_mem_fail_alloc(void);
>   
>   CU_TestInfo bo_tests[] = {
>   	{ "Export/Import",  amdgpu_bo_export_import },
> @@ -55,6 +56,7 @@ CU_TestInfo bo_tests[] = {
>   #endif
>   	{ "CPU map/unmap",  amdgpu_bo_map_unmap },
>   	{ "Memory alloc Test",  amdgpu_memory_alloc },
> +	{ "Memory fail alloc Test",  amdgpu_mem_fail_alloc },
>   	CU_TEST_INFO_NULL,
>   };
>   
> @@ -244,3 +246,25 @@ static void amdgpu_memory_alloc(void)
>   	r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
>   	CU_ASSERT_EQUAL(r, 0);
>   }
> +
> +static void amdgpu_mem_fail_alloc(void)
> +{
> +	amdgpu_bo_handle bo;
> +	int r;
> +	struct amdgpu_bo_alloc_request req = {0};
> +	amdgpu_bo_handle buf_handle;
> +
> +	/* Test impossible mem allocation, 1TB */
> +	req.alloc_size = 0xE8D4A51000;
> +	req.phys_alignment = 4096;
> +	req.preferred_heap = AMDGPU_GEM_DOMAIN_VRAM;
> +	req.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
> +
> +	r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
> +	CU_ASSERT_EQUAL(r, -ENOMEM);
> +
> +	if (!r) {
> +		r = amdgpu_bo_free(bo);
> +		CU_ASSERT_EQUAL(r, 0);
> +	}
> +}


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Re: [PATCH libdrm v2] amdgpu: Add memory over allocation test.

[Andrey Grodzovsky]

On 11/14/2017 03:44 AM, Christian König wrote:
> Am 13.11.2017 um 18:01 schrieb Andrey Grodzovsky:
>> Allocates 1 TB of memory. Test is disabled by default
>> since it's triggers OOM killer.
>>
>> v2:
>> FIx the test to only alloc the BO and assert if return value
>> not equal to -ENOMEM and remove test disable on start.
>>
>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
>
> I was just about to scream that you need to fix the helper first, but 
> then I saw that you now directly use amdgpu_bo_alloc().
>
> The commit message could be changed and for the unlikely case that we 
> actually can allocate a BO of 1TB size we should free it.

The patch already does this

if (!r) {
         r = amdgpu_bo_free(bo);
         CU_ASSERT_EQUAL(r, 0);
     }

Thanks,
Andrey

>
> But apart from that the patch looks good to me and is Acked-by: 
> Christian König <christian.koenig@amd.com>.
>
> Regards,
> Christian.
>
>> ---
>>   tests/amdgpu/bo_tests.c | 24 ++++++++++++++++++++++++
>>   1 file changed, 24 insertions(+)
>>
>> diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
>> index 4545196..53e76c1 100644
>> --- a/tests/amdgpu/bo_tests.c
>> +++ b/tests/amdgpu/bo_tests.c
>> @@ -47,6 +47,7 @@ static void amdgpu_bo_export_import(void);
>>   static void amdgpu_bo_metadata(void);
>>   static void amdgpu_bo_map_unmap(void);
>>   static void amdgpu_memory_alloc(void);
>> +static void amdgpu_mem_fail_alloc(void);
>>     CU_TestInfo bo_tests[] = {
>>       { "Export/Import",  amdgpu_bo_export_import },
>> @@ -55,6 +56,7 @@ CU_TestInfo bo_tests[] = {
>>   #endif
>>       { "CPU map/unmap",  amdgpu_bo_map_unmap },
>>       { "Memory alloc Test",  amdgpu_memory_alloc },
>> +    { "Memory fail alloc Test",  amdgpu_mem_fail_alloc },
>>       CU_TEST_INFO_NULL,
>>   };
>>   @@ -244,3 +246,25 @@ static void amdgpu_memory_alloc(void)
>>       r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
>>       CU_ASSERT_EQUAL(r, 0);
>>   }
>> +
>> +static void amdgpu_mem_fail_alloc(void)
>> +{
>> +    amdgpu_bo_handle bo;
>> +    int r;
>> +    struct amdgpu_bo_alloc_request req = {0};
>> +    amdgpu_bo_handle buf_handle;
>> +
>> +    /* Test impossible mem allocation, 1TB */
>> +    req.alloc_size = 0xE8D4A51000;
>> +    req.phys_alignment = 4096;
>> +    req.preferred_heap = AMDGPU_GEM_DOMAIN_VRAM;
>> +    req.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
>> +
>> +    r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
>> +    CU_ASSERT_EQUAL(r, -ENOMEM);
>> +
>> +    if (!r) {
>> +        r = amdgpu_bo_free(bo);
>> +        CU_ASSERT_EQUAL(r, 0);
>> +    }
>> +}
>
>

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Re: [PATCH libdrm v2] amdgpu: Add memory over allocation test.

[Christian König]

Am 14.11.2017 um 13:53 schrieb Andrey Grodzovsky:
>
>
> On 11/14/2017 03:44 AM, Christian König wrote:
>> Am 13.11.2017 um 18:01 schrieb Andrey Grodzovsky:
>>> Allocates 1 TB of memory. Test is disabled by default
>>> since it's triggers OOM killer.
>>>
>>> v2:
>>> FIx the test to only alloc the BO and assert if return value
>>> not equal to -ENOMEM and remove test disable on start.
>>>
>>> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
>>
>> I was just about to scream that you need to fix the helper first, but 
>> then I saw that you now directly use amdgpu_bo_alloc().
>>
>> The commit message could be changed and for the unlikely case that we 
>> actually can allocate a BO of 1TB size we should free it.
>
> The patch already does this
>
> if (!r) {
>         r = amdgpu_bo_free(bo);
>         CU_ASSERT_EQUAL(r, 0);
>     }

Not enough sleep last night.

Going to review and push the patch now.

Thanks,
Christian.

>
>
> Thanks,
> Andrey
>
>>
>> But apart from that the patch looks good to me and is Acked-by: 
>> Christian König <christian.koenig@amd.com>.
>>
>> Regards,
>> Christian.
>>
>>> ---
>>>   tests/amdgpu/bo_tests.c | 24 ++++++++++++++++++++++++
>>>   1 file changed, 24 insertions(+)
>>>
>>> diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
>>> index 4545196..53e76c1 100644
>>> --- a/tests/amdgpu/bo_tests.c
>>> +++ b/tests/amdgpu/bo_tests.c
>>> @@ -47,6 +47,7 @@ static void amdgpu_bo_export_import(void);
>>>   static void amdgpu_bo_metadata(void);
>>>   static void amdgpu_bo_map_unmap(void);
>>>   static void amdgpu_memory_alloc(void);
>>> +static void amdgpu_mem_fail_alloc(void);
>>>     CU_TestInfo bo_tests[] = {
>>>       { "Export/Import",  amdgpu_bo_export_import },
>>> @@ -55,6 +56,7 @@ CU_TestInfo bo_tests[] = {
>>>   #endif
>>>       { "CPU map/unmap",  amdgpu_bo_map_unmap },
>>>       { "Memory alloc Test",  amdgpu_memory_alloc },
>>> +    { "Memory fail alloc Test",  amdgpu_mem_fail_alloc },
>>>       CU_TEST_INFO_NULL,
>>>   };
>>>   @@ -244,3 +246,25 @@ static void amdgpu_memory_alloc(void)
>>>       r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
>>>       CU_ASSERT_EQUAL(r, 0);
>>>   }
>>> +
>>> +static void amdgpu_mem_fail_alloc(void)
>>> +{
>>> +    amdgpu_bo_handle bo;
>>> +    int r;
>>> +    struct amdgpu_bo_alloc_request req = {0};
>>> +    amdgpu_bo_handle buf_handle;
>>> +
>>> +    /* Test impossible mem allocation, 1TB */
>>> +    req.alloc_size = 0xE8D4A51000;
>>> +    req.phys_alignment = 4096;
>>> +    req.preferred_heap = AMDGPU_GEM_DOMAIN_VRAM;
>>> +    req.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
>>> +
>>> +    r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
>>> +    CU_ASSERT_EQUAL(r, -ENOMEM);
>>> +
>>> +    if (!r) {
>>> +        r = amdgpu_bo_free(bo);
>>> +        CU_ASSERT_EQUAL(r, 0);
>>> +    }
>>> +}
>>
>>
>

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