* [PATCH v2 0/4] Add Loongson HD Audio support
@ 2023-06-06 13:25 Yanteng Si
2023-06-06 13:25 ` [PATCH v2 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Yanteng Si @ 2023-06-06 13:25 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel
v2:
* Handling with two new flags added to struct hdac_bus.
v1:
* The Loongson HDA controller is compatible with High Definition Audio
Specification Revision 1.0a.
See <https://loongson.github.io/LoongArch-Documentation/Loongson-
7A1000-usermanual-EN.html#hda-controller>
Yanteng Si (4):
ALSA: hda: Add Loongson LS7A HD-Audio support
ALSA: hda: Using polling mode for loongson controller by default
ALSA: hda: Workaround for SDnCTL register on loongson controller
ALSA: hda/intel: Workaround for WALLCLK register for loongson
controller
include/linux/pci_ids.h | 3 +++
include/sound/hdaudio.h | 2 ++
sound/hda/hdac_controller.c | 5 ++++-
sound/hda/hdac_device.c | 1 +
sound/hda/hdac_stream.c | 6 +++++-
sound/pci/hda/hda_intel.c | 15 +++++++++++++++
sound/pci/hda/patch_hdmi.c | 1 +
7 files changed, 31 insertions(+), 2 deletions(-)
--
2.31.4
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support
2023-06-06 13:25 [PATCH v2 0/4] Add Loongson HD Audio support Yanteng Si
@ 2023-06-06 13:25 ` Yanteng Si
2023-06-06 13:25 ` [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Yanteng Si @ 2023-06-06 13:25 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel
Add the new PCI ID 0x0014 0x7a07 and the new PCI ID 0x0014 0x7a37
Loongson HDA controller.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
---
include/linux/pci_ids.h | 3 +++
sound/hda/hdac_device.c | 1 +
sound/pci/hda/hda_intel.c | 7 +++++++
sound/pci/hda/patch_hdmi.c | 1 +
4 files changed, 12 insertions(+)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index e43ab203054a..f2aecb78f628 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -158,6 +158,9 @@
#define PCI_VENDOR_ID_LOONGSON 0x0014
+#define PCI_DEVICE_ID_LOONGSON_HDA 0x7a07
+#define PCI_DEVICE_ID_LOONGSON_HDMI 0x7a37
+
#define PCI_VENDOR_ID_SOLIDIGM 0x025e
#define PCI_VENDOR_ID_TTTECH 0x0357
diff --git a/sound/hda/hdac_device.c b/sound/hda/hdac_device.c
index 6c043fbd606f..bbf7bcdb449a 100644
--- a/sound/hda/hdac_device.c
+++ b/sound/hda/hdac_device.c
@@ -645,6 +645,7 @@ struct hda_vendor_id {
};
static const struct hda_vendor_id hda_vendor_ids[] = {
+ { 0x0014, "Loongson" },
{ 0x1002, "ATI" },
{ 0x1013, "Cirrus Logic" },
{ 0x1057, "Motorola" },
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 3226691ac923..9c353dc7740c 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -237,6 +237,7 @@ enum {
AZX_DRIVER_CTHDA,
AZX_DRIVER_CMEDIA,
AZX_DRIVER_ZHAOXIN,
+ AZX_DRIVER_LOONGSON,
AZX_DRIVER_GENERIC,
AZX_NUM_DRIVERS, /* keep this as last entry */
};
@@ -360,6 +361,7 @@ static const char * const driver_short_names[] = {
[AZX_DRIVER_CTHDA] = "HDA Creative",
[AZX_DRIVER_CMEDIA] = "HDA C-Media",
[AZX_DRIVER_ZHAOXIN] = "HDA Zhaoxin",
+ [AZX_DRIVER_LOONGSON] = "HDA Loongson",
[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
};
@@ -2809,6 +2811,11 @@ static const struct pci_device_id azx_ids[] = {
.driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
/* Zhaoxin */
{ PCI_DEVICE(0x1d17, 0x3288), .driver_data = AZX_DRIVER_ZHAOXIN },
+ /* Loongson HDAudio*/
+ {PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_HDA),
+ .driver_data = AZX_DRIVER_LOONGSON },
+ {PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, PCI_DEVICE_ID_LOONGSON_HDMI),
+ .driver_data = AZX_DRIVER_LOONGSON },
{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 5c0b1a09fd57..260d3e64f658 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -4505,6 +4505,7 @@ static int patch_gf_hdmi(struct hda_codec *codec)
* patch entries
*/
static const struct hda_device_id snd_hda_id_hdmi[] = {
+HDA_CODEC_ENTRY(0x00147a47, "Loongson HDMI", patch_generic_hdmi),
HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI", patch_atihdmi),
HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI", patch_atihdmi),
HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI", patch_atihdmi),
--
2.31.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default
2023-06-06 13:25 [PATCH v2 0/4] Add Loongson HD Audio support Yanteng Si
2023-06-06 13:25 ` [PATCH v2 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
@ 2023-06-06 13:25 ` Yanteng Si
2023-06-06 13:39 ` Takashi Iwai
2023-06-06 13:25 ` [PATCH v2 3/4] ALSA: hda: Workaround for SDnCTL register on loongson controller Yanteng Si
2023-06-06 13:25 ` [PATCH v2 4/4] ALSA: hda/intel: Workaround for WALLCLK register for " Yanteng Si
3 siblings, 1 reply; 8+ messages in thread
From: Yanteng Si @ 2023-06-06 13:25 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel, Yingkun Meng
On loongson controller, RIRBSTS.RINTFL cannot be cleared,
azx_interrupt() is called all the time. We disable RIRB
interrupt, and use polling mode by default.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
---
include/sound/hdaudio.h | 1 +
sound/hda/hdac_controller.c | 5 ++++-
sound/pci/hda/hda_intel.c | 4 ++++
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index 97f09acae302..a1dcc7f97d08 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -346,6 +346,7 @@ struct hdac_bus {
bool reverse_assign:1; /* assign devices in reverse order */
bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
bool polling_mode:1;
+ bool no_intr_polling_mode:1;
bool needs_damn_long_delay:1;
int poll_count;
diff --git a/sound/hda/hdac_controller.c b/sound/hda/hdac_controller.c
index 3c7af6558249..705e09cc50ac 100644
--- a/sound/hda/hdac_controller.c
+++ b/sound/hda/hdac_controller.c
@@ -79,7 +79,10 @@ void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
/* set N=1, get RIRB response interrupt for new entry */
snd_hdac_chip_writew(bus, RINTCNT, 1);
/* enable rirb dma and response irq */
- snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
+ if (bus->no_intr_polling_mode)
+ snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN);
+ else
+ snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
/* Accept unsolicited responses */
snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);
spin_unlock_irq(&bus->reg_lock);
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 9c353dc7740c..1e8993836fc6 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1875,6 +1875,10 @@ static int azx_first_init(struct azx *chip)
if (chip->driver_type == AZX_DRIVER_GFHDMI)
bus->polling_mode = 1;
+ if (chip->driver_type == AZX_DRIVER_LOONGSON) {
+ bus->no_intr_polling_mode = 1;
+ }
+
err = pcim_iomap_regions(pci, 1 << 0, "ICH HD audio");
if (err < 0)
return err;
--
2.31.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/4] ALSA: hda: Workaround for SDnCTL register on loongson controller
2023-06-06 13:25 [PATCH v2 0/4] Add Loongson HD Audio support Yanteng Si
2023-06-06 13:25 ` [PATCH v2 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
2023-06-06 13:25 ` [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
@ 2023-06-06 13:25 ` Yanteng Si
2023-06-06 13:39 ` Takashi Iwai
2023-06-06 13:25 ` [PATCH v2 4/4] ALSA: hda/intel: Workaround for WALLCLK register for " Yanteng Si
3 siblings, 1 reply; 8+ messages in thread
From: Yanteng Si @ 2023-06-06 13:25 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel, Yingkun Meng
On loongson controller, after calling snd_hdac_stream_updateb()
to enable DMA engine, the SDnCTL.STRM will become to zero. We
need to access SDnCTL in dword to keep SDnCTL.STRM is not changed.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
---
include/sound/hdaudio.h | 1 +
sound/hda/hdac_stream.c | 6 +++++-
sound/pci/hda/hda_intel.c | 1 +
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index a1dcc7f97d08..859becb0eaba 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -348,6 +348,7 @@ struct hdac_bus {
bool polling_mode:1;
bool no_intr_polling_mode:1;
bool needs_damn_long_delay:1;
+ bool access_sdnctl_in_dword:1;
int poll_count;
diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c
index 1f56fd33b9af..2633a4bb1d85 100644
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -150,7 +150,11 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev)
stripe_ctl);
}
/* set DMA start and interrupt mask */
- snd_hdac_stream_updateb(azx_dev, SD_CTL,
+ if (bus->access_sdnctl_in_dword)
+ snd_hdac_stream_updatel(azx_dev, SD_CTL,
+ 0, SD_CTL_DMA_START | SD_INT_MASK);
+ else
+ snd_hdac_stream_updateb(azx_dev, SD_CTL,
0, SD_CTL_DMA_START | SD_INT_MASK);
azx_dev->running = true;
}
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 1e8993836fc6..0222a1721b4d 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1877,6 +1877,7 @@ static int azx_first_init(struct azx *chip)
if (chip->driver_type == AZX_DRIVER_LOONGSON) {
bus->no_intr_polling_mode = 1;
+ bus->access_sdnctl_in_dword = 1;
}
err = pcim_iomap_regions(pci, 1 << 0, "ICH HD audio");
--
2.31.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 4/4] ALSA: hda/intel: Workaround for WALLCLK register for loongson controller
2023-06-06 13:25 [PATCH v2 0/4] Add Loongson HD Audio support Yanteng Si
` (2 preceding siblings ...)
2023-06-06 13:25 ` [PATCH v2 3/4] ALSA: hda: Workaround for SDnCTL register on loongson controller Yanteng Si
@ 2023-06-06 13:25 ` Yanteng Si
3 siblings, 0 replies; 8+ messages in thread
From: Yanteng Si @ 2023-06-06 13:25 UTC (permalink / raw)
To: tiwai
Cc: Yanteng Si, perex, chenhuacai, alsa-devel, loongarch,
loongson-kernel, Yingkun Meng
On loongson controller, the value of WALLCLK register
is always 0, which is meaningless, so we return directly.
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
---
sound/pci/hda/hda_intel.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 0222a1721b4d..56b42d786c8b 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -655,6 +655,9 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
unsigned int pos;
snd_pcm_uframes_t hwptr, target;
+ if (chip->driver_type == AZX_DRIVER_LOONGSON)
+ return 1;
+
wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
return -1; /* bogus (too early) interrupt */
--
2.31.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default
2023-06-06 13:25 ` [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
@ 2023-06-06 13:39 ` Takashi Iwai
2023-06-07 4:48 ` Yanteng Si
0 siblings, 1 reply; 8+ messages in thread
From: Takashi Iwai @ 2023-06-06 13:39 UTC (permalink / raw)
To: Yanteng Si
Cc: tiwai, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel,
Yingkun Meng
On Tue, 06 Jun 2023 15:25:28 +0200,
Yanteng Si wrote:
>
> On loongson controller, RIRBSTS.RINTFL cannot be cleared,
> azx_interrupt() is called all the time. We disable RIRB
> interrupt, and use polling mode by default.
>
> Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
> Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
> ---
> include/sound/hdaudio.h | 1 +
> sound/hda/hdac_controller.c | 5 ++++-
> sound/pci/hda/hda_intel.c | 4 ++++
> 3 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
> index 97f09acae302..a1dcc7f97d08 100644
> --- a/include/sound/hdaudio.h
> +++ b/include/sound/hdaudio.h
> @@ -346,6 +346,7 @@ struct hdac_bus {
> bool reverse_assign:1; /* assign devices in reverse order */
> bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
> bool polling_mode:1;
> + bool no_intr_polling_mode:1;
It isn't clear enough what this flag does. It's basically prohibiting
the RIRB IRQ (hence requiring the polling mode), right? Write it in
the comment.
> diff --git a/sound/hda/hdac_controller.c b/sound/hda/hdac_controller.c
> index 3c7af6558249..705e09cc50ac 100644
> --- a/sound/hda/hdac_controller.c
> +++ b/sound/hda/hdac_controller.c
> @@ -79,7 +79,10 @@ void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
> /* set N=1, get RIRB response interrupt for new entry */
> snd_hdac_chip_writew(bus, RINTCNT, 1);
> /* enable rirb dma and response irq */
> - snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
> + if (bus->no_intr_polling_mode)
> + snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN);
> + else
> + snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
> /* Accept unsolicited responses */
> snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);
> spin_unlock_irq(&bus->reg_lock);
> diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
> index 9c353dc7740c..1e8993836fc6 100644
> --- a/sound/pci/hda/hda_intel.c
> +++ b/sound/pci/hda/hda_intel.c
> @@ -1875,6 +1875,10 @@ static int azx_first_init(struct azx *chip)
> if (chip->driver_type == AZX_DRIVER_GFHDMI)
> bus->polling_mode = 1;
>
> + if (chip->driver_type == AZX_DRIVER_LOONGSON) {
> + bus->no_intr_polling_mode = 1;
> + }
Don't you need to set the bus->polling_mode?
thanks,
Takashi
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 3/4] ALSA: hda: Workaround for SDnCTL register on loongson controller
2023-06-06 13:25 ` [PATCH v2 3/4] ALSA: hda: Workaround for SDnCTL register on loongson controller Yanteng Si
@ 2023-06-06 13:39 ` Takashi Iwai
0 siblings, 0 replies; 8+ messages in thread
From: Takashi Iwai @ 2023-06-06 13:39 UTC (permalink / raw)
To: Yanteng Si
Cc: tiwai, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel,
Yingkun Meng
On Tue, 06 Jun 2023 15:25:29 +0200,
Yanteng Si wrote:
>
> On loongson controller, after calling snd_hdac_stream_updateb()
> to enable DMA engine, the SDnCTL.STRM will become to zero. We
> need to access SDnCTL in dword to keep SDnCTL.STRM is not changed.
>
> Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
> Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
> ---
> include/sound/hdaudio.h | 1 +
> sound/hda/hdac_stream.c | 6 +++++-
> sound/pci/hda/hda_intel.c | 1 +
> 3 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
> index a1dcc7f97d08..859becb0eaba 100644
> --- a/include/sound/hdaudio.h
> +++ b/include/sound/hdaudio.h
> @@ -348,6 +348,7 @@ struct hdac_bus {
> bool polling_mode:1;
> bool no_intr_polling_mode:1;
> bool needs_damn_long_delay:1;
> + bool access_sdnctl_in_dword:1;
It's worth for the comment here, too.
thanks,
Takashi
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default
2023-06-06 13:39 ` Takashi Iwai
@ 2023-06-07 4:48 ` Yanteng Si
0 siblings, 0 replies; 8+ messages in thread
From: Yanteng Si @ 2023-06-07 4:48 UTC (permalink / raw)
To: Takashi Iwai
Cc: tiwai, perex, chenhuacai, alsa-devel, loongarch, loongson-kernel,
Yingkun Meng
在 2023/6/6 21:39, Takashi Iwai 写道:
> On Tue, 06 Jun 2023 15:25:28 +0200,
> Yanteng Si wrote:
>> On loongson controller, RIRBSTS.RINTFL cannot be cleared,
>> azx_interrupt() is called all the time. We disable RIRB
>> interrupt, and use polling mode by default.
>>
>> Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
>> Signed-off-by: Yingkun Meng <mengyingkun@loongson.cn>
>> ---
>> include/sound/hdaudio.h | 1 +
>> sound/hda/hdac_controller.c | 5 ++++-
>> sound/pci/hda/hda_intel.c | 4 ++++
>> 3 files changed, 9 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
>> index 97f09acae302..a1dcc7f97d08 100644
>> --- a/include/sound/hdaudio.h
>> +++ b/include/sound/hdaudio.h
>> @@ -346,6 +346,7 @@ struct hdac_bus {
>> bool reverse_assign:1; /* assign devices in reverse order */
>> bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
>> bool polling_mode:1;
>> + bool no_intr_polling_mode:1;
> It isn't clear enough what this flag does. It's basically prohibiting
> the RIRB IRQ (hence requiring the polling mode), right? Write it in
> the comment.
OK!
>
>> diff --git a/sound/hda/hdac_controller.c b/sound/hda/hdac_controller.c
>> index 3c7af6558249..705e09cc50ac 100644
>> --- a/sound/hda/hdac_controller.c
>> +++ b/sound/hda/hdac_controller.c
>> @@ -79,7 +79,10 @@ void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus)
>> /* set N=1, get RIRB response interrupt for new entry */
>> snd_hdac_chip_writew(bus, RINTCNT, 1);
>> /* enable rirb dma and response irq */
>> - snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
>> + if (bus->no_intr_polling_mode)
>> + snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN);
>> + else
>> + snd_hdac_chip_writeb(bus, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
>> /* Accept unsolicited responses */
>> snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL);
>> spin_unlock_irq(&bus->reg_lock);
>> diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
>> index 9c353dc7740c..1e8993836fc6 100644
>> --- a/sound/pci/hda/hda_intel.c
>> +++ b/sound/pci/hda/hda_intel.c
>> @@ -1875,6 +1875,10 @@ static int azx_first_init(struct azx *chip)
>> if (chip->driver_type == AZX_DRIVER_GFHDMI)
>> bus->polling_mode = 1;
>>
>> + if (chip->driver_type == AZX_DRIVER_LOONGSON) {
>> + bus->no_intr_polling_mode = 1;
>> + }
> Don't you need to set the bus->polling_mode?
Yes, I do.
Although it works now, some messages will print.
Thanks,
Yanteng
>
>
> thanks,
>
> Takashi
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-06-07 4:49 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-06 13:25 [PATCH v2 0/4] Add Loongson HD Audio support Yanteng Si
2023-06-06 13:25 ` [PATCH v2 1/4] ALSA: hda: Add Loongson LS7A HD-Audio support Yanteng Si
2023-06-06 13:25 ` [PATCH v2 2/4] ALSA: hda: Using polling mode for loongson controller by default Yanteng Si
2023-06-06 13:39 ` Takashi Iwai
2023-06-07 4:48 ` Yanteng Si
2023-06-06 13:25 ` [PATCH v2 3/4] ALSA: hda: Workaround for SDnCTL register on loongson controller Yanteng Si
2023-06-06 13:39 ` Takashi Iwai
2023-06-06 13:25 ` [PATCH v2 4/4] ALSA: hda/intel: Workaround for WALLCLK register for " Yanteng Si
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.