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From: Liu Ying <victor.liu@nxp.com>
To: "Guido Günther" <guido.gunther@puri.sm>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org, kishon@ti.com,
	vkoul@kernel.org, robh+dt@kernel.org, a.hajda@samsung.com,
	narmstrong@baylibre.com, Laurent.pinchart@ideasonboard.com,
	jonas@kwiboo.se, jernej.skrabec@siol.net, airlied@linux.ie,
	daniel@ffwll.ch, shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	robert.chiras@nxp.com, martin.kepplinger@puri.sm
Subject: Re: [PATCH 0/4] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
Date: Tue, 08 Dec 2020 17:40:43 +0800	[thread overview]
Message-ID: <bda6bff4a5740a352832a1d1b8cf7608b02ccd00.camel@nxp.com> (raw)
In-Reply-To: <20201208090244.GA20575@bogon.m.sigxcpu.org>

Hi Guido,

On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> > 
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
> 
> This looks good to me from the NWL and actual phy driver part. I'll
> comment in the individual patches but leave comments on the extension
> of the generic phy struct to someone knowledgeable with that part.

Thank you for the review.

> 
> What display controllers do you intend to drive that with?

The display controller DPU embedded in i.MX8qxp SoC would drive the
MIPI DSI display or the LVDS display through the Mixel combo PHY.

I've sent out a series to add DPU DRM driver support(KMS part only so
far) for review:
https://www.spinics.net/lists/kernel/msg3762462.html

I can Cc you when I send the next version for it.

Regards,
Liu Ying

> Cheers,
>  -- Guido
> 
> > The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
> > MIPI DPHY mode or LVDS PHY mode.  The PHY mode is controlled by i.MX8qxp
> > SCU firmware.  The PHY driver would call a SCU function to configure the
> > mode.
> > 
> > The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC,
> > where it appears to be a single MIPI DPHY.
> > 
> > 
> > Patch 1/4 sets PHY mode in the Northwest Logic MIPI DSI host controller
> > bridge driver, since i.MX8qxp SoC embeds this controller IP to support
> > MIPI DSI displays together with the Mixel PHY.
> > 
> > Patch 2/4 allows LVDS PHYs to be configured through the generic PHY functions
> > and through a custom structure added to the generic PHY configuration union.
> > 
> > Patch 3/4 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC.
> > 
> > Patch 4/4 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver.
> > 
> > 
> > Welcome comments, thanks.
> > 
> > 
> > Liu Ying (4):
> >   drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
> >   phy: Add LVDS configuration options
> >   dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
> >     i.MX8qxp
> >   phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode
> >     support
> > 
> >  .../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt |   8 +-
> >  drivers/gpu/drm/bridge/nwl-dsi.c                   |   6 +
> >  drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c     | 266 ++++++++++++++++++++-
> >  include/linux/phy/phy-lvds.h                       |  48 ++++
> >  include/linux/phy/phy.h                            |   4 +
> >  5 files changed, 320 insertions(+), 12 deletions(-)
> >  create mode 100644 include/linux/phy/phy-lvds.h
> > 
> > -- 
> > 2.7.4
> > 


WARNING: multiple messages have this Message-ID (diff)
From: Liu Ying <victor.liu@nxp.com>
To: "Guido Günther" <guido.gunther@puri.sm>
Cc: devicetree@vger.kernel.org, jernej.skrabec@siol.net,
	kernel@pengutronix.de, narmstrong@baylibre.com, airlied@linux.ie,
	festevam@gmail.com, s.hauer@pengutronix.de, jonas@kwiboo.se,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	kishon@ti.com, a.hajda@samsung.com, vkoul@kernel.org,
	robh+dt@kernel.org, Laurent.pinchart@ideasonboard.com,
	daniel@ffwll.ch, robert.chiras@nxp.com,
	martin.kepplinger@puri.sm, shawnguo@kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com
Subject: Re: [PATCH 0/4] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
Date: Tue, 08 Dec 2020 17:40:43 +0800	[thread overview]
Message-ID: <bda6bff4a5740a352832a1d1b8cf7608b02ccd00.camel@nxp.com> (raw)
In-Reply-To: <20201208090244.GA20575@bogon.m.sigxcpu.org>

Hi Guido,

On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> > 
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
> 
> This looks good to me from the NWL and actual phy driver part. I'll
> comment in the individual patches but leave comments on the extension
> of the generic phy struct to someone knowledgeable with that part.

Thank you for the review.

> 
> What display controllers do you intend to drive that with?

The display controller DPU embedded in i.MX8qxp SoC would drive the
MIPI DSI display or the LVDS display through the Mixel combo PHY.

I've sent out a series to add DPU DRM driver support(KMS part only so
far) for review:
https://www.spinics.net/lists/kernel/msg3762462.html

I can Cc you when I send the next version for it.

Regards,
Liu Ying

> Cheers,
>  -- Guido
> 
> > The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
> > MIPI DPHY mode or LVDS PHY mode.  The PHY mode is controlled by i.MX8qxp
> > SCU firmware.  The PHY driver would call a SCU function to configure the
> > mode.
> > 
> > The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC,
> > where it appears to be a single MIPI DPHY.
> > 
> > 
> > Patch 1/4 sets PHY mode in the Northwest Logic MIPI DSI host controller
> > bridge driver, since i.MX8qxp SoC embeds this controller IP to support
> > MIPI DSI displays together with the Mixel PHY.
> > 
> > Patch 2/4 allows LVDS PHYs to be configured through the generic PHY functions
> > and through a custom structure added to the generic PHY configuration union.
> > 
> > Patch 3/4 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC.
> > 
> > Patch 4/4 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver.
> > 
> > 
> > Welcome comments, thanks.
> > 
> > 
> > Liu Ying (4):
> >   drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
> >   phy: Add LVDS configuration options
> >   dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
> >     i.MX8qxp
> >   phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode
> >     support
> > 
> >  .../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt |   8 +-
> >  drivers/gpu/drm/bridge/nwl-dsi.c                   |   6 +
> >  drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c     | 266 ++++++++++++++++++++-
> >  include/linux/phy/phy-lvds.h                       |  48 ++++
> >  include/linux/phy/phy.h                            |   4 +
> >  5 files changed, 320 insertions(+), 12 deletions(-)
> >  create mode 100644 include/linux/phy/phy-lvds.h
> > 
> > -- 
> > 2.7.4
> > 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Liu Ying <victor.liu@nxp.com>
To: "Guido Günther" <guido.gunther@puri.sm>
Cc: devicetree@vger.kernel.org, jernej.skrabec@siol.net,
	kernel@pengutronix.de, narmstrong@baylibre.com, airlied@linux.ie,
	s.hauer@pengutronix.de, jonas@kwiboo.se,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	kishon@ti.com, a.hajda@samsung.com, vkoul@kernel.org,
	robh+dt@kernel.org, Laurent.pinchart@ideasonboard.com,
	robert.chiras@nxp.com, martin.kepplinger@puri.sm,
	shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-imx@nxp.com
Subject: Re: [PATCH 0/4] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
Date: Tue, 08 Dec 2020 17:40:43 +0800	[thread overview]
Message-ID: <bda6bff4a5740a352832a1d1b8cf7608b02ccd00.camel@nxp.com> (raw)
In-Reply-To: <20201208090244.GA20575@bogon.m.sigxcpu.org>

Hi Guido,

On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> > 
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
> 
> This looks good to me from the NWL and actual phy driver part. I'll
> comment in the individual patches but leave comments on the extension
> of the generic phy struct to someone knowledgeable with that part.

Thank you for the review.

> 
> What display controllers do you intend to drive that with?

The display controller DPU embedded in i.MX8qxp SoC would drive the
MIPI DSI display or the LVDS display through the Mixel combo PHY.

I've sent out a series to add DPU DRM driver support(KMS part only so
far) for review:
https://www.spinics.net/lists/kernel/msg3762462.html

I can Cc you when I send the next version for it.

Regards,
Liu Ying

> Cheers,
>  -- Guido
> 
> > The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either
> > MIPI DPHY mode or LVDS PHY mode.  The PHY mode is controlled by i.MX8qxp
> > SCU firmware.  The PHY driver would call a SCU function to configure the
> > mode.
> > 
> > The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC,
> > where it appears to be a single MIPI DPHY.
> > 
> > 
> > Patch 1/4 sets PHY mode in the Northwest Logic MIPI DSI host controller
> > bridge driver, since i.MX8qxp SoC embeds this controller IP to support
> > MIPI DSI displays together with the Mixel PHY.
> > 
> > Patch 2/4 allows LVDS PHYs to be configured through the generic PHY functions
> > and through a custom structure added to the generic PHY configuration union.
> > 
> > Patch 3/4 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC.
> > 
> > Patch 4/4 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver.
> > 
> > 
> > Welcome comments, thanks.
> > 
> > 
> > Liu Ying (4):
> >   drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
> >   phy: Add LVDS configuration options
> >   dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
> >     i.MX8qxp
> >   phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode
> >     support
> > 
> >  .../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt |   8 +-
> >  drivers/gpu/drm/bridge/nwl-dsi.c                   |   6 +
> >  drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c     | 266 ++++++++++++++++++++-
> >  include/linux/phy/phy-lvds.h                       |  48 ++++
> >  include/linux/phy/phy.h                            |   4 +
> >  5 files changed, 320 insertions(+), 12 deletions(-)
> >  create mode 100644 include/linux/phy/phy-lvds.h
> > 
> > -- 
> > 2.7.4
> > 

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2020-12-08  9:43 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-04  7:33 [PATCH 0/4] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support Liu Ying
2020-12-04  7:33 ` Liu Ying
2020-12-04  7:33 ` Liu Ying
2020-12-04  7:33 ` [PATCH 1/4] drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable() Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-08  9:04   ` Guido Günther
2020-12-08  9:04     ` Guido Günther
2020-12-08  9:04     ` Guido Günther
2020-12-15  8:30     ` Guido Günther
2020-12-15  8:30       ` Guido Günther
2020-12-15  8:30       ` Guido Günther
2020-12-04  7:33 ` [PATCH 2/4] phy: Add LVDS configuration options Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-08 12:38   ` Laurent Pinchart
2020-12-08 12:38     ` Laurent Pinchart
2020-12-08 12:38     ` Laurent Pinchart
2020-12-09  1:20     ` Liu Ying
2020-12-09  1:20       ` Liu Ying
2020-12-09  1:20       ` Liu Ying
2020-12-04  7:33 ` [PATCH 3/4] dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-08  9:07   ` Guido Günther
2020-12-08  9:07     ` Guido Günther
2020-12-08  9:07     ` Guido Günther
2020-12-08  9:46     ` Liu Ying
2020-12-08  9:46       ` Liu Ying
2020-12-08  9:46       ` Liu Ying
2020-12-04  7:33 ` [PATCH 4/4] phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-04  7:33   ` Liu Ying
2020-12-08  9:24   ` Guido Günther
2020-12-08  9:24     ` Guido Günther
2020-12-08  9:24     ` Guido Günther
2020-12-08 10:03     ` Liu Ying
2020-12-08 10:03       ` Liu Ying
2020-12-08 10:03       ` Liu Ying
2020-12-10  7:14       ` Guido Günther
2020-12-10  7:14         ` Guido Günther
2020-12-10  7:14         ` Guido Günther
2020-12-10  8:56         ` Liu Ying
2020-12-10  8:56           ` Liu Ying
2020-12-10  8:56           ` Liu Ying
2020-12-08  9:02 ` [PATCH 0/4] phy: " Guido Günther
2020-12-08  9:02   ` Guido Günther
2020-12-08  9:02   ` Guido Günther
2020-12-08  9:40   ` Liu Ying [this message]
2020-12-08  9:40     ` Liu Ying
2020-12-08  9:40     ` Liu Ying

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