* [PATCH] mtd: spi-nor: Enable locking for n25q128a13
@ 2021-06-28 21:17 Jonathan Lemon
2021-07-01 10:13 ` Michael Walle
2021-10-19 10:15 ` Tudor.Ambarus
0 siblings, 2 replies; 4+ messages in thread
From: Jonathan Lemon @ 2021-06-28 21:17 UTC (permalink / raw)
To: tudor.ambarus, miquel.raynal, richard, vigneshr; +Cc: linux-mtd, kernel-team
As 4bit block protection patchset for some micron models are merged,
n25q128a13 also uses 4 bit Block Protection scheme, so enable locking
for it. Tested it on n25q128a13, the locking functions work well.
Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com>
---
drivers/mtd/spi-nor/micron-st.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index c224e59820a1..f3d19b716b7b 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -146,7 +146,9 @@ static const struct flash_info st_parts[] = {
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256,
- SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+ SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
+ SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
{ "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512,
SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
--
2.30.2
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] mtd: spi-nor: Enable locking for n25q128a13
2021-06-28 21:17 [PATCH] mtd: spi-nor: Enable locking for n25q128a13 Jonathan Lemon
@ 2021-07-01 10:13 ` Michael Walle
2021-07-01 19:10 ` Jonathan Lemon
2021-10-19 10:15 ` Tudor.Ambarus
1 sibling, 1 reply; 4+ messages in thread
From: Michael Walle @ 2021-07-01 10:13 UTC (permalink / raw)
To: Jonathan Lemon
Cc: tudor.ambarus, miquel.raynal, richard, vigneshr, linux-mtd, kernel-team
Hi Jonathan,
Am 2021-06-28 23:17, schrieb Jonathan Lemon:
> As 4bit block protection patchset for some micron models are merged,
> n25q128a13 also uses 4 bit Block Protection scheme, so enable locking
> for it. Tested it on n25q128a13, the locking functions work well.
>
> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com>
> ---
> drivers/mtd/spi-nor/micron-st.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/micron-st.c
> b/drivers/mtd/spi-nor/micron-st.c
> index c224e59820a1..f3d19b716b7b 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -146,7 +146,9 @@ static const struct flash_info st_parts[] = {
> SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
> SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
> { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256,
> - SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
> + SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
> + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
> + SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
> { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512,
> SECT_4K | USE_FSR | SPI_NOR_DUAL_READ |
> SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
For the maintainers: there are no configuration bits which could
change the behavior of the block protection - which we possibly
won't support yet. Thus this looks sane:
Reviewed-by: Michael Walle <michael@walle.cc>
Jonathan, could you also apply my SFDP patch [1] (or use the latest
linux-next) and send me the binary SFDP dump?
-michael
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=241877
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] mtd: spi-nor: Enable locking for n25q128a13
2021-07-01 10:13 ` Michael Walle
@ 2021-07-01 19:10 ` Jonathan Lemon
0 siblings, 0 replies; 4+ messages in thread
From: Jonathan Lemon @ 2021-07-01 19:10 UTC (permalink / raw)
To: Michael Walle
Cc: tudor.ambarus, miquel.raynal, richard, vigneshr, linux-mtd, kernel-team
On 1 Jul 2021, at 3:13, Michael Walle wrote:
> Jonathan, could you also apply my SFDP patch [1] (or use the latest
> linux-next) and send me the binary SFDP dump?
>
> -michael
>
> [1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=241877
[root@timecard DRV]# cat /sys/bus/spi/devices/spi2048.0/spi-nor/jedec_id
20ba18
[root@timecard DRV]# cat /sys/bus/spi/devices/spi2048.0/spi-nor/manufacturer
st
[root@timecard DRV]# cat /sys/bus/spi/devices/spi2048.0/spi-nor/partname
n25q128a13
[root@timecard DRV]# hexdump /sys/bus/spi/devices/spi2048.0/spi-nor/sfdp
0000000 4653 5044 0105 ff01 0500 1001 0030 ff00
0000010 0003 0201 0100 ff00 ffff ffff ffff ffff
0000020 ffff ffff ffff ffff ffff ffff ffff ffff
0000030 20e5 fff1 ffff 07ff eb29 6b27 3b27 bb27
0000040 ffff ffff ffff bb27 ffff eb29 200c d810
0000050 0000 0000 8a35 0001 a382 cb03 c1ac 2e04
0000060 757a 757a 00fb 8000 0f08 ff82 3d81 0000
0000070 ffff ffff ffff ffff ffff ffff ffff ffff
*
0000100 ffff ffff ffff ffff
0000108
--
Jonathan
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] mtd: spi-nor: Enable locking for n25q128a13
2021-06-28 21:17 [PATCH] mtd: spi-nor: Enable locking for n25q128a13 Jonathan Lemon
2021-07-01 10:13 ` Michael Walle
@ 2021-10-19 10:15 ` Tudor.Ambarus
1 sibling, 0 replies; 4+ messages in thread
From: Tudor.Ambarus @ 2021-10-19 10:15 UTC (permalink / raw)
To: jonathan.lemon, miquel.raynal, richard, vigneshr; +Cc: linux-mtd, kernel-team
On 6/29/21 12:17 AM, Jonathan Lemon wrote:
> As 4bit block protection patchset for some micron models are merged,
> n25q128a13 also uses 4 bit Block Protection scheme, so enable locking
> for it. Tested it on n25q128a13, the locking functions work well.
>
> Signed-off-by: Jonathan Lemon <jonathan.lemon@gmail.com>
> ---
> drivers/mtd/spi-nor/micron-st.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Applied, thanks.
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2021-06-28 21:17 [PATCH] mtd: spi-nor: Enable locking for n25q128a13 Jonathan Lemon
2021-07-01 10:13 ` Michael Walle
2021-07-01 19:10 ` Jonathan Lemon
2021-10-19 10:15 ` Tudor.Ambarus
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