* [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards.
@ 2016-05-25 5:23 Heiko Schocher
2016-05-25 5:23 ` [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45 Heiko Schocher
` (4 more replies)
0 siblings, 5 replies; 16+ messages in thread
From: Heiko Schocher @ 2016-05-25 5:23 UTC (permalink / raw)
To: u-boot
This patchset adds DM / DTS support for the siemens at91 based
boards.
No special patches here, just based on the AT91 DM patches
from Simon:
[U-Boot,v2,01/18] at91: Add support for the AT91 slow clock controller
http://patchwork.ozlabs.org/patch/618949/
[U-Boot,v2,02/18] arm: Allow skipping of low-level init with I-cache on
http://patchwork.ozlabs.org/patch/618951/
[U-Boot,v2,03/18] bootm: Align cache flush end address correctly
http://patchwork.ozlabs.org/patch/618950/
[U-Boot,v2,04/18] net: Handle an empty bootp extension section
http://patchwork.ozlabs.org/patch/618953/
[U-Boot,v2,05/18] net: macb: Prepare for driver-model conversion
http://patchwork.ozlabs.org/patch/618954/
[U-Boot,v2,06/18] net: macb: Flush correct cache portion when sending
http://patchwork.ozlabs.org/patch/618952/
[U-Boot,v2,07/18] net: macb: Convert to driver model
http://patchwork.ozlabs.org/patch/618956/
[U-Boot,v2,08/18] arm: at91: dts: Bring in device tree file for AT91SAM9G45
http://patchwork.ozlabs.org/patch/618960/
[U-Boot,v2,09/18] arm: at91: Add a header file for the real-time clock
http://patchwork.ozlabs.org/patch/618958/
[U-Boot,v2,10/18] at91: Correct NAND ECC register access
http://patchwork.ozlabs.org/patch/618955/
[U-Boot,v2,11/18] at91: nand: Set up the ECC strength correctly
http://patchwork.ozlabs.org/patch/618957/
[U-Boot,v2,12/18] mtd: nand: Drop a blank line in nand_wait()
http://patchwork.ozlabs.org/patch/618961/
[U-Boot,v2,13/18] at91: Add driver-model GPIO devices for AT91SAM9G45
http://patchwork.ozlabs.org/patch/618959/
[U-Boot,v2,14/18] at91: mtd: nand: Add dev_warn() to correct build error in driver
http://patchwork.ozlabs.org/patch/618962/
and pulled in from linux some dtsi files. And added the DTS
files for the siemens at91 boards.
Heiko Schocher (5):
arm: at91: add CONFIG_AT91SAM9M10G45
corvus DTS / DM support
arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260
arm: at91: smartweb: add DM and DTS support
arm: at91: taurus/axm: add DM and DTS support
arch/arm/dts/Makefile | 4 +-
arch/arm/dts/at91sam9260-smartweb.dts | 110 +++
arch/arm/dts/at91sam9260.dtsi | 1034 +++++++++++++++++++++++++
arch/arm/dts/at91sam9261.dtsi | 876 +++++++++++++++++++++
arch/arm/dts/at91sam9263.dtsi | 1034 +++++++++++++++++++++++++
arch/arm/dts/at91sam9g20-taurus.dts | 119 +++
arch/arm/dts/at91sam9g20.dtsi | 68 ++
arch/arm/dts/at91sam9g45-corvus.dts | 108 +++
arch/arm/mach-at91/Kconfig | 12 +
arch/arm/mach-at91/include/mach/at91_matrix.h | 26 +-
board/siemens/corvus/board.c | 41 +-
board/siemens/smartweb/smartweb.c | 32 +-
board/siemens/taurus/taurus.c | 25 +
configs/axm_defconfig | 5 +-
configs/corvus_defconfig | 8 +
configs/smartweb_defconfig | 7 +-
configs/taurus_defconfig | 5 +-
include/configs/corvus.h | 2 +-
include/configs/smartweb.h | 6 +-
include/configs/taurus.h | 2 +-
20 files changed, 3492 insertions(+), 32 deletions(-)
create mode 100644 arch/arm/dts/at91sam9260-smartweb.dts
create mode 100644 arch/arm/dts/at91sam9260.dtsi
create mode 100644 arch/arm/dts/at91sam9261.dtsi
create mode 100644 arch/arm/dts/at91sam9263.dtsi
create mode 100644 arch/arm/dts/at91sam9g20-taurus.dts
create mode 100644 arch/arm/dts/at91sam9g20.dtsi
create mode 100644 arch/arm/dts/at91sam9g45-corvus.dts
--
2.5.5
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45
2016-05-25 5:23 [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards Heiko Schocher
@ 2016-05-25 5:23 ` Heiko Schocher
2016-06-25 21:33 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot,v1,1/5] " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 2/5] corvus DTS / DM support Heiko Schocher
` (3 subsequent siblings)
4 siblings, 2 replies; 16+ messages in thread
From: Heiko Schocher @ 2016-05-25 5:23 UTC (permalink / raw)
To: u-boot
add support for CONFIG_AT91SAM9M10G45.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm/mach-at91/include/mach/at91_matrix.h | 26 ++++++++++++++------------
1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
index 2379dd4..61e36c4 100644
--- a/arch/arm/mach-at91/include/mach/at91_matrix.h
+++ b/arch/arm/mach-at91/include/mach/at91_matrix.h
@@ -15,7 +15,7 @@
#define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x30)
#elif defined(CONFIG_AT91SAM9263)
#define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x120)
-#elif defined(CONFIG_AT91SAM9G45)
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
#define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x128)
#else
#error AT91_ASM_MATRIX_CSA0 is not definied for current CPU
@@ -33,7 +33,7 @@
#elif defined(CONFIG_AT91SAM9263)
#define AT91_MATRIX_MASTERS 9
#define AT91_MATRIX_SLAVES 7
-#elif defined(CONFIG_AT91SAM9G45)
+#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_MASTERS 11
#define AT91_MATRIX_SLAVES 8
#else
@@ -63,7 +63,7 @@ typedef struct at91_matrix {
u32 reserve3[32 - (2 * AT91_MATRIX_SLAVES)];
u32 mrcr; /* 0x100 Master Remap Control */
u32 reserve4[3];
-#if defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
u32 ccr[52]; /* 0x110 - 0x1E0 Chip Configuration */
u32 womr; /* 0x1E4 Write Protect Mode */
u32 wpsr; /* 0x1E8 Write Protect Status */
@@ -106,14 +106,14 @@ typedef struct at91_matrix {
/* Undefined Length Burst Type */
#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
- defined(CONFIG_AT91SAM9G45)
+ defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_MCFG_ULBT_INFINITE 0x00000000
#define AT91_MATRIX_MCFG_ULBT_SINGLE 0x00000001
#define AT91_MATRIX_MCFG_ULBT_FOUR 0x00000002
#define AT91_MATRIX_MCFG_ULBT_EIGHT 0x00000003
#define AT91_MATRIX_MCFG_ULBT_SIXTEEN 0x00000004
#endif
-#if defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO 0x00000005
#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR 0x00000006
#define AT91_MATRIX_MCFG_ULBT_128 0x00000007
@@ -125,14 +125,15 @@ typedef struct at91_matrix {
#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED 0x00020000
/* Fixed Index of Default Master */
-#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) || \
+ defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18)
#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18)
#endif
/* Maximum Number of Allowed Cycles for a Burst */
-#if defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0)
#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
defined(CONFIG_AT91SAM9263)
@@ -147,13 +148,14 @@ typedef struct at91_matrix {
/* Master Remap Control Register */
#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
- defined(CONFIG_AT91SAM9G45)
+ defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_MRCR_RCB0 (1 << 0)
/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_MRCR_RCB1 (1 << 1)
#endif
-#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) || \
+ defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_MRCR_RCB2 0x00000004
#define AT91_MATRIX_MRCR_RCB3 0x00000008
#define AT91_MATRIX_MRCR_RCB4 0x00000010
@@ -162,14 +164,14 @@ typedef struct at91_matrix {
#define AT91_MATRIX_MRCR_RCB7 0x00000080
#define AT91_MATRIX_MRCR_RCB8 0x00000100
#endif
-#if defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
#define AT91_MATRIX_MRCR_RCB9 0x00000200
#define AT91_MATRIX_MRCR_RCB10 0x00000400
#define AT91_MATRIX_MRCR_RCB11 0x00000800
#endif
/* TCM Configuration Register */
-#if defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
/* Size of ITCM enabled memory block */
#define AT91_MATRIX_TCMR_ITCM_0 0x00000000
#define AT91_MATRIX_TCMR_ITCM_32 0x00000040
@@ -204,7 +206,7 @@ typedef struct at91_matrix {
#define AT91_MATRIX_TCMR_DTCM_64 0x00000070
#endif
-#if defined(CONFIG_AT91SAM9G45)
+#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
/* Video Mode Configuration Register */
#define AT91C_MATRIX_VDEC_SEL_OFF 0x00000000
#define AT91C_MATRIX_VDEC_SEL_ON 0x00000001
--
2.5.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 2/5] corvus DTS / DM support
2016-05-25 5:23 [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards Heiko Schocher
2016-05-25 5:23 ` [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45 Heiko Schocher
@ 2016-05-25 5:23 ` Heiko Schocher
2016-06-25 21:35 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot,v1,2/5] " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260 Heiko Schocher
` (2 subsequent siblings)
4 siblings, 2 replies; 16+ messages in thread
From: Heiko Schocher @ 2016-05-25 5:23 UTC (permalink / raw)
To: u-boot
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/at91sam9g45-corvus.dts | 108 ++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/Kconfig | 4 ++
board/siemens/corvus/board.c | 41 +++++++++++++-
configs/corvus_defconfig | 8 +++
include/configs/corvus.h | 2 +-
6 files changed, 160 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/dts/at91sam9g45-corvus.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3bfce04..a8c4fd2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -2,7 +2,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
-dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-gurnard.dtb
+dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-corvus.dtb
dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
diff --git a/arch/arm/dts/at91sam9g45-corvus.dts b/arch/arm/dts/at91sam9g45-corvus.dts
new file mode 100644
index 0000000..c207c02
--- /dev/null
+++ b/arch/arm/dts/at91sam9g45-corvus.dts
@@ -0,0 +1,108 @@
+/*
+ * at91sam9g45-corvus.dts Device Tree file fir Siemens corvus board
+ * (C) Copyright 2016 Heiko Schocher <hs@denx.de>
+ *
+ * based on:
+ * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
+ *
+ * Copyright (C) 2011 Atmel,
+ * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+#include "at91sam9g45.dtsi"
+
+/ {
+ model = "Siemens corvus";
+ compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
+
+ chosen {
+ stdout-path = &dbgu;
+ };
+
+ memory {
+ reg = <0x70000000 0x8000000>;
+ };
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <12000000>;
+ };
+ };
+
+ ahb {
+ apb {
+ dbgu: serial at ffffee00 {
+ status = "okay";
+ };
+
+ usart1: serial at fff90000 {
+ pinctrl-0 =
+ <&pinctrl_usart1
+ &pinctrl_usart1_rts
+ &pinctrl_usart1_cts>;
+ status = "okay";
+ };
+
+ macb0: ethernet at fffbc000 {
+ phy-mode = "rmii";
+ status = "okay";
+ };
+
+ watchdog at fffffd40 {
+ status = "okay";
+ };
+
+ spi0: spi at fffa4000{
+ status = "okay";
+ cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
+ mtd_dataflash at 0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <13000000>;
+ reg = <0>;
+ };
+ };
+
+ usb2: gadget at fff78000 {
+ atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ rtc at fffffd20 {
+ atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+ status = "okay";
+ };
+
+ gpbr: syscon at fffffd60 {
+ status = "okay";
+ };
+
+ rtc at fffffdb0 {
+ status = "okay";
+ };
+ };
+
+ nand0: nand at 40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+ };
+
+ usb0: ohci at 00700000 {
+ status = "okay";
+ num-ports = <2>;
+ atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
+ &pioD 3 GPIO_ACTIVE_LOW>;
+ };
+
+ usb1: ehci at 00800000 {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 9ce775e..7933137 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -109,6 +109,10 @@ config TARGET_CORVUS
bool "Support corvus"
select CPU_ARM926EJS
select SUPPORT_SPL
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+ select DM_ETH
config TARGET_TAURUS
bool "Support taurus"
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index 9d52661..d4416e6 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -11,21 +11,23 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
#include <asm/arch/at91sam9g45_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_rstc.h>
+#include <asm/arch/atmel_serial.h>
#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#include <asm/arch/clk.h>
-#include <lcd.h>
-#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
+#ifndef CONFIG_DM_ETH
#include <netdev.h>
+#endif
#include <spi.h>
#ifdef CONFIG_USB_GADGET_ATMEL_USBA
@@ -34,6 +36,24 @@
DECLARE_GLOBAL_DATA_PTR;
+static void corvus_request_gpio(void)
+{
+ gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
+ gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
+ gpio_request(AT91_PIN_PD7, "d0");
+ gpio_request(AT91_PIN_PD8, "d1");
+ gpio_request(AT91_PIN_PA12, "d2");
+ gpio_request(AT91_PIN_PA13, "d3");
+ gpio_request(AT91_PIN_PA15, "d4");
+ gpio_request(AT91_PIN_PB7, "recovery button");
+ gpio_request(AT91_PIN_PD1, "USB0");
+ gpio_request(AT91_PIN_PD3, "USB1");
+ gpio_request(AT91_PIN_PB18, "SPICS1");
+ gpio_request(AT91_PIN_PB3, "SPICS0");
+ gpio_request(CONFIG_RED_LED, "red led");
+ gpio_request(CONFIG_GREEN_LED, "green led");
+}
+
static void corvus_nand_hw_init(void)
{
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
@@ -78,6 +98,7 @@ static void corvus_nand_hw_init(void)
void spl_board_init(void)
{
+ corvus_request_gpio();
/*
* For on the sam9m10g45ek board, the chip wm9711 stay in the test
* mode, so it need do some action to exit mode.
@@ -200,6 +221,7 @@ static void corvus_macb_hw_init(void)
int board_early_init_f(void)
{
at91_seriald_hw_init();
+ corvus_request_gpio();
return 0;
}
@@ -220,6 +242,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ /* we have to request the gpios again after relocation */
+ corvus_request_gpio();
#ifdef CONFIG_CMD_NAND
corvus_nand_hw_init();
#endif
@@ -249,6 +273,7 @@ int dram_init(void)
return 0;
}
+#ifndef CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
int rc = 0;
@@ -257,6 +282,7 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+#endif
/* SPI chip select control */
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
@@ -289,3 +315,12 @@ void spi_cs_deactivate(struct spi_slave *slave)
break;
}
}
+
+static struct atmel_serial_platdata at91sam9260_serial_plat = {
+ .base_addr = ATMEL_BASE_DBGU,
+};
+
+U_BOOT_DEVICE(at91sam9260_serial) = {
+ .name = "serial_atmel",
+ .platdata = &at91sam9260_serial_plat,
+};
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 37488dd..31ebe4c 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_CORVUS=y
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus"
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
CONFIG_HUSH_PARSER=y
@@ -13,6 +14,8 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
@@ -24,3 +27,8 @@ CONFIG_G_DNL_MANUFACTURER="Siemens AG"
CONFIG_G_DNL_VENDOR_NUM=0x0908
CONFIG_G_DNL_PRODUCT_NUM=0x02d2
CONFIG_OF_LIBFDT=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 8b3c715..b61888f 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -35,7 +35,7 @@
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
--
2.5.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260
2016-05-25 5:23 [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards Heiko Schocher
2016-05-25 5:23 ` [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45 Heiko Schocher
2016-05-25 5:23 ` [U-Boot] [PATCH v1 2/5] corvus DTS / DM support Heiko Schocher
@ 2016-05-25 5:23 ` Heiko Schocher
2016-06-25 21:36 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support Heiko Schocher
2016-05-25 5:23 ` [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: " Heiko Schocher
4 siblings, 2 replies; 16+ messages in thread
From: Heiko Schocher @ 2016-05-25 5:23 UTC (permalink / raw)
To: u-boot
Add this files from Linux v4.6-rc5
66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO]
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm/dts/at91sam9260.dtsi | 1034 +++++++++++++++++++++++++++++++++++++++++
arch/arm/dts/at91sam9261.dtsi | 876 ++++++++++++++++++++++++++++++++++
arch/arm/dts/at91sam9263.dtsi | 1034 +++++++++++++++++++++++++++++++++++++++++
arch/arm/dts/at91sam9g20.dtsi | 68 +++
4 files changed, 3012 insertions(+)
create mode 100644 arch/arm/dts/at91sam9260.dtsi
create mode 100644 arch/arm/dts/at91sam9261.dtsi
create mode 100644 arch/arm/dts/at91sam9263.dtsi
create mode 100644 arch/arm/dts/at91sam9g20.dtsi
diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi
new file mode 100644
index 0000000..d4884dd
--- /dev/null
+++ b/arch/arm/dts/at91sam9260.dtsi
@@ -0,0 +1,1034 @@
+/*
+ * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
+ *
+ * Copyright (C) 2011 Atmel,
+ * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
+ * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+
+/ {
+ model = "Atmel AT91SAM9260 family SoC";
+ compatible = "atmel,at91sam9260";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ serial4 = &usart3;
+ serial5 = &uart0;
+ serial6 = &uart1;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ tcb0 = &tcb0;
+ tcb1 = &tcb1;
+ i2c0 = &i2c0;
+ ssc0 = &ssc0;
+ };
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x04000000>;
+ };
+
+ clocks {
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ adc_op_clk: adc_op_clk{
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <5000000>;
+ };
+ };
+
+ sram0: sram at 002ff000 {
+ compatible = "mmio-sram";
+ reg = <0x002ff000 0x2000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ aic: interrupt-controller at fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <29 30 31>;
+ };
+
+ ramc0: ramc at ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
+ pmc: pmc at fffffc00 {
+ compatible = "atmel,at91sam9260-pmc", "syscon";
+ reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ slow_rc_osc: slow_rc_osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-accuracy = <50000000>;
+ };
+
+ clk32k: slck {
+ compatible = "atmel,at91sam9260-clk-slow";
+ #clock-cells = <0>;
+ clocks = <&slow_rc_osc>, <&slow_xtal>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
+ <150000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 5000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 105000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ adc_clk: adc_clk {
+ #clock-cells = <0>;
+ reg = <5>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <11>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <22>;
+ };
+
+ usart3_clk: usart3_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ uart0_clk: uart0_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ uart1_clk: uart1_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ tc3_clk: tc3_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ tc4_clk: tc4_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ tc5_clk: tc5_clk {
+ #clock-cells = <0>;
+ reg = <28>;
+ };
+ };
+ };
+
+ rstc at fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ clocks = <&clk32k>;
+ };
+
+ shdwc at fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ clocks = <&clk32k>;
+ };
+
+ pit: timer at fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
+ };
+
+ tcb0: timer at fffa0000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffa0000 0x100>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0
+ 19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+ };
+
+ tcb1: timer at fffdc000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffdc000 0x100>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
+ 27 IRQ_TYPE_LEVEL_HIGH 0
+ 28 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+ };
+
+ pinctrl at fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff400 0xfffff400 0x600>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xffffffff 0xffc00c3b /* pioA */
+ 0xffffffff 0x7fff3ccf /* pioB */
+ 0xffffffff 0x007fffff /* pioC */
+ >;
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
+ };
+
+ pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
+ atmel,pins =
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
+ };
+
+ pinctrl_usart0_dcd: usart0_dcd-0 {
+ atmel,pins =
+ <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
+ };
+
+ pinctrl_usart0_ri: usart0_ri-0 {
+ atmel,pins =
+ <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
+ };
+ };
+
+ usart3 {
+ pinctrl_usart3: usart3-0 {
+ atmel,pins =
+ <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
+ };
+
+ pinctrl_usart3_rts: usart3_rts-0 {
+ atmel,pins =
+ <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart3_cts: usart3_cts-0 {
+ atmel,pins =
+ <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ uart0 {
+ pinctrl_uart0: uart0-0 {
+ atmel,pins =
+ <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
+ AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
+ };
+ };
+
+ uart1 {
+ pinctrl_uart1: uart1-0 {
+ atmel,pins =
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
+ };
+ };
+
+ macb {
+ pinctrl_macb_rmii: macb_rmii-0 {
+ atmel,pins =
+ <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
+ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
+ AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
+ AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
+ AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
+ };
+
+ pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+ atmel,pins =
+ <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
+ AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
+ AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
+ AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
+ AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
+ AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
+ };
+
+ pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
+ atmel,pins =
+ <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
+ AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
+ AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
+ AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
+ AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+ AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
+ };
+
+ pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
+ AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
+ };
+
+ pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
+ AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
+ AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
+ AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
+ };
+ };
+
+ spi1 {
+ pinctrl_spi1: spi1-0 {
+ atmel,pins =
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
+ };
+ };
+
+ i2c_gpio0 {
+ pinctrl_i2c_gpio0: i2c_gpio0-0 {
+ atmel,pins =
+ <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
+ AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb1 {
+ pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+ atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+ atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+ atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+ atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+ atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+ atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+ atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+ atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+ atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ pioA: gpio at fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ };
+
+ pioB: gpio at fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ };
+
+ pioC: gpio at fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ };
+ };
+
+ dbgu: serial at fffff200 {
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart0: serial at fffb0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb0000 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart1: serial at fffb4000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb4000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart2: serial at fffb8000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb8000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart3: serial at fffd0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffd0000 0x200>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart3>;
+ clocks = <&usart3_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ uart0: serial at fffd4000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffd4000 0x200>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart0>;
+ clocks = <&uart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ uart1: serial at fffd8000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffd8000 0x200>;
+ interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&uart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ macb0: ethernet at fffc4000 {
+ compatible = "cdns,at91sam9260-macb", "cdns,macb";
+ reg = <0xfffc4000 0x100>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
+ status = "disabled";
+ };
+
+ usb1: gadget at fffa4000 {
+ compatible = "atmel,at91sam9260-udc";
+ reg = <0xfffa4000 0x4000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
+ i2c0: i2c at fffac000 {
+ compatible = "atmel,at91sam9260-i2c";
+ reg = <0xfffac000 0x100>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&twi0_clk>;
+ status = "disabled";
+ };
+
+ mmc0: mmc at fffa8000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfffa8000 0x600>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
+ status = "disabled";
+ };
+
+ ssc0: ssc at fffbc000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffbc000 0x4000>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ spi0: spi at fffc8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffc8000 0x200>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ spi1: spi at fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ adc0: adc at fffe0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91sam9260-adc";
+ reg = <0xfffe0000 0x100>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&adc_clk>, <&adc_op_clk>;
+ clock-names = "adc_clk", "adc_op_clk";
+ atmel,adc-use-external-triggers;
+ atmel,adc-channels-used = <0xf>;
+ atmel,adc-vref = <3300>;
+ atmel,adc-startup-time = <15>;
+ atmel,adc-res = <8 10>;
+ atmel,adc-res-names = "lowres", "highres";
+ atmel,adc-use-res = "highres";
+
+ trigger at 0 {
+ reg = <0>;
+ trigger-name = "timer-counter-0";
+ trigger-value = <0x1>;
+ };
+ trigger at 1 {
+ reg = <1>;
+ trigger-name = "timer-counter-1";
+ trigger-value = <0x3>;
+ };
+
+ trigger at 2 {
+ reg = <2>;
+ trigger-name = "timer-counter-2";
+ trigger-value = <0x5>;
+ };
+
+ trigger at 3 {
+ reg = <3>;
+ trigger-name = "external";
+ trigger-value = <0xd>;
+ trigger-external;
+ };
+ };
+
+ rtc at fffffd20 {
+ compatible = "atmel,at91sam9260-rtt";
+ reg = <0xfffffd20 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k>;
+ status = "disabled";
+ };
+
+ watchdog at fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ status = "disabled";
+ };
+
+ gpbr: syscon at fffffd50 {
+ compatible = "atmel,at91sam9260-gpbr", "syscon";
+ reg = <0xfffffd50 0x10>;
+ status = "disabled";
+ };
+ };
+
+ nand0: nand at 40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000
+ 0xffffe800 0x200
+ >;
+ atmel,nand-addr-offset = <21>;
+ atmel,nand-cmd-offset = <22>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+ gpios = <&pioC 13 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
+
+ usb0: ohci at 00500000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00500000 0x100000>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+ };
+
+ i2c at 0 {
+ compatible = "i2c-gpio";
+ gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 24 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_gpio0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/dts/at91sam9261.dtsi b/arch/arm/dts/at91sam9261.dtsi
new file mode 100644
index 0000000..5e09de4
--- /dev/null
+++ b/arch/arm/dts/at91sam9261.dtsi
@@ -0,0 +1,876 @@
+/*
+ * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
+ *
+ * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+
+/ {
+ model = "Atmel AT91SAM9261 family SoC";
+ compatible = "atmel,at91sam9261";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ tcb0 = &tcb0;
+ i2c0 = &i2c0;
+ ssc0 = &ssc0;
+ ssc1 = &ssc1;
+ ssc2 = &ssc2;
+ };
+
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ clocks {
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ sram: sram at 00300000 {
+ compatible = "mmio-sram";
+ reg = <0x00300000 0x28000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ usb0: ohci at 00500000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00500000 0x100000>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+
+ fb0: fb at 0x00600000 {
+ compatible = "atmel,at91sam9261-lcdc";
+ reg = <0x00600000 0x1000>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fb>;
+ clocks = <&lcd_clk>, <&hclk1>;
+ clock-names = "lcdc_clk", "hclk";
+ status = "disabled";
+ };
+
+ nand0: nand at 40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000>;
+ atmel,nand-addr-offset = <22>;
+ atmel,nand-cmd-offset = <21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+
+ gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
+ <&pioC 14 GPIO_ACTIVE_HIGH>,
+ <0>;
+ status = "disabled";
+ };
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ tcb0: timer at fffa0000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfffa0000 0x100>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
+ <18 IRQ_TYPE_LEVEL_HIGH 0>,
+ <19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
+ clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+ };
+
+ usb1: gadget at fffa4000 {
+ compatible = "atmel,at91sam9261-udc";
+ reg = <0xfffa4000 0x4000>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
+ atmel,matrix = <&matrix>;
+ status = "disabled";
+ };
+
+ mmc0: mmc at fffa8000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfffa8000 0x600>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
+ status = "disabled";
+ };
+
+ i2c0: i2c at fffac000 {
+ compatible = "atmel,at91sam9261-i2c";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_twi>;
+ reg = <0xfffac000 0x100>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&twi0_clk>;
+ status = "disabled";
+ };
+
+ usart0: serial at fffb0000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb0000 0x200>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart1: serial at fffb4000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb4000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart2: serial at fffb8000{
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfffb8000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ ssc0: ssc at fffbc000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffbc000 0x4000>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ ssc1: ssc at fffc0000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc0000 0x4000>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ ssc2: ssc at fffc4000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfffc4000 0x4000>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
+ clocks = <&ssc2_clk>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ spi0: spi at fffc8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffc8000 0x200>;
+ cs-gpios = <0>, <0>, <0>, <0>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ spi1: spi at fffcc000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x200>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ ramc: ramc at ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
+ matrix: matrix at ffffee00 {
+ compatible = "atmel,at91sam9260-bus-matrix", "syscon";
+ reg = <0xffffee00 0x200>;
+ };
+
+ aic: interrupt-controller at fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <29 30 31>;
+ };
+
+ dbgu: serial at fffff200 {
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+ reg = <0xfffff200 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ pinctrl at fffff400 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff400 0xfffff400 0x600>;
+
+ atmel,mux-mask =
+ /* A B */
+ <0xffffffff 0xfffffff7>, /* pioA */
+ <0xffffffff 0xfffffff4>, /* pioB */
+ <0xffffffff 0xffffff07>; /* pioC */
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
+ <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ ssc1 {
+ pinctrl_ssc1_tx: ssc1_tx-0 {
+ atmel,pins =
+ <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc1_rx: ssc1_rx-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ ssc2 {
+ pinctrl_ssc2_tx: ssc2_tx-0 {
+ atmel,pins =
+ <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_ssc2_rx: ssc2_rx-0 {
+ atmel,pins =
+ <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ spi1 {
+ pinctrl_spi1: spi1-0 {
+ atmel,pins =
+ <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ i2c0 {
+ pinctrl_i2c_bitbang: i2c-0-bitbang {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
+ <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+ };
+ pinctrl_i2c_twi: i2c-0-twi {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+ };
+
+ fb {
+ pinctrl_fb: fb-0 {
+ atmel,pins =
+ <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
+ <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+ <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ pioA: gpio at fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ };
+
+ pioB: gpio at fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ };
+
+ pioC: gpio at fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ };
+ };
+
+ pmc: pmc at fffffc00 {
+ compatible = "atmel,at91rm9200-pmc", "syscon";
+ reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+ <190000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 5000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 94000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+
+ prog2: prog2 {
+ #clock-cells = <0>;
+ reg = <2>;
+ interrupts = <AT91_PMC_PCKRDY(2)>;
+ };
+
+ prog3: prog3 {
+ #clock-cells = <0>;
+ reg = <3>;
+ interrupts = <AT91_PMC_PCKRDY(3)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ pck2: pck2 {
+ #clock-cells = <0>;
+ reg = <10>;
+ clocks = <&prog2>;
+ };
+
+ pck3: pck3 {
+ #clock-cells = <0>;
+ reg = <11>;
+ clocks = <&prog3>;
+ };
+
+ hclk0: hclk0 {
+ #clock-cells = <0>;
+ reg = <16>;
+ clocks = <&mck>;
+ };
+
+ hclk1: hclk1 {
+ #clock-cells = <0>;
+ reg = <17>;
+ clocks = <&mck>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioC_clk: pioC_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <6>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ twi0_clk: twi0_clk {
+ reg = <11>;
+ #clock-cells = <0>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc2_clk: ssc2_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ tc0_clk: tc0_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ tc1_clk: tc1_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tc2_clk: tc2_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+ };
+ };
+
+ rstc at fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ clocks = <&slow_xtal>;
+ };
+
+ shdwc at fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ clocks = <&slow_xtal>;
+ };
+
+ pit: timer at fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
+ };
+
+ rtc at fffffd20 {
+ compatible = "atmel,at91sam9260-rtt";
+ reg = <0xfffffd20 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&slow_xtal>;
+ status = "disabled";
+ };
+
+ watchdog at fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&slow_xtal>;
+ status = "disabled";
+ };
+
+ gpbr: syscon at fffffd50 {
+ compatible = "atmel,at91sam9260-gpbr", "syscon";
+ reg = <0xfffffd50 0x10>;
+ status = "disabled";
+ };
+ };
+ };
+
+ i2c at 0 {
+ compatible = "i2c-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c_bitbang>;
+ gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
+ <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/dts/at91sam9263.dtsi b/arch/arm/dts/at91sam9263.dtsi
new file mode 100644
index 0000000..9344642
--- /dev/null
+++ b/arch/arm/dts/at91sam9263.dtsi
@@ -0,0 +1,1034 @@
+/*
+ * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2 only.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+
+/ {
+ model = "Atmel AT91SAM9263 family SoC";
+ compatible = "atmel,at91sam9263";
+ interrupt-parent = <&aic>;
+
+ aliases {
+ serial0 = &dbgu;
+ serial1 = &usart0;
+ serial2 = &usart1;
+ serial3 = &usart2;
+ gpio0 = &pioA;
+ gpio1 = &pioB;
+ gpio2 = &pioC;
+ gpio3 = &pioD;
+ gpio4 = &pioE;
+ tcb0 = &tcb0;
+ i2c0 = &i2c0;
+ ssc0 = &ssc0;
+ ssc1 = &ssc1;
+ pwm0 = &pwm0;
+ };
+
+ cpus {
+ #address-cells = <0>;
+ #size-cells = <0>;
+
+ cpu {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ };
+ };
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ clocks {
+ main_xtal: main_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ slow_xtal: slow_xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ sram0: sram at 00300000 {
+ compatible = "mmio-sram";
+ reg = <0x00300000 0x14000>;
+ };
+
+ sram1: sram at 00500000 {
+ compatible = "mmio-sram";
+ reg = <0x00500000 0x4000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ aic: interrupt-controller at fffff000 {
+ #interrupt-cells = <3>;
+ compatible = "atmel,at91rm9200-aic";
+ interrupt-controller;
+ reg = <0xfffff000 0x200>;
+ atmel,external-irqs = <30 31>;
+ };
+
+ pmc: pmc at fffffc00 {
+ compatible = "atmel,at91rm9200-pmc", "syscon";
+ reg = <0xfffffc00 0x100>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+
+ main_osc: main_osc {
+ compatible = "atmel,at91rm9200-clk-main-osc";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+ clocks = <&main_xtal>;
+ };
+
+ main: mainck {
+ compatible = "atmel,at91rm9200-clk-main";
+ #clock-cells = <0>;
+ clocks = <&main_osc>;
+ };
+
+ plla: pllack {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+ clocks = <&main>;
+ reg = <0>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+ <190000000 240000000 2 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91rm9200-clk-pll";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_LOCKB>;
+ clocks = <&main>;
+ reg = <1>;
+ atmel,clk-input-range = <1000000 32000000>;
+ #atmel,pll-clk-output-range-cells = <4>;
+ atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+ <190000000 240000000 2 1>;
+ };
+
+ mck: masterck {
+ compatible = "atmel,at91rm9200-clk-master";
+ #clock-cells = <0>;
+ interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+ atmel,clk-output-range = <0 120000000>;
+ atmel,clk-divisors = <1 2 4 0>;
+ };
+
+ usb: usbck {
+ compatible = "atmel,at91rm9200-clk-usb";
+ #clock-cells = <0>;
+ atmel,clk-divisors = <1 2 4 0>;
+ clocks = <&pllb>;
+ };
+
+ prog: progck {
+ compatible = "atmel,at91rm9200-clk-programmable";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&pmc>;
+ clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
+
+ prog0: prog0 {
+ #clock-cells = <0>;
+ reg = <0>;
+ interrupts = <AT91_PMC_PCKRDY(0)>;
+ };
+
+ prog1: prog1 {
+ #clock-cells = <0>;
+ reg = <1>;
+ interrupts = <AT91_PMC_PCKRDY(1)>;
+ };
+
+ prog2: prog2 {
+ #clock-cells = <0>;
+ reg = <2>;
+ interrupts = <AT91_PMC_PCKRDY(2)>;
+ };
+
+ prog3: prog3 {
+ #clock-cells = <0>;
+ reg = <3>;
+ interrupts = <AT91_PMC_PCKRDY(3)>;
+ };
+ };
+
+ systemck {
+ compatible = "atmel,at91rm9200-clk-system";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ uhpck: uhpck {
+ #clock-cells = <0>;
+ reg = <6>;
+ clocks = <&usb>;
+ };
+
+ udpck: udpck {
+ #clock-cells = <0>;
+ reg = <7>;
+ clocks = <&usb>;
+ };
+
+ pck0: pck0 {
+ #clock-cells = <0>;
+ reg = <8>;
+ clocks = <&prog0>;
+ };
+
+ pck1: pck1 {
+ #clock-cells = <0>;
+ reg = <9>;
+ clocks = <&prog1>;
+ };
+
+ pck2: pck2 {
+ #clock-cells = <0>;
+ reg = <10>;
+ clocks = <&prog2>;
+ };
+
+ pck3: pck3 {
+ #clock-cells = <0>;
+ reg = <11>;
+ clocks = <&prog3>;
+ };
+ };
+
+ periphck {
+ compatible = "atmel,at91rm9200-clk-peripheral";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mck>;
+
+ pioA_clk: pioA_clk {
+ #clock-cells = <0>;
+ reg = <2>;
+ };
+
+ pioB_clk: pioB_clk {
+ #clock-cells = <0>;
+ reg = <3>;
+ };
+
+ pioCDE_clk: pioCDE_clk {
+ #clock-cells = <0>;
+ reg = <4>;
+ };
+
+ usart0_clk: usart0_clk {
+ #clock-cells = <0>;
+ reg = <7>;
+ };
+
+ usart1_clk: usart1_clk {
+ #clock-cells = <0>;
+ reg = <8>;
+ };
+
+ usart2_clk: usart2_clk {
+ #clock-cells = <0>;
+ reg = <9>;
+ };
+
+ mci0_clk: mci0_clk {
+ #clock-cells = <0>;
+ reg = <10>;
+ };
+
+ mci1_clk: mci1_clk {
+ #clock-cells = <0>;
+ reg = <11>;
+ };
+
+ can_clk: can_clk {
+ #clock-cells = <0>;
+ reg = <12>;
+ };
+
+ twi0_clk: twi0_clk {
+ #clock-cells = <0>;
+ reg = <13>;
+ };
+
+ spi0_clk: spi0_clk {
+ #clock-cells = <0>;
+ reg = <14>;
+ };
+
+ spi1_clk: spi1_clk {
+ #clock-cells = <0>;
+ reg = <15>;
+ };
+
+ ssc0_clk: ssc0_clk {
+ #clock-cells = <0>;
+ reg = <16>;
+ };
+
+ ssc1_clk: ssc1_clk {
+ #clock-cells = <0>;
+ reg = <17>;
+ };
+
+ ac97_clk: ac97_clk {
+ #clock-cells = <0>;
+ reg = <18>;
+ };
+
+ tcb_clk: tcb_clk {
+ #clock-cells = <0>;
+ reg = <19>;
+ };
+
+ pwm_clk: pwm_clk {
+ #clock-cells = <0>;
+ reg = <20>;
+ };
+
+ macb0_clk: macb0_clk {
+ #clock-cells = <0>;
+ reg = <21>;
+ };
+
+ g2de_clk: g2de_clk {
+ #clock-cells = <0>;
+ reg = <23>;
+ };
+
+ udc_clk: udc_clk {
+ #clock-cells = <0>;
+ reg = <24>;
+ };
+
+ isi_clk: isi_clk {
+ #clock-cells = <0>;
+ reg = <25>;
+ };
+
+ lcd_clk: lcd_clk {
+ #clock-cells = <0>;
+ reg = <26>;
+ };
+
+ dma_clk: dma_clk {
+ #clock-cells = <0>;
+ reg = <27>;
+ };
+
+ ohci_clk: ohci_clk {
+ #clock-cells = <0>;
+ reg = <29>;
+ };
+ };
+ };
+
+ ramc0: ramc at ffffe200 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffe200 0x200>;
+ };
+
+ ramc1: ramc at ffffe800 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffe800 0x200>;
+ };
+
+ pit: timer at fffffd30 {
+ compatible = "atmel,at91sam9260-pit";
+ reg = <0xfffffd30 0xf>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&mck>;
+ };
+
+ tcb0: timer at fff7c000 {
+ compatible = "atmel,at91rm9200-tcb";
+ reg = <0xfff7c000 0x100>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&tcb_clk>, <&slow_xtal>;
+ clock-names = "t0_clk", "slow_clk";
+ };
+
+ rstc at fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ clocks = <&slow_xtal>;
+ };
+
+ shdwc at fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ clocks = <&slow_xtal>;
+ };
+
+ pinctrl at fffff200 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+ ranges = <0xfffff200 0xfffff200 0xa00>;
+
+ atmel,mux-mask = <
+ /* A B */
+ 0xfffffffb 0xffffe07f /* pioA */
+ 0x0007ffff 0x39072fff /* pioB */
+ 0xffffffff 0x3ffffff8 /* pioC */
+ 0xfffffbff 0xffffffff /* pioD */
+ 0xffe00fff 0xfbfcff00 /* pioE */
+ >;
+
+ /* shared pinctrl settings */
+ dbgu {
+ pinctrl_dbgu: dbgu-0 {
+ atmel,pins =
+ <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
+ AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
+ };
+ };
+
+ usart0 {
+ pinctrl_usart0: usart0-0 {
+ atmel,pins =
+ <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
+ AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
+ };
+
+ pinctrl_usart0_rts: usart0_rts-0 {
+ atmel,pins =
+ <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
+ };
+
+ pinctrl_usart0_cts: usart0_cts-0 {
+ atmel,pins =
+ <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
+ };
+ };
+
+ usart1 {
+ pinctrl_usart1: usart1-0 {
+ atmel,pins =
+ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
+ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
+ };
+
+ pinctrl_usart1_rts: usart1_rts-0 {
+ atmel,pins =
+ <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
+ };
+
+ pinctrl_usart1_cts: usart1_cts-0 {
+ atmel,pins =
+ <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
+ };
+ };
+
+ usart2 {
+ pinctrl_usart2: usart2-0 {
+ atmel,pins =
+ <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
+ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
+ };
+
+ pinctrl_usart2_rts: usart2_rts-0 {
+ atmel,pins =
+ <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
+ };
+
+ pinctrl_usart2_cts: usart2_cts-0 {
+ atmel,pins =
+ <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
+ };
+ };
+
+ nand {
+ pinctrl_nand: nand-0 {
+ atmel,pins =
+ <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
+ AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
+ };
+ };
+
+ macb {
+ pinctrl_macb_rmii: macb_rmii-0 {
+ atmel,pins =
+ <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
+ AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
+ AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
+ AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
+ AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
+ AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
+ AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
+ AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
+ AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
+ AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
+ };
+
+ pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+ atmel,pins =
+ <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
+ AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
+ AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
+ AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
+ AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
+ AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
+ AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
+ AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
+ };
+ };
+
+ mmc0 {
+ pinctrl_mmc0_clk: mmc0_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
+ };
+
+ pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
+ AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
+ };
+
+ pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
+ AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
+ AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
+ };
+
+ pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
+ AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
+ };
+
+ pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
+ };
+ };
+
+ mmc1 {
+ pinctrl_mmc1_clk: mmc1_clk-0 {
+ atmel,pins =
+ <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
+ };
+
+ pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
+ };
+
+ pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
+ };
+
+ pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
+ atmel,pins =
+ <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
+ AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
+ };
+
+ pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
+ atmel,pins =
+ <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
+ AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
+ AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
+ };
+ };
+
+ ssc0 {
+ pinctrl_ssc0_tx: ssc0_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
+ AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
+ AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
+ };
+
+ pinctrl_ssc0_rx: ssc0_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
+ AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
+ AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
+ };
+ };
+
+ ssc1 {
+ pinctrl_ssc1_tx: ssc1_tx-0 {
+ atmel,pins =
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
+ AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
+ };
+
+ pinctrl_ssc1_rx: ssc1_rx-0 {
+ atmel,pins =
+ <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
+ };
+ };
+
+ spi0 {
+ pinctrl_spi0: spi0-0 {
+ atmel,pins =
+ <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
+ AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
+ AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
+ };
+ };
+
+ spi1 {
+ pinctrl_spi1: spi1-0 {
+ atmel,pins =
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
+ AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
+ };
+ };
+
+ tcb0 {
+ pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+ atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+ atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+ atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+ atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+ atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+ atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+ atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+ atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+
+ pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+ atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+ };
+ };
+
+ fb {
+ pinctrl_fb: fb-0 {
+ atmel,pins =
+ <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
+ AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
+ AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
+ AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
+ AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
+ AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
+ AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
+ AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
+ AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
+ AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
+ AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
+ AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
+ AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
+ AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
+ AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
+ AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
+ AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
+ AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
+ AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
+ AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
+ AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
+ AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
+ };
+ };
+
+ can {
+ pinctrl_can_rx_tx: can_rx_tx {
+ atmel,pins =
+ <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
+ };
+ };
+
+ ac97 {
+ pinctrl_ac97: ac97-0 {
+ atmel,pins =
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */
+ };
+ };
+
+ pioA: gpio at fffff200 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff200 0x200>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ };
+
+ pioB: gpio at fffff400 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x200>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ };
+
+ pioC: gpio at fffff600 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
+ };
+
+ pioD: gpio at fffff800 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
+ };
+
+ pioE: gpio at fffffa00 {
+ compatible = "atmel,at91rm9200-gpio";
+ reg = <0xfffffa00 0x200>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioCDE_clk>;
+ };
+ };
+
+ dbgu: serial at ffffee00 {
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+ reg = <0xffffee00 0x200>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dbgu>;
+ clocks = <&mck>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart0: serial at fff8c000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfff8c000 0x200>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart0>;
+ clocks = <&usart0_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart1: serial at fff90000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfff90000 0x200>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart1>;
+ clocks = <&usart1_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ usart2: serial at fff94000 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0xfff94000 0x200>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usart2>;
+ clocks = <&usart2_clk>;
+ clock-names = "usart";
+ status = "disabled";
+ };
+
+ ssc0: ssc at fff98000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfff98000 0x4000>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+ clocks = <&ssc0_clk>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ ssc1: ssc at fff9c000 {
+ compatible = "atmel,at91rm9200-ssc";
+ reg = <0xfff9c000 0x4000>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+ clocks = <&ssc1_clk>;
+ clock-names = "pclk";
+ status = "disabled";
+ };
+
+ ac97: sound at fffa0000 {
+ compatible = "atmel,at91sam9263-ac97c";
+ reg = <0xfffa0000 0x4000>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ac97>;
+ clocks = <&ac97_clk>;
+ clock-names = "ac97_clk";
+ status = "disabled";
+ };
+
+ macb0: ethernet at fffbc000 {
+ compatible = "cdns,at91sam9260-macb", "cdns,macb";
+ reg = <0xfffbc000 0x100>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb_rmii>;
+ clocks = <&macb0_clk>, <&macb0_clk>;
+ clock-names = "hclk", "pclk";
+ status = "disabled";
+ };
+
+ usb1: gadget at fff78000 {
+ compatible = "atmel,at91sam9263-udc";
+ reg = <0xfff78000 0x4000>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&udc_clk>, <&udpck>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
+ i2c0: i2c at fff88000 {
+ compatible = "atmel,at91sam9260-i2c";
+ reg = <0xfff88000 0x100>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&twi0_clk>;
+ status = "disabled";
+ };
+
+ mmc0: mmc at fff80000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfff80000 0x600>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mci0_clk>;
+ clock-names = "mci_clk";
+ status = "disabled";
+ };
+
+ mmc1: mmc at fff84000 {
+ compatible = "atmel,hsmci";
+ reg = <0xfff84000 0x600>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&mci1_clk>;
+ clock-names = "mci_clk";
+ status = "disabled";
+ };
+
+ watchdog at fffffd40 {
+ compatible = "atmel,at91sam9260-wdt";
+ reg = <0xfffffd40 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&slow_xtal>;
+ atmel,watchdog-type = "hardware";
+ atmel,reset-type = "all";
+ atmel,dbg-halt;
+ status = "disabled";
+ };
+
+ spi0: spi at fffa4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffa4000 0x200>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0>;
+ clocks = <&spi0_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ spi1: spi at fffa8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffa8000 0x200>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
+ status = "disabled";
+ };
+
+ pwm0: pwm at fffb8000 {
+ compatible = "atmel,at91sam9rl-pwm";
+ reg = <0xfffb8000 0x300>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
+ #pwm-cells = <3>;
+ clocks = <&pwm_clk>;
+ clock-names = "pwm_clk";
+ status = "disabled";
+ };
+
+ can: can at fffac000 {
+ compatible = "atmel,at91sam9263-can";
+ reg = <0xfffac000 0x300>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_rx_tx>;
+ clocks = <&can_clk>;
+ clock-names = "can_clk";
+ };
+
+ rtc at fffffd20 {
+ compatible = "atmel,at91sam9260-rtt";
+ reg = <0xfffffd20 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&slow_xtal>;
+ status = "disabled";
+ };
+
+ rtc at fffffd50 {
+ compatible = "atmel,at91sam9260-rtt";
+ reg = <0xfffffd50 0x10>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&slow_xtal>;
+ status = "disabled";
+ };
+
+ gpbr: syscon at fffffd60 {
+ compatible = "atmel,at91sam9260-gpbr", "syscon";
+ reg = <0xfffffd60 0x50>;
+ status = "disabled";
+ };
+ };
+
+ fb0: fb at 0x00700000 {
+ compatible = "atmel,at91sam9263-lcdc";
+ reg = <0x00700000 0x1000>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fb>;
+ clocks = <&lcd_clk>, <&lcd_clk>;
+ clock-names = "lcdc_clk", "hclk";
+ status = "disabled";
+ };
+
+ nand0: nand at 40000000 {
+ compatible = "atmel,at91rm9200-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40000000 0x10000000
+ 0xffffe000 0x200
+ >;
+ atmel,nand-addr-offset = <21>;
+ atmel,nand-cmd-offset = <22>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+ gpios = <&pioA 22 GPIO_ACTIVE_HIGH
+ &pioD 15 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ status = "disabled";
+ };
+
+ usb0: ohci at 00a00000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00a00000 0x100000>;
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
+ clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+ };
+
+ i2c at 0 {
+ compatible = "i2c-gpio";
+ gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
+ &pioB 5 GPIO_ACTIVE_HIGH /* scl */
+ >;
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/dts/at91sam9g20.dtsi b/arch/arm/dts/at91sam9g20.dtsi
new file mode 100644
index 0000000..f593016
--- /dev/null
+++ b/arch/arm/dts/at91sam9g20.dtsi
@@ -0,0 +1,68 @@
+/*
+ * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+#include "at91sam9260.dtsi"
+
+/ {
+ model = "Atmel AT91SAM9G20 family SoC";
+ compatible = "atmel,at91sam9g20";
+
+ memory {
+ reg = <0x20000000 0x08000000>;
+ };
+
+ sram0: sram at 002ff000 {
+ status = "disabled";
+ };
+
+ sram1: sram at 002fc000 {
+ compatible = "mmio-sram";
+ reg = <0x002fc000 0x8000>;
+ };
+
+ ahb {
+ apb {
+ i2c0: i2c at fffac000 {
+ compatible = "atmel,at91sam9g20-i2c";
+ };
+
+ ssc0: ssc at fffbc000 {
+ compatible = "atmel,at91sam9rl-ssc";
+ };
+
+ adc0: adc at fffe0000 {
+ atmel,adc-startup-time = <40>;
+ };
+
+ pmc: pmc at fffffc00 {
+ plla: pllack {
+ atmel,clk-input-range = <2000000 32000000>;
+ atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
+ <695000000 750000000 1 0>,
+ <645000000 700000000 2 0>,
+ <595000000 650000000 3 0>,
+ <545000000 600000000 0 1>,
+ <495000000 550000000 1 1>,
+ <445000000 500000000 2 1>,
+ <400000000 450000000 3 1>;
+ };
+
+ pllb: pllbck {
+ compatible = "atmel,at91sam9g20-clk-pllb";
+ atmel,clk-input-range = <2000000 32000000>;
+ atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
+ };
+
+ mck: masterck {
+ atmel,clk-output-range = <0 133000000>;
+ atmel,clk-divisors = <1 2 4 6>;
+ };
+ };
+ };
+ };
+};
--
2.5.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support
2016-05-25 5:23 [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards Heiko Schocher
` (2 preceding siblings ...)
2016-05-25 5:23 ` [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260 Heiko Schocher
@ 2016-05-25 5:23 ` Heiko Schocher
2016-06-25 21:40 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: " Heiko Schocher
4 siblings, 2 replies; 16+ messages in thread
From: Heiko Schocher @ 2016-05-25 5:23 UTC (permalink / raw)
To: u-boot
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/at91sam9260-smartweb.dts | 110 ++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/Kconfig | 4 ++
board/siemens/smartweb/smartweb.c | 32 ++++++++--
configs/smartweb_defconfig | 7 ++-
include/configs/smartweb.h | 6 +-
6 files changed, 149 insertions(+), 13 deletions(-)
create mode 100644 arch/arm/dts/at91sam9260-smartweb.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a8c4fd2..5056ae3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -2,7 +2,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-corvus.dtb
+dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \
+ at91sam9g45-corvus.dtb
dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
diff --git a/arch/arm/dts/at91sam9260-smartweb.dts b/arch/arm/dts/at91sam9260-smartweb.dts
new file mode 100644
index 0000000..faed763
--- /dev/null
+++ b/arch/arm/dts/at91sam9260-smartweb.dts
@@ -0,0 +1,110 @@
+/*
+ * at91sam9260-smartweb.dts
+ * (C) Copyright 2016
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * Based on:
+ * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+/dts-v1/;
+#include "at91sam9260.dtsi"
+
+/ {
+ model = "Siemens smartweb";
+ compatible = "atmel,at91sam9260", "atmel,at91sam9";
+
+ chosen {
+ stdout-path = &dbgu;
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+ apb {
+ pinctrl at fffff400 {
+ board {
+ pinctrl_pck0_as_mck: pck0_as_mck {
+ atmel,pins =
+ <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
+ };
+
+ };
+ };
+
+ dbgu: serial at fffff200 {
+ status = "okay";
+ };
+
+ usart0: serial at fffb0000 {
+ pinctrl-0 =
+ <&pinctrl_usart0
+ &pinctrl_usart0_rts
+ &pinctrl_usart0_cts
+ &pinctrl_usart0_dtr_dsr
+ &pinctrl_usart0_dcd
+ &pinctrl_usart0_ri>;
+ status = "okay";
+ };
+
+ usart1: serial at fffb4000 {
+ status = "okay";
+ };
+
+ macb0: ethernet at fffc4000 {
+ phy-mode = "rmii";
+ status = "okay";
+ };
+
+ usb1: gadget at fffa4000 {
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ ssc0: ssc at fffbc000 {
+ status = "okay";
+ pinctrl-0 = <&pinctrl_ssc0_tx>;
+ };
+
+ rtc at fffffd20 {
+ atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+ status = "okay";
+ };
+
+ watchdog at fffffd40 {
+ status = "okay";
+ };
+
+ gpbr: syscon at fffffd50 {
+ status = "okay";
+ };
+ };
+
+ nand0: nand at 40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+ };
+
+ usb0: ohci at 00500000 {
+ num-ports = <2>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 7933137..5c29dc5 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -123,6 +123,10 @@ config TARGET_SMARTWEB
bool "Support smartweb"
select CPU_ARM926EJS
select SUPPORT_SPL
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+ select DM_ETH
config TARGET_VINCO
bool "Support VINCO"
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
index 47a60a7..78a7946 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -17,23 +17,33 @@
*/
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
#include <asm/arch/at91sam9_sdramc.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
+#include <asm/arch/atmel_serial.h>
#include <asm/arch/at91_spi.h>
#include <spi.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#include <watchdog.h>
-#ifdef CONFIG_MACB
# include <net.h>
+#ifndef CONFIG_DM_ETH
# include <netdev.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
+static void smartweb_request_gpio(void)
+{
+ gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
+ gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
+ gpio_request(AT91_PIN_PA26, "ena PHY");
+}
+
static void smartweb_nand_hw_init(void)
{
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
@@ -65,7 +75,6 @@ static void smartweb_nand_hw_init(void)
at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
-#ifdef CONFIG_MACB
static void smartweb_macb_hw_init(void)
{
struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
@@ -108,7 +117,6 @@ static void smartweb_macb_hw_init(void)
/* Initialize EMAC=MACB hardware */
at91_macb_hw_init();
}
-#endif /* CONFIG_MACB */
#ifdef CONFIG_USB_GADGET_AT91
#include <linux/usb/at91_udc.h>
@@ -133,11 +141,13 @@ int board_early_init_f(void)
{
/* enable this here, as we have SPL without serial support */
at91_seriald_hw_init();
+ smartweb_request_gpio();
return 0;
}
int board_init(void)
{
+ smartweb_request_gpio();
/* power LED red */
at91_set_gpio_output(AT91_PIN_PC6, 0);
at91_set_gpio_output(AT91_PIN_PC7, 1);
@@ -157,9 +167,7 @@ int board_init(void)
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
smartweb_nand_hw_init();
-#ifdef CONFIG_MACB
smartweb_macb_hw_init();
-#endif
return 0;
}
@@ -171,12 +179,14 @@ int dram_init(void)
return 0;
}
+#ifndef CONFIG_DM_ETH
#ifdef CONFIG_MACB
int board_eth_init(bd_t *bis)
{
return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
}
#endif /* CONFIG_MACB */
+#endif
#if defined(CONFIG_SPL_BUILD)
#include <spl.h>
@@ -192,8 +202,9 @@ void matrix_init(void)
&mat->scfg[3]);
}
-void spl_board_init(void)
+void at91_spl_board_init(void)
{
+ smartweb_request_gpio();
/* power LED orange */
at91_set_gpio_output(AT91_PIN_PC6, 1);
at91_set_gpio_output(AT91_PIN_PC7, 1);
@@ -245,3 +256,12 @@ void mem_init(void)
sdramc_initialize(ATMEL_BASE_CS1, &setting);
}
#endif
+
+static struct atmel_serial_platdata at91sam9260_serial_plat = {
+ .base_addr = ATMEL_BASE_DBGU,
+};
+
+U_BOOT_DEVICE(at91sam9260_serial) = {
+ .name = "serial_atmel",
+ .platdata = &at91sam9260_serial_plat,
+};
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 2ec6e48..18206f3 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_SMARTWEB=y
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
@@ -15,13 +16,17 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
CONFIG_CMD_USB=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_SOURCE is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
CONFIG_USB=y
+CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Siemens AG"
CONFIG_G_DNL_VENDOR_NUM=0x0908
CONFIG_G_DNL_PRODUCT_NUM=0x02d2
-CONFIG_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 40b0cd2..b573395 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -45,7 +45,7 @@
#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
-#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* U-Boot is loaded by a bootloader */
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */
@@ -157,10 +157,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_USB_ETHER_MCS7830
-
/* USB DFU support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
--
2.5.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: add DM and DTS support
2016-05-25 5:23 [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards Heiko Schocher
` (3 preceding siblings ...)
2016-05-25 5:23 ` [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support Heiko Schocher
@ 2016-05-25 5:23 ` Heiko Schocher
2016-06-25 21:41 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
4 siblings, 2 replies; 16+ messages in thread
From: Heiko Schocher @ 2016-05-25 5:23 UTC (permalink / raw)
To: u-boot
add DM and DTS support for the at91 based siemens
boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/at91sam9g20-taurus.dts | 119 ++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/Kconfig | 4 ++
board/siemens/taurus/taurus.c | 25 ++++++++
configs/axm_defconfig | 5 +-
configs/taurus_defconfig | 5 +-
include/configs/taurus.h | 2 +-
7 files changed, 158 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/dts/at91sam9g20-taurus.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5056ae3..6b0c0f7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -3,6 +3,7 @@
#
dtb-$(CONFIG_AT91FAMILY) += at91sam9260-smartweb.dtb \
+ at91sam9g20-taurus.dtb \
at91sam9g45-corvus.dtb
dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
diff --git a/arch/arm/dts/at91sam9g20-taurus.dts b/arch/arm/dts/at91sam9g20-taurus.dts
new file mode 100644
index 0000000..f27d772
--- /dev/null
+++ b/arch/arm/dts/at91sam9g20-taurus.dts
@@ -0,0 +1,119 @@
+/*
+ * at91sam9g20-taurus.dts
+ * (C) Copyright 2016
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * Based on:
+ * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+/dts-v1/;
+#include "at91sam9g20.dtsi"
+
+/ {
+ model = "Siemens taurus";
+ compatible = "atmel,at91sam9g20ek", "atmel,at91sam9g20", "atmel,at91sam9";
+
+ chosen {
+ stdout-path = &dbgu;
+ };
+
+ memory {
+ reg = <0x20000000 0x4000000>;
+ };
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <18432000>;
+ };
+ };
+
+ ahb {
+ apb {
+ pinctrl at fffff400 {
+ board {
+ pinctrl_pck0_as_mck: pck0_as_mck {
+ atmel,pins =
+ <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
+ };
+
+ };
+ };
+
+ dbgu: serial at fffff200 {
+ status = "okay";
+ };
+
+ usart0: serial at fffb0000 {
+ pinctrl-0 =
+ <&pinctrl_usart0
+ &pinctrl_usart0_rts
+ &pinctrl_usart0_cts
+ &pinctrl_usart0_dtr_dsr
+ &pinctrl_usart0_dcd
+ &pinctrl_usart0_ri>;
+ status = "okay";
+ };
+
+ usart1: serial at fffb4000 {
+ status = "okay";
+ };
+
+ macb0: ethernet at fffc4000 {
+ phy-mode = "rmii";
+ status = "okay";
+ };
+
+ usb1: gadget at fffa4000 {
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ ssc0: ssc at fffbc000 {
+ status = "okay";
+ pinctrl-0 = <&pinctrl_ssc0_tx>;
+ };
+
+ spi0: spi at fffc8000 {
+ cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
+ mtd_dataflash at 0 {
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <50000000>;
+ reg = <1>;
+ };
+ };
+
+ rtc at fffffd20 {
+ atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+ status = "okay";
+ };
+
+ watchdog at fffffd40 {
+ status = "okay";
+ };
+
+ gpbr: syscon at fffffd50 {
+ status = "okay";
+ };
+ };
+
+ nand0: nand at 40000000 {
+ nand-bus-width = <8>;
+ nand-ecc-mode = "soft";
+ nand-on-flash-bbt;
+ status = "okay";
+ };
+
+ usb0: ohci at 00500000 {
+ num-ports = <2>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5c29dc5..84e7bfe 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -118,6 +118,10 @@ config TARGET_TAURUS
bool "Support taurus"
select CPU_ARM926EJS
select SUPPORT_SPL
+ select DM
+ select DM_SERIAL
+ select DM_GPIO
+ select DM_ETH
config TARGET_SMARTWEB
bool "Support smartweb"
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index b0385d8..8da24be 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -14,6 +14,7 @@
#include <command.h>
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
@@ -21,17 +22,28 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91sam9_sdramc.h>
+#include <asm/arch/atmel_serial.h>
#include <asm/arch/clk.h>
+#include <asm/gpio.h>
#include <linux/mtd/nand.h>
#include <atmel_mci.h>
#include <asm/arch/at91_spi.h>
#include <spi.h>
#include <net.h>
+#ifndef CONFIG_DM_ETH
#include <netdev.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
+static void taurus_request_gpio(void)
+{
+ gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
+ gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
+ gpio_request(AT91_PIN_PA25, "ena PHY");
+}
+
static void taurus_nand_hw_init(void)
{
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
@@ -265,6 +277,7 @@ int board_early_init_f(void)
at91_periph_clk_enable(ATMEL_ID_PIOC);
at91_seriald_hw_init();
+ taurus_request_gpio();
return 0;
}
@@ -308,6 +321,7 @@ int board_init(void)
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ taurus_request_gpio();
#ifdef CONFIG_CMD_NAND
taurus_nand_hw_init();
#endif
@@ -330,6 +344,7 @@ int dram_init(void)
return 0;
}
+#ifndef CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
int rc = 0;
@@ -338,6 +353,7 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+#endif
#if !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_BOARD_AXM)
@@ -432,3 +448,12 @@ U_BOOT_CMD(
);
#endif
#endif
+
+static struct atmel_serial_platdata at91sam9260_serial_plat = {
+ .base_addr = ATMEL_BASE_DBGU,
+};
+
+U_BOOT_DEVICE(at91sam9260_serial) = {
+ .name = "serial_atmel",
+ .platdata = &at91sam9260_serial_plat,
+};
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index ba43e35..4eada8f 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -1,8 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_TAURUS=y
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM"
+CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -15,7 +17,8 @@ CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USE_TINY_PRINTF=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 20f33a8..11c3d74 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -1,8 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_AT91=y
CONFIG_TARGET_TAURUS=y
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
+CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
@@ -18,6 +20,8 @@ CONFIG_CMD_DFU=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_USB=y
@@ -27,4 +31,3 @@ CONFIG_G_DNL_MANUFACTURER="Siemens AG"
CONFIG_G_DNL_VENDOR_NUM=0x0908
CONFIG_G_DNL_PRODUCT_NUM=0x02d2
CONFIG_USE_TINY_PRINTF=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 321fb47..7202650 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -45,7 +45,7 @@
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
--
2.5.5
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45
2016-05-25 5:23 ` [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45 Heiko Schocher
@ 2016-06-25 21:33 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot,v1,1/5] " Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-25 21:33 UTC (permalink / raw)
To: u-boot
On 25.05.16 07:23, Heiko Schocher wrote:
> add support for CONFIG_AT91SAM9M10G45.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
> ---
>
> arch/arm/mach-at91/include/mach/at91_matrix.h | 26 ++++++++++++++------------
> 1 file changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
> index 2379dd4..61e36c4 100644
> --- a/arch/arm/mach-at91/include/mach/at91_matrix.h
> +++ b/arch/arm/mach-at91/include/mach/at91_matrix.h
> @@ -15,7 +15,7 @@
> #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x30)
> #elif defined(CONFIG_AT91SAM9263)
> #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x120)
> -#elif defined(CONFIG_AT91SAM9G45)
> +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> #define AT91_ASM_MATRIX_CSA0 (ATMEL_BASE_MATRIX + 0x128)
> #else
> #error AT91_ASM_MATRIX_CSA0 is not definied for current CPU
> @@ -33,7 +33,7 @@
> #elif defined(CONFIG_AT91SAM9263)
> #define AT91_MATRIX_MASTERS 9
> #define AT91_MATRIX_SLAVES 7
> -#elif defined(CONFIG_AT91SAM9G45)
> +#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_MASTERS 11
> #define AT91_MATRIX_SLAVES 8
> #else
> @@ -63,7 +63,7 @@ typedef struct at91_matrix {
> u32 reserve3[32 - (2 * AT91_MATRIX_SLAVES)];
> u32 mrcr; /* 0x100 Master Remap Control */
> u32 reserve4[3];
> -#if defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> u32 ccr[52]; /* 0x110 - 0x1E0 Chip Configuration */
> u32 womr; /* 0x1E4 Write Protect Mode */
> u32 wpsr; /* 0x1E8 Write Protect Status */
> @@ -106,14 +106,14 @@ typedef struct at91_matrix {
>
> /* Undefined Length Burst Type */
> #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
> - defined(CONFIG_AT91SAM9G45)
> + defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_MCFG_ULBT_INFINITE 0x00000000
> #define AT91_MATRIX_MCFG_ULBT_SINGLE 0x00000001
> #define AT91_MATRIX_MCFG_ULBT_FOUR 0x00000002
> #define AT91_MATRIX_MCFG_ULBT_EIGHT 0x00000003
> #define AT91_MATRIX_MCFG_ULBT_SIXTEEN 0x00000004
> #endif
> -#if defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_MCFG_ULBT_THIRTYTWO 0x00000005
> #define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR 0x00000006
> #define AT91_MATRIX_MCFG_ULBT_128 0x00000007
> @@ -125,14 +125,15 @@ typedef struct at91_matrix {
> #define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED 0x00020000
>
> /* Fixed Index of Default Master */
> -#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) || \
> + defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18)
> #elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260)
> #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18)
> #endif
>
> /* Maximum Number of Allowed Cycles for a Burst */
> -#if defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0)
> #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
> defined(CONFIG_AT91SAM9263)
> @@ -147,13 +148,14 @@ typedef struct at91_matrix {
>
> /* Master Remap Control Register */
> #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \
> - defined(CONFIG_AT91SAM9G45)
> + defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
> #define AT91_MATRIX_MRCR_RCB0 (1 << 0)
> /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
> #define AT91_MATRIX_MRCR_RCB1 (1 << 1)
> #endif
> -#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) || \
> + defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_MRCR_RCB2 0x00000004
> #define AT91_MATRIX_MRCR_RCB3 0x00000008
> #define AT91_MATRIX_MRCR_RCB4 0x00000010
> @@ -162,14 +164,14 @@ typedef struct at91_matrix {
> #define AT91_MATRIX_MRCR_RCB7 0x00000080
> #define AT91_MATRIX_MRCR_RCB8 0x00000100
> #endif
> -#if defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> #define AT91_MATRIX_MRCR_RCB9 0x00000200
> #define AT91_MATRIX_MRCR_RCB10 0x00000400
> #define AT91_MATRIX_MRCR_RCB11 0x00000800
> #endif
>
> /* TCM Configuration Register */
> -#if defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> /* Size of ITCM enabled memory block */
> #define AT91_MATRIX_TCMR_ITCM_0 0x00000000
> #define AT91_MATRIX_TCMR_ITCM_32 0x00000040
> @@ -204,7 +206,7 @@ typedef struct at91_matrix {
> #define AT91_MATRIX_TCMR_DTCM_64 0x00000070
> #endif
>
> -#if defined(CONFIG_AT91SAM9G45)
> +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
> /* Video Mode Configuration Register */
> #define AT91C_MATRIX_VDEC_SEL_OFF 0x00000000
> #define AT91C_MATRIX_VDEC_SEL_ON 0x00000001
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 2/5] corvus DTS / DM support
2016-05-25 5:23 ` [U-Boot] [PATCH v1 2/5] corvus DTS / DM support Heiko Schocher
@ 2016-06-25 21:35 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot,v1,2/5] " Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-25 21:35 UTC (permalink / raw)
To: u-boot
On 25.05.16 07:23, Heiko Schocher wrote:
> Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
with some nits below ...
> ---
>
> arch/arm/dts/Makefile | 2 +-
> arch/arm/dts/at91sam9g45-corvus.dts | 108 ++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 4 ++
> board/siemens/corvus/board.c | 41 +++++++++++++-
> configs/corvus_defconfig | 8 +++
> include/configs/corvus.h | 2 +-
> 6 files changed, 160 insertions(+), 5 deletions(-)
> create mode 100644 arch/arm/dts/at91sam9g45-corvus.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 3bfce04..a8c4fd2 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -2,7 +2,7 @@
> # SPDX-License-Identifier: GPL-2.0+
> #
>
> -dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-gurnard.dtb
> +dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-corvus.dtb
We should not remove the newly introduced gurnard board here ... I'll
adopt it while applying.
> dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
> dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
> dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
> diff --git a/arch/arm/dts/at91sam9g45-corvus.dts b/arch/arm/dts/at91sam9g45-corvus.dts
> new file mode 100644
> index 0000000..c207c02
> --- /dev/null
> +++ b/arch/arm/dts/at91sam9g45-corvus.dts
> @@ -0,0 +1,108 @@
> +/*
> + * at91sam9g45-corvus.dts Device Tree file fir Siemens corvus board
> + * (C) Copyright 2016 Heiko Schocher <hs@denx.de>
> + *
> + * based on:
> + * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
> + *
> + * Copyright (C) 2011 Atmel,
> + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +/dts-v1/;
> +#include "at91sam9g45.dtsi"
> +
> +/ {
> + model = "Siemens corvus";
> + compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
> +
> + chosen {
> + stdout-path = &dbgu;
> + };
> +
> + memory {
> + reg = <0x70000000 0x8000000>;
> + };
> +
> + clocks {
> + slow_xtal {
> + clock-frequency = <32768>;
> + };
> +
> + main_xtal {
> + clock-frequency = <12000000>;
> + };
> + };
> +
> + ahb {
> + apb {
> + dbgu: serial at ffffee00 {
> + status = "okay";
> + };
> +
> + usart1: serial at fff90000 {
> + pinctrl-0 =
> + <&pinctrl_usart1
> + &pinctrl_usart1_rts
> + &pinctrl_usart1_cts>;
> + status = "okay";
> + };
> +
> + macb0: ethernet at fffbc000 {
> + phy-mode = "rmii";
> + status = "okay";
> + };
> +
> + watchdog at fffffd40 {
> + status = "okay";
> + };
> +
> + spi0: spi at fffa4000{
> + status = "okay";
> + cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
> + mtd_dataflash at 0 {
> + compatible = "atmel,at45", "atmel,dataflash";
> + spi-max-frequency = <13000000>;
> + reg = <0>;
> + };
> + };
> +
> + usb2: gadget at fff78000 {
> + atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
> + status = "okay";
> + };
> +
> + rtc at fffffd20 {
> + atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
> + status = "okay";
> + };
> +
> + gpbr: syscon at fffffd60 {
> + status = "okay";
> + };
> +
> + rtc at fffffdb0 {
> + status = "okay";
> + };
> + };
> +
> + nand0: nand at 40000000 {
> + nand-bus-width = <8>;
> + nand-ecc-mode = "soft";
> + nand-on-flash-bbt;
> + status = "okay";
> + };
> +
> + usb0: ohci at 00700000 {
> + status = "okay";
> + num-ports = <2>;
> + atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
> + &pioD 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + usb1: ehci at 00800000 {
> + status = "okay";
> + };
> + };
> +};
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index 9ce775e..7933137 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -109,6 +109,10 @@ config TARGET_CORVUS
> bool "Support corvus"
> select CPU_ARM926EJS
> select SUPPORT_SPL
> + select DM
> + select DM_SERIAL
> + select DM_GPIO
> + select DM_ETH
>
> config TARGET_TAURUS
> bool "Support taurus"
> diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
> index 9d52661..d4416e6 100644
> --- a/board/siemens/corvus/board.c
> +++ b/board/siemens/corvus/board.c
> @@ -11,21 +11,23 @@
> * SPDX-License-Identifier: GPL-2.0+
> */
>
> -
> #include <common.h>
> +#include <dm.h>
> #include <asm/io.h>
> #include <asm/arch/at91sam9g45_matrix.h>
> #include <asm/arch/at91sam9_smc.h>
> #include <asm/arch/at91_common.h>
> #include <asm/arch/at91_rstc.h>
> +#include <asm/arch/atmel_serial.h>
> #include <asm/arch/gpio.h>
> +#include <asm/gpio.h>
> #include <asm/arch/clk.h>
> -#include <lcd.h>
> -#include <atmel_lcdc.h>
> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
> #include <net.h>
> #endif
> +#ifndef CONFIG_DM_ETH
> #include <netdev.h>
> +#endif
> #include <spi.h>
>
> #ifdef CONFIG_USB_GADGET_ATMEL_USBA
> @@ -34,6 +36,24 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +static void corvus_request_gpio(void)
> +{
> + gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
> + gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
> + gpio_request(AT91_PIN_PD7, "d0");
> + gpio_request(AT91_PIN_PD8, "d1");
> + gpio_request(AT91_PIN_PA12, "d2");
> + gpio_request(AT91_PIN_PA13, "d3");
> + gpio_request(AT91_PIN_PA15, "d4");
> + gpio_request(AT91_PIN_PB7, "recovery button");
> + gpio_request(AT91_PIN_PD1, "USB0");
> + gpio_request(AT91_PIN_PD3, "USB1");
> + gpio_request(AT91_PIN_PB18, "SPICS1");
> + gpio_request(AT91_PIN_PB3, "SPICS0");
> + gpio_request(CONFIG_RED_LED, "red led");
> + gpio_request(CONFIG_GREEN_LED, "green led");
> +}
> +
> static void corvus_nand_hw_init(void)
> {
> struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> @@ -78,6 +98,7 @@ static void corvus_nand_hw_init(void)
>
> void spl_board_init(void)
> {
> + corvus_request_gpio();
> /*
> * For on the sam9m10g45ek board, the chip wm9711 stay in the test
> * mode, so it need do some action to exit mode.
> @@ -200,6 +221,7 @@ static void corvus_macb_hw_init(void)
> int board_early_init_f(void)
> {
> at91_seriald_hw_init();
> + corvus_request_gpio();
> return 0;
> }
>
> @@ -220,6 +242,8 @@ int board_init(void)
> /* address of boot parameters */
> gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>
> + /* we have to request the gpios again after relocation */
> + corvus_request_gpio();
> #ifdef CONFIG_CMD_NAND
> corvus_nand_hw_init();
> #endif
> @@ -249,6 +273,7 @@ int dram_init(void)
> return 0;
> }
>
> +#ifndef CONFIG_DM_ETH
> int board_eth_init(bd_t *bis)
> {
> int rc = 0;
> @@ -257,6 +282,7 @@ int board_eth_init(bd_t *bis)
> #endif
> return rc;
> }
> +#endif
>
> /* SPI chip select control */
> int spi_cs_is_valid(unsigned int bus, unsigned int cs)
> @@ -289,3 +315,12 @@ void spi_cs_deactivate(struct spi_slave *slave)
> break;
> }
> }
> +
> +static struct atmel_serial_platdata at91sam9260_serial_plat = {
> + .base_addr = ATMEL_BASE_DBGU,
> +};
> +
> +U_BOOT_DEVICE(at91sam9260_serial) = {
> + .name = "serial_atmel",
> + .platdata = &at91sam9260_serial_plat,
> +};
> diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
> index 37488dd..31ebe4c 100644
> --- a/configs/corvus_defconfig
> +++ b/configs/corvus_defconfig
> @@ -1,6 +1,7 @@
> CONFIG_ARM=y
> CONFIG_ARCH_AT91=y
> CONFIG_TARGET_CORVUS=y
> +CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus"
> CONFIG_SPL=y
> CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
> CONFIG_HUSH_PARSER=y
> @@ -13,6 +14,8 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_USB=y
> CONFIG_CMD_DFU=y
> # CONFIG_CMD_FPGA is not set
> +CONFIG_CMD_GPIO=y
> +# CONFIG_CMD_SOURCE is not set
> # CONFIG_CMD_SETEXPR is not set
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_PING=y
> @@ -24,3 +27,8 @@ CONFIG_G_DNL_MANUFACTURER="Siemens AG"
> CONFIG_G_DNL_VENDOR_NUM=0x0908
> CONFIG_G_DNL_PRODUCT_NUM=0x02d2
> CONFIG_OF_LIBFDT=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_OF_EMBED=y
> +CONFIG_USB=y
> +CONFIG_USB_GADGET=y
> +# CONFIG_EFI_LOADER is not set
> diff --git a/include/configs/corvus.h b/include/configs/corvus.h
> index 8b3c715..b61888f 100644
> --- a/include/configs/corvus.h
> +++ b/include/configs/corvus.h
> @@ -35,7 +35,7 @@
> #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> #define CONFIG_SETUP_MEMORY_TAGS
> #define CONFIG_INITRD_TAG
> -#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
> #define CONFIG_BOARD_EARLY_INIT_F
> #define CONFIG_DISPLAY_CPUINFO
>
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260
2016-05-25 5:23 ` [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260 Heiko Schocher
@ 2016-06-25 21:36 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-25 21:36 UTC (permalink / raw)
To: u-boot
On 25.05.16 07:23, Heiko Schocher wrote:
> Add this files from Linux v4.6-rc5
>
> 66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO]
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Andreas Bie?mann <andreas@biessmann.org>
> ---
>
> arch/arm/dts/at91sam9260.dtsi | 1034 +++++++++++++++++++++++++++++++++++++++++
> arch/arm/dts/at91sam9261.dtsi | 876 ++++++++++++++++++++++++++++++++++
> arch/arm/dts/at91sam9263.dtsi | 1034 +++++++++++++++++++++++++++++++++++++++++
> arch/arm/dts/at91sam9g20.dtsi | 68 +++
> 4 files changed, 3012 insertions(+)
> create mode 100644 arch/arm/dts/at91sam9260.dtsi
> create mode 100644 arch/arm/dts/at91sam9261.dtsi
> create mode 100644 arch/arm/dts/at91sam9263.dtsi
> create mode 100644 arch/arm/dts/at91sam9g20.dtsi
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support
2016-05-25 5:23 ` [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support Heiko Schocher
@ 2016-06-25 21:40 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-25 21:40 UTC (permalink / raw)
To: u-boot
On 25.05.16 07:23, Heiko Schocher wrote:
> Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
> ---
>
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/at91sam9260-smartweb.dts | 110 ++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 4 ++
> board/siemens/smartweb/smartweb.c | 32 ++++++++--
> configs/smartweb_defconfig | 7 ++-
> include/configs/smartweb.h | 6 +-
> 6 files changed, 149 insertions(+), 13 deletions(-)
> create mode 100644 arch/arm/dts/at91sam9260-smartweb.dts
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: add DM and DTS support
2016-05-25 5:23 ` [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: " Heiko Schocher
@ 2016-06-25 21:41 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-25 21:41 UTC (permalink / raw)
To: u-boot
On 25.05.16 07:23, Heiko Schocher wrote:
> add DM and DTS support for the at91 based siemens
> boards.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
> ---
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/at91sam9g20-taurus.dts | 119 ++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 4 ++
> board/siemens/taurus/taurus.c | 25 ++++++++
> configs/axm_defconfig | 5 +-
> configs/taurus_defconfig | 5 +-
> include/configs/taurus.h | 2 +-
> 7 files changed, 158 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/dts/at91sam9g20-taurus.dts
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [U-Boot,v1,2/5] corvus DTS / DM support
2016-05-25 5:23 ` [U-Boot] [PATCH v1 2/5] corvus DTS / DM support Heiko Schocher
2016-06-25 21:35 ` Andreas Bießmann
@ 2016-06-26 18:20 ` Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-26 18:20 UTC (permalink / raw)
To: u-boot
Dear Heiko Schocher,
Heiko Schocher <hs@denx.de> writes:
>Signed-off-by: Heiko Schocher <hs@denx.de>
>Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
>[rebase on current ToT, don't delete gurnard DTB creation]
>Signed-off-by: Andreas Bie?mann <andreas@biessmann.org>
>---
> arch/arm/dts/Makefile | 4 +-
> arch/arm/dts/at91sam9g45-corvus.dts | 108 ++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 4 ++
> board/siemens/corvus/board.c | 41 +++++++++++++-
> configs/corvus_defconfig | 8 +++
> include/configs/corvus.h | 2 +-
> 6 files changed, 162 insertions(+), 5 deletions(-)
> create mode 100644 arch/arm/dts/at91sam9g45-corvus.dts
applied to u-boot-atmel/master, thanks!
I had to rebase on current ToT, escpecially the
deletion of gurnard DTB had to be reverted.
Best regards,
Andreas Bie?mann
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [U-Boot,v1,1/5] arm: at91: add CONFIG_AT91SAM9M10G45
2016-05-25 5:23 ` [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45 Heiko Schocher
2016-06-25 21:33 ` Andreas Bießmann
@ 2016-06-26 18:20 ` Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-26 18:20 UTC (permalink / raw)
To: u-boot
Dear Heiko Schocher,
Heiko Schocher <hs@denx.de> writes:
>add support for CONFIG_AT91SAM9M10G45.
>
>Signed-off-by: Heiko Schocher <hs@denx.de>
>Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
>---
>
> arch/arm/mach-at91/include/mach/at91_matrix.h | 26 ++++++++++++++------------
> 1 file changed, 14 insertions(+), 12 deletions(-)
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [U-Boot, v1, 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260
2016-05-25 5:23 ` [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260 Heiko Schocher
2016-06-25 21:36 ` Andreas Bießmann
@ 2016-06-26 18:20 ` Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-26 18:20 UTC (permalink / raw)
To: u-boot
Dear Heiko Schocher,
Heiko Schocher <hs@denx.de> writes:
>Add this files from Linux v4.6-rc5
>
>66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO]
>
>Signed-off-by: Heiko Schocher <hs@denx.de>
>Acked-by: Andreas Bie?mann <andreas@biessmann.org>
>---
>
> arch/arm/dts/at91sam9260.dtsi | 1034 +++++++++++++++++++++++++++++++++++++++++
> arch/arm/dts/at91sam9261.dtsi | 876 ++++++++++++++++++++++++++++++++++
> arch/arm/dts/at91sam9263.dtsi | 1034 +++++++++++++++++++++++++++++++++++++++++
> arch/arm/dts/at91sam9g20.dtsi | 68 +++
> 4 files changed, 3012 insertions(+)
> create mode 100644 arch/arm/dts/at91sam9260.dtsi
> create mode 100644 arch/arm/dts/at91sam9261.dtsi
> create mode 100644 arch/arm/dts/at91sam9263.dtsi
> create mode 100644 arch/arm/dts/at91sam9g20.dtsi
applied to u-boot-atmel/master, thanks!
Best regards,
Andreas Bie?mann
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [U-Boot, v1, 4/5] arm: at91: smartweb: add DM and DTS support
2016-05-25 5:23 ` [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support Heiko Schocher
2016-06-25 21:40 ` Andreas Bießmann
@ 2016-06-26 18:20 ` Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-26 18:20 UTC (permalink / raw)
To: u-boot
Dear Heiko Schocher,
Heiko Schocher <hs@denx.de> writes:
>Signed-off-by: Heiko Schocher <hs@denx.de>
>Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
>[rebased on current ToT]
>Signed-off-by: Andreas Bie?mann <andreas@biessmann.org>
>---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/at91sam9260-smartweb.dts | 110 ++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 4 ++
> board/siemens/smartweb/smartweb.c | 32 ++++++++--
> configs/smartweb_defconfig | 7 ++-
> include/configs/smartweb.h | 6 +-
> 6 files changed, 148 insertions(+), 12 deletions(-)
> create mode 100644 arch/arm/dts/at91sam9260-smartweb.dts
applied to u-boot-atmel/master, thanks!
I had to rebase on current ToT while applying.
Best regards,
Andreas Bie?mann
^ permalink raw reply [flat|nested] 16+ messages in thread
* [U-Boot] [U-Boot, v1, 5/5] arm: at91: taurus/axm: add DM and DTS support
2016-05-25 5:23 ` [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: " Heiko Schocher
2016-06-25 21:41 ` Andreas Bießmann
@ 2016-06-26 18:20 ` Andreas Bießmann
1 sibling, 0 replies; 16+ messages in thread
From: Andreas Bießmann @ 2016-06-26 18:20 UTC (permalink / raw)
To: u-boot
Dear Heiko Schocher,
Heiko Schocher <hs@denx.de> writes:
>add DM and DTS support for the at91 based siemens
>boards.
>
>Signed-off-by: Heiko Schocher <hs@denx.de>
>Reviewed-by: Andreas Bie?mann <andreas@biessmann.org>
>[rebased on current ToT]
>Signed-off-by: Andreas Bie?mann <andreas@biessmann.org>
>---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/at91sam9g20-taurus.dts | 119 ++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/Kconfig | 4 ++
> board/siemens/taurus/taurus.c | 25 ++++++++
> configs/axm_defconfig | 5 +-
> configs/taurus_defconfig | 5 +-
> include/configs/taurus.h | 2 +-
> 7 files changed, 158 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/dts/at91sam9g20-taurus.dts
applied to u-boot-atmel/master, thanks!
I had to rebase on current ToT whily applying.
Best regards,
Andreas Bie?mann
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2016-06-26 18:20 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-05-25 5:23 [U-Boot] [PATCH v1 0/5] at91: add DM and DTS support for the at91 based siemens boards Heiko Schocher
2016-05-25 5:23 ` [U-Boot] [PATCH v1 1/5] arm: at91: add CONFIG_AT91SAM9M10G45 Heiko Schocher
2016-06-25 21:33 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot,v1,1/5] " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 2/5] corvus DTS / DM support Heiko Schocher
2016-06-25 21:35 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot,v1,2/5] " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 3/5] arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260 Heiko Schocher
2016-06-25 21:36 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 4/5] arm: at91: smartweb: add DM and DTS support Heiko Schocher
2016-06-25 21:40 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
2016-05-25 5:23 ` [U-Boot] [PATCH v1 5/5] arm: at91: taurus/axm: " Heiko Schocher
2016-06-25 21:41 ` Andreas Bießmann
2016-06-26 18:20 ` [U-Boot] [U-Boot, v1, " Andreas Bießmann
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