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From: Amelie DELAUNAY <amelie.delaunay@st.com>
To: Alexandre TORGUE <alexandre.torgue@st.com>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Rob Herring <robh@kernel.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>,
	Mark Rutland <mark.rutland@arm.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	"linux-rtc@vger.kernel.org" <linux-rtc@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property
Date: Wed, 9 May 2018 07:21:00 +0000	[thread overview]
Message-ID: <bf861b1b-5a55-e144-5999-b41d9d2cea8b@st.com> (raw)
In-Reply-To: <a2cbe252-c957-103d-aae1-4a8fce9116fa@st.com>

Hi,

On 05/04/2018 09:40 AM, Alexandre Torgue wrote:
> Hi Alexandre,
> 
> On 05/03/2018 10:53 PM, Alexandre Belloni wrote:
>> Amelie,
>>
>> On 26/04/2018 21:58:03-0500, Rob Herring wrote:
>>> On Thu, Apr 19, 2018 at 03:21:42PM +0200, Amelie Delaunay wrote:
>>>> RTC driver should not be aware of the PWR registers offset and bits
>>>> position. Furthermore, we can imagine that Disable Backup Protection 
>>>> (DBP)
>>>> relative register and bit mask could change depending on the SoC. So 
>>>> this
>>>> patch moves st,syscfg property from single pwrcfg phandle to pwrcfg
>>>> phandle/offset/mask triplet.
>>>>
>>>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>>>> ---
>>>>   Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt | 10 
>>>> ++++++----
>>>>   1 file changed, 6 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt 
>>>> b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> index a66692a..00f8b5d 100644
>>>> --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> @@ -14,8 +14,10 @@ Required properties:
>>>>       It is required only on stm32h7.
>>>>   - interrupt-parent: phandle for the interrupt controller.
>>>>   - interrupts: rtc alarm interrupt.
>>>> -- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup 
>>>> domain
>>>> -  (RTC registers) write protection.
>>>> +- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg 
>>>> used to
>>>> +  access control register at offset, and change the dbp (Disable 
>>>> Backup
>>>> +  Protection) bit represented by the mask, mandatory to 
>>>> disable/enable backup
>>>> +  domain (RTC registers) write protection.
>>>
>>> It's fine to add this, but you are breaking compatibility in the driver
>>> with existing DTBs by requiring these new fields.
>>>
>>
>> I'm fine with that change but I would like confirmation that this has
>> been well thought. Maybe Maxime or Alexandre could give their ack.
>>
> 
> It's a good thing to remove PWR registers information from RTC driver. 
> My only concern was the compatibility with old DT but we can accept it. 
> Indeed, Kernel will continue to boot fine, only RTC will not probe if we 
> use old DT.
> 
> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
> 
> Regards
> alex

I am going to send a series to update st,syscfg property in 
stm32f429/stm32f746/stm32h743 RTC node.

Thanks,
Amelie

WARNING: multiple messages have this Message-ID (diff)
From: Amelie DELAUNAY <amelie.delaunay@st.com>
To: Alexandre TORGUE <alexandre.torgue@st.com>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Rob Herring <robh@kernel.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>,
	Mark Rutland <mark.rutland@arm.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	"linux-rtc@vger.kernel.org" <linux-rtc@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property
Date: Wed, 9 May 2018 07:21:00 +0000	[thread overview]
Message-ID: <bf861b1b-5a55-e144-5999-b41d9d2cea8b@st.com> (raw)
In-Reply-To: <a2cbe252-c957-103d-aae1-4a8fce9116fa@st.com>

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WARNING: multiple messages have this Message-ID (diff)
From: Amelie DELAUNAY <amelie.delaunay@st.com>
To: Alexandre TORGUE <alexandre.torgue@st.com>,
	Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Alessandro Zummo <a.zummo@towertech.it>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-rtc@vger.kernel.org" <linux-rtc@vger.kernel.org>
Subject: Re: [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property
Date: Wed, 9 May 2018 07:21:00 +0000	[thread overview]
Message-ID: <bf861b1b-5a55-e144-5999-b41d9d2cea8b@st.com> (raw)
In-Reply-To: <a2cbe252-c957-103d-aae1-4a8fce9116fa@st.com>

Hi,

On 05/04/2018 09:40 AM, Alexandre Torgue wrote:
> Hi Alexandre,
> 
> On 05/03/2018 10:53 PM, Alexandre Belloni wrote:
>> Amelie,
>>
>> On 26/04/2018 21:58:03-0500, Rob Herring wrote:
>>> On Thu, Apr 19, 2018 at 03:21:42PM +0200, Amelie Delaunay wrote:
>>>> RTC driver should not be aware of the PWR registers offset and bits
>>>> position. Furthermore, we can imagine that Disable Backup Protection 
>>>> (DBP)
>>>> relative register and bit mask could change depending on the SoC. So 
>>>> this
>>>> patch moves st,syscfg property from single pwrcfg phandle to pwrcfg
>>>> phandle/offset/mask triplet.
>>>>
>>>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>>>> ---
>>>>   Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt | 10 
>>>> ++++++----
>>>>   1 file changed, 6 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt 
>>>> b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> index a66692a..00f8b5d 100644
>>>> --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> @@ -14,8 +14,10 @@ Required properties:
>>>>       It is required only on stm32h7.
>>>>   - interrupt-parent: phandle for the interrupt controller.
>>>>   - interrupts: rtc alarm interrupt.
>>>> -- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup 
>>>> domain
>>>> -  (RTC registers) write protection.
>>>> +- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg 
>>>> used to
>>>> +  access control register at offset, and change the dbp (Disable 
>>>> Backup
>>>> +  Protection) bit represented by the mask, mandatory to 
>>>> disable/enable backup
>>>> +  domain (RTC registers) write protection.
>>>
>>> It's fine to add this, but you are breaking compatibility in the driver
>>> with existing DTBs by requiring these new fields.
>>>
>>
>> I'm fine with that change but I would like confirmation that this has
>> been well thought. Maybe Maxime or Alexandre could give their ack.
>>
> 
> It's a good thing to remove PWR registers information from RTC driver. 
> My only concern was the compatibility with old DT but we can accept it. 
> Indeed, Kernel will continue to boot fine, only RTC will not probe if we 
> use old DT.
> 
> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
> 
> Regards
> alex

I am going to send a series to update st,syscfg property in 
stm32f429/stm32f746/stm32h743 RTC node.

Thanks,
Amelie
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: amelie.delaunay@st.com (Amelie DELAUNAY)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property
Date: Wed, 9 May 2018 07:21:00 +0000	[thread overview]
Message-ID: <bf861b1b-5a55-e144-5999-b41d9d2cea8b@st.com> (raw)
In-Reply-To: <a2cbe252-c957-103d-aae1-4a8fce9116fa@st.com>

Hi,

On 05/04/2018 09:40 AM, Alexandre Torgue wrote:
> Hi Alexandre,
> 
> On 05/03/2018 10:53 PM, Alexandre Belloni wrote:
>> Amelie,
>>
>> On 26/04/2018 21:58:03-0500, Rob Herring wrote:
>>> On Thu, Apr 19, 2018 at 03:21:42PM +0200, Amelie Delaunay wrote:
>>>> RTC driver should not be aware of the PWR registers offset and bits
>>>> position. Furthermore, we can imagine that Disable Backup Protection 
>>>> (DBP)
>>>> relative register and bit mask could change depending on the SoC. So 
>>>> this
>>>> patch moves st,syscfg property from single pwrcfg phandle to pwrcfg
>>>> phandle/offset/mask triplet.
>>>>
>>>> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
>>>> ---
>>>> ? Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt | 10 
>>>> ++++++----
>>>> ? 1 file changed, 6 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt 
>>>> b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> index a66692a..00f8b5d 100644
>>>> --- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>>>> @@ -14,8 +14,10 @@ Required properties:
>>>> ????? It is required only on stm32h7.
>>>> ? - interrupt-parent: phandle for the interrupt controller.
>>>> ? - interrupts: rtc alarm interrupt.
>>>> -- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup 
>>>> domain
>>>> -? (RTC registers) write protection.
>>>> +- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg 
>>>> used to
>>>> +? access control register at offset, and change the dbp (Disable 
>>>> Backup
>>>> +? Protection) bit represented by the mask, mandatory to 
>>>> disable/enable backup
>>>> +? domain (RTC registers) write protection.
>>>
>>> It's fine to add this, but you are breaking compatibility in the driver
>>> with existing DTBs by requiring these new fields.
>>>
>>
>> I'm fine with that change but I would like confirmation that this has
>> been well thought. Maybe Maxime or Alexandre could give their ack.
>>
> 
> It's a good thing to remove PWR registers information from RTC driver. 
> My only concern was the compatibility with old DT but we can accept it. 
> Indeed, Kernel will continue to boot fine, only RTC will not probe if we 
> use old DT.
> 
> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
> 
> Regards
> alex

I am going to send a series to update st,syscfg property in 
stm32f429/stm32f746/stm32h743 RTC node.

Thanks,
Amelie

  reply	other threads:[~2018-05-09  7:21 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-19 13:21 [PATCH 0/4] Various fixes on STM32 RTC Amelie Delaunay
2018-04-19 13:21 ` Amelie Delaunay
2018-04-19 13:21 ` Amelie Delaunay
2018-04-19 13:21 ` [PATCH 1/4] rtc: stm32: fix copyright and adopt SPDX identifier Amelie Delaunay
2018-04-19 13:21   ` Amelie Delaunay
2018-04-19 13:21   ` Amelie Delaunay
2018-04-19 13:21 ` [PATCH 2/4] rtc: stm32: fix alarm interrupt flags by removing IRQF_TRIGGER_RISING Amelie Delaunay
2018-04-19 13:21   ` Amelie Delaunay
2018-04-19 13:21   ` Amelie Delaunay
2018-04-19 13:21 ` [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property Amelie Delaunay
2018-04-19 13:21   ` [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st, syscfg property Amelie Delaunay
2018-04-19 13:21   ` [PATCH 3/4] dt-bindings: rtc: update stm32-rtc documentation for st,syscfg property Amelie Delaunay
2018-04-27  2:58   ` Rob Herring
2018-04-27  2:58     ` Rob Herring
2018-05-03 20:53     ` Alexandre Belloni
2018-05-03 20:53       ` Alexandre Belloni
2018-05-04  7:40       ` Alexandre Torgue
2018-05-04  7:40         ` Alexandre Torgue
2018-05-04  7:40         ` Alexandre Torgue
2018-05-09  7:21         ` Amelie DELAUNAY [this message]
2018-05-09  7:21           ` Amelie DELAUNAY
2018-05-09  7:21           ` Amelie DELAUNAY
2018-05-09  7:21           ` Amelie DELAUNAY
2018-04-19 13:21 ` [PATCH 4/4] rtc: stm32: get DBP register and mask from DT " Amelie Delaunay
2018-04-19 13:21   ` [PATCH 4/4] rtc: stm32: get DBP register and mask from DT st, syscfg property Amelie Delaunay
2018-04-19 13:21   ` [PATCH 4/4] rtc: stm32: get DBP register and mask from DT st,syscfg property Amelie Delaunay
2018-04-19 13:43 ` [PATCH 0/4] Various fixes on STM32 RTC Alexandre Belloni
2018-04-19 13:43   ` Alexandre Belloni
2018-04-19 14:14   ` Amelie DELAUNAY
2018-04-19 14:14     ` Amelie DELAUNAY
2018-05-06 20:27 ` Alexandre Belloni
2018-05-06 20:27   ` Alexandre Belloni

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