[U-Boot] [PATCH 1/2] net: mvpp2: fix polarity of PHY reset signal

[U-Boot] [PATCH 1/2] net: mvpp2: fix polarity of PHY reset signal

[Baruch Siach]

The dm_gpio_set_value() call sets the logical level of the GPIO signal.
That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
driver needs to assert the reset, and then deassert it. Not the other
way around.

Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 drivers/net/mvpp2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 62c0c2be0626..b3b1fe1a0c41 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4805,9 +4805,9 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
 static void mvpp2_gpio_init(struct mvpp2_port *port)
 {
 	if (dm_gpio_is_valid(&port->phy_reset_gpio)) {
-		dm_gpio_set_value(&port->phy_reset_gpio, 0);
-		udelay(1000);
 		dm_gpio_set_value(&port->phy_reset_gpio, 1);
+		udelay(1000);
+		dm_gpio_set_value(&port->phy_reset_gpio, 0);
 	}
 
 	if (dm_gpio_is_valid(&port->phy_tx_disable_gpio))
-- 
2.19.1

[U-Boot] [PATCH 2/2] net: mvpp2: increase PHY reset pulse

[Baruch Siach]

The default Linux PHY reset delay is 10ms. This is also the requirement
for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
MAC.

Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 drivers/net/mvpp2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index b3b1fe1a0c41..f28b939b17dc 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -4806,7 +4806,7 @@ static void mvpp2_gpio_init(struct mvpp2_port *port)
 {
 	if (dm_gpio_is_valid(&port->phy_reset_gpio)) {
 		dm_gpio_set_value(&port->phy_reset_gpio, 1);
-		udelay(1000);
+		udelay(10000);
 		dm_gpio_set_value(&port->phy_reset_gpio, 0);
 	}
 
-- 
2.19.1

[U-Boot] [PATCH 2/2] net: mvpp2: increase PHY reset pulse

[Joe Hershberger]

On Mon, Oct 15, 2018 at 5:17 AM Baruch Siach <baruch@tkos.co.il> wrote:
>
> The default Linux PHY reset delay is 10ms. This is also the requirement
> for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
> MAC.
>
> Cc: Stefan Chulski <stefanc@marvell.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>

[U-Boot] [PATCH 1/2] net: mvpp2: fix polarity of PHY reset signal

[Joe Hershberger]

On Mon, Oct 15, 2018 at 5:18 AM Baruch Siach <baruch@tkos.co.il> wrote:
>
> The dm_gpio_set_value() call sets the logical level of the GPIO signal.
> That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
> driver needs to assert the reset, and then deassert it. Not the other
> way around.
>
> Cc: Stefan Chulski <stefanc@marvell.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>

[U-Boot] [PATCH 1/2] net: mvpp2: fix polarity of PHY reset signal

[Stefan Roese]

On 15.10.18 12:16, Baruch Siach wrote:
> The dm_gpio_set_value() call sets the logical level of the GPIO signal.
> That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
> driver needs to assert the reset, and then deassert it. Not the other
> way around.
> 
> Cc: Stefan Chulski <stefanc@marvell.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>   drivers/net/mvpp2.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
> index 62c0c2be0626..b3b1fe1a0c41 100644
> --- a/drivers/net/mvpp2.c
> +++ b/drivers/net/mvpp2.c
> @@ -4805,9 +4805,9 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
>   static void mvpp2_gpio_init(struct mvpp2_port *port)
>   {
>   	if (dm_gpio_is_valid(&port->phy_reset_gpio)) {
> -		dm_gpio_set_value(&port->phy_reset_gpio, 0);
> -		udelay(1000);
>   		dm_gpio_set_value(&port->phy_reset_gpio, 1);
> +		udelay(1000);
> +		dm_gpio_set_value(&port->phy_reset_gpio, 0);
>   	}
>   
>   	if (dm_gpio_is_valid(&port->phy_tx_disable_gpio))
> 

Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan

[U-Boot] [PATCH 2/2] net: mvpp2: increase PHY reset pulse

[Stefan Roese]

On 15.10.18 12:16, Baruch Siach wrote:
> The default Linux PHY reset delay is 10ms. This is also the requirement
> for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
> MAC.
> 
> Cc: Stefan Chulski <stefanc@marvell.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>   drivers/net/mvpp2.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
> index b3b1fe1a0c41..f28b939b17dc 100644
> --- a/drivers/net/mvpp2.c
> +++ b/drivers/net/mvpp2.c
> @@ -4806,7 +4806,7 @@ static void mvpp2_gpio_init(struct mvpp2_port *port)
>   {
>   	if (dm_gpio_is_valid(&port->phy_reset_gpio)) {
>   		dm_gpio_set_value(&port->phy_reset_gpio, 1);
> -		udelay(1000);
> +		udelay(10000);
>   		dm_gpio_set_value(&port->phy_reset_gpio, 0);
>   	}
>   
> 

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

[U-Boot] net: mvpp2: fix polarity of PHY reset signal

[Joe Hershberger]

Hi Baruch,

https://patchwork.ozlabs.org/patch/984073/ was applied to http://git.denx.de/?p=u-boot/u-boot-net.git

Thanks!
-Joe

[U-Boot] net: mvpp2: increase PHY reset pulse

[Joe Hershberger]

Hi Baruch,

https://patchwork.ozlabs.org/patch/984072/ was applied to http://git.denx.de/?p=u-boot/u-boot-net.git

Thanks!
-Joe