[PATCH v4 0/3] clk: bcm: Add BCM2711 DVP driver

[PATCH v4 0/3] clk: bcm: Add BCM2711 DVP driver

[Maxime Ripard]

Hi,

Here is yet another smaller patches series that got stripped out of the
huge HDMI one.

Since it depends at build time on patches already queued by Philipp in
reset/next, maybe we should merge the clock driver in the reset tree with
the Acks of Stephen and Mike?

Maxime

Changes from v3:
  - Switch to devm_platform_get_and_ioremap_resource and devm_reset_controller_register
  - Actually use the Kconfig symbol in the Makefile

Maxime Ripard (3):
  dt-bindings: clock: Add BCM2711 DVP binding
  clk: bcm: Add BCM2711 DVP driver
  ARM: dts: bcm2711: Add HDMI DVP

 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml |  47 +++-
 arch/arm/boot/dts/bcm2711.dtsi                                |  15 +-
 drivers/clk/bcm/Kconfig                                       |  11 +-
 drivers/clk/bcm/Makefile                                      |   1 +-
 drivers/clk/bcm/clk-bcm2711-dvp.c                             | 120 +++++++-
 5 files changed, 194 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
 create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c

base-commit: 192e08e14e37b78e83cc2f5b9eb5a15a7d71c4e2
-- 
git-series 0.9.1

[PATCH v4 0/3] clk: bcm: Add BCM2711 DVP driver

[Maxime Ripard]

Hi,

Here is yet another smaller patches series that got stripped out of the
huge HDMI one.

Since it depends at build time on patches already queued by Philipp in
reset/next, maybe we should merge the clock driver in the reset tree with
the Acks of Stephen and Mike?

Maxime

Changes from v3:
  - Switch to devm_platform_get_and_ioremap_resource and devm_reset_controller_register
  - Actually use the Kconfig symbol in the Makefile

Maxime Ripard (3):
  dt-bindings: clock: Add BCM2711 DVP binding
  clk: bcm: Add BCM2711 DVP driver
  ARM: dts: bcm2711: Add HDMI DVP

 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml |  47 +++-
 arch/arm/boot/dts/bcm2711.dtsi                                |  15 +-
 drivers/clk/bcm/Kconfig                                       |  11 +-
 drivers/clk/bcm/Makefile                                      |   1 +-
 drivers/clk/bcm/clk-bcm2711-dvp.c                             | 120 +++++++-
 5 files changed, 194 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
 create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c

base-commit: 192e08e14e37b78e83cc2f5b9eb5a15a7d71c4e2
-- 
git-series 0.9.1

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v4 1/3] dt-bindings: clock: Add BCM2711 DVP binding

[Maxime Ripard]

The BCM2711 has a unit controlling the HDMI0 and HDMI1 clock and reset
signals. Let's add a binding for it.

Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml | 47 +++++++-
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
new file mode 100644
index 000000000000..08543ecbe35b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/brcm,bcm2711-dvp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM2711 HDMI DVP Device Tree Bindings
+
+maintainers:
+  - Maxime Ripard <mripard@kernel.org>
+
+properties:
+  "#clock-cells":
+    const: 1
+
+  "#reset-cells":
+    const: 1
+
+  compatible:
+    const: brcm,brcm2711-dvp
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - "#clock-cells"
+  - "#reset-cells"
+  - compatible
+  - reg
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    dvp: clock@7ef00000 {
+        compatible = "brcm,brcm2711-dvp";
+        reg = <0x7ef00000 0x10>;
+        clocks = <&clk_108MHz>;
+        #clock-cells = <1>;
+        #reset-cells = <1>;
+    };
+
+...
-- 
git-series 0.9.1

[PATCH v4 1/3] dt-bindings: clock: Add BCM2711 DVP binding

[Maxime Ripard]

The BCM2711 has a unit controlling the HDMI0 and HDMI1 clock and reset
signals. Let's add a binding for it.

Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml | 47 +++++++-
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
new file mode 100644
index 000000000000..08543ecbe35b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/brcm,bcm2711-dvp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM2711 HDMI DVP Device Tree Bindings
+
+maintainers:
+  - Maxime Ripard <mripard@kernel.org>
+
+properties:
+  "#clock-cells":
+    const: 1
+
+  "#reset-cells":
+    const: 1
+
+  compatible:
+    const: brcm,brcm2711-dvp
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - "#clock-cells"
+  - "#reset-cells"
+  - compatible
+  - reg
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    dvp: clock@7ef00000 {
+        compatible = "brcm,brcm2711-dvp";
+        reg = <0x7ef00000 0x10>;
+        clocks = <&clk_108MHz>;
+        #clock-cells = <1>;
+        #reset-cells = <1>;
+    };
+
+...
-- 
git-series 0.9.1

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v4 1/3] dt-bindings: clock: Add BCM2711 DVP binding

[Stephen Boyd]

Quoting Maxime Ripard (2020-06-11 02:23:15)
> The BCM2711 has a unit controlling the HDMI0 and HDMI1 clock and reset
> signals. Let's add a binding for it.
> 
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Rob Herring <robh+dt@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied to clk-next

Re: [PATCH v4 1/3] dt-bindings: clock: Add BCM2711 DVP binding

[Stephen Boyd]

Quoting Maxime Ripard (2020-06-11 02:23:15)
> The BCM2711 has a unit controlling the HDMI0 and HDMI1 clock and reset
> signals. Let's add a binding for it.
> 
> Cc: Philipp Zabel <p.zabel@pengutronix.de>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Rob Herring <robh+dt@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied to clk-next

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[PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Maxime Ripard]

The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.

Let's expose that through a clock driver implementing a clock and reset
provider.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/clk/bcm/Kconfig           |  11 +++-
 drivers/clk/bcm/Makefile          |   1 +-
 drivers/clk/bcm/clk-bcm2711-dvp.c | 120 +++++++++++++++++++++++++++++++-
 3 files changed, 132 insertions(+)
 create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c

diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
index 8c83977a7dc4..784f12c72365 100644
--- a/drivers/clk/bcm/Kconfig
+++ b/drivers/clk/bcm/Kconfig
@@ -1,4 +1,15 @@
 # SPDX-License-Identifier: GPL-2.0-only
+
+config CLK_BCM2711_DVP
+	tristate "Broadcom BCM2711 DVP support"
+	depends on ARCH_BCM2835 ||COMPILE_TEST
+	depends on COMMON_CLK
+	default ARCH_BCM2835
+	select RESET_SIMPLE
+	help
+	  Enable common clock framework support for the Broadcom BCM2711
+	  DVP Controller.
+
 config CLK_BCM2835
 	bool "Broadcom BCM2835 clock support"
 	depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 0070ddf6cdd2..edb66b44cb27 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
 obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
+obj-$(CONFIG_CLK_BCM2711_DVP)	+= clk-bcm2711-dvp.o
 obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835-aux.o
 obj-$(CONFIG_CLK_RASPBERRYPI)	+= clk-raspberrypi.o
diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
new file mode 100644
index 000000000000..84dbc886e303
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2020 Cerno
+
+#include <linux/clk-provider.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/reset/reset-simple.h>
+
+#define DVP_HT_RPI_SW_INIT	0x04
+#define DVP_HT_RPI_MISC_CONFIG	0x08
+
+#define NR_CLOCKS	2
+#define NR_RESETS	6
+
+struct clk_dvp {
+	struct clk_hw_onecell_data	*data;
+	struct reset_simple_data	reset;
+};
+
+static const struct clk_parent_data clk_dvp_parent = {
+	.index	= 0,
+};
+
+static int clk_dvp_probe(struct platform_device *pdev)
+{
+	struct clk_hw_onecell_data *data;
+	struct resource *res;
+	struct clk_dvp *dvp;
+	void __iomem *base;
+	int ret;
+
+	dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
+	if (!dvp)
+		return -ENOMEM;
+	platform_set_drvdata(pdev, dvp);
+
+	dvp->data = devm_kzalloc(&pdev->dev,
+				 struct_size(dvp->data, hws, NR_CLOCKS),
+				 GFP_KERNEL);
+	if (!dvp->data)
+		return -ENOMEM;
+	data = dvp->data;
+
+	base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	dvp->reset.rcdev.owner = THIS_MODULE;
+	dvp->reset.rcdev.nr_resets = NR_RESETS;
+	dvp->reset.rcdev.ops = &reset_simple_ops;
+	dvp->reset.rcdev.of_node = pdev->dev.of_node;
+	dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
+	spin_lock_init(&dvp->reset.lock);
+
+	ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev);
+	if (ret)
+		return ret;
+
+	data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev,
+							"hdmi0-108MHz",
+							&clk_dvp_parent, 0,
+							base + DVP_HT_RPI_MISC_CONFIG, 3,
+							CLK_GATE_SET_TO_DISABLE,
+							&dvp->reset.lock);
+	if (IS_ERR(data->hws[0]))
+		return PTR_ERR(data->hws[0]);
+
+	data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev,
+							"hdmi1-108MHz",
+							&clk_dvp_parent, 0,
+							base + DVP_HT_RPI_MISC_CONFIG, 4,
+							CLK_GATE_SET_TO_DISABLE,
+							&dvp->reset.lock);
+	if (IS_ERR(data->hws[1])) {
+		ret = PTR_ERR(data->hws[1]);
+		goto unregister_clk0;
+	}
+
+	data->num = NR_CLOCKS;
+	ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
+				     data);
+	if (ret)
+		goto unregister_clk1;
+
+	return 0;
+
+unregister_clk1:
+	clk_hw_unregister_gate(data->hws[1]);
+
+unregister_clk0:
+	clk_hw_unregister_gate(data->hws[0]);
+	return ret;
+};
+
+static int clk_dvp_remove(struct platform_device *pdev)
+{
+	struct clk_dvp *dvp = platform_get_drvdata(pdev);
+	struct clk_hw_onecell_data *data = dvp->data;
+
+	clk_hw_unregister_gate(data->hws[1]);
+	clk_hw_unregister_gate(data->hws[0]);
+
+	return 0;
+}
+
+static const struct of_device_id clk_dvp_dt_ids[] = {
+	{ .compatible = "brcm,brcm2711-dvp", },
+	{ /* sentinel */ }
+};
+
+static struct platform_driver clk_dvp_driver = {
+	.probe	= clk_dvp_probe,
+	.remove	= clk_dvp_remove,
+	.driver	= {
+		.name		= "brcm2711-dvp",
+		.of_match_table	= clk_dvp_dt_ids,
+	},
+};
+module_platform_driver(clk_dvp_driver);
-- 
git-series 0.9.1

[PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Maxime Ripard]

The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.

Let's expose that through a clock driver implementing a clock and reset
provider.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/clk/bcm/Kconfig           |  11 +++-
 drivers/clk/bcm/Makefile          |   1 +-
 drivers/clk/bcm/clk-bcm2711-dvp.c | 120 +++++++++++++++++++++++++++++++-
 3 files changed, 132 insertions(+)
 create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c

diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
index 8c83977a7dc4..784f12c72365 100644
--- a/drivers/clk/bcm/Kconfig
+++ b/drivers/clk/bcm/Kconfig
@@ -1,4 +1,15 @@
 # SPDX-License-Identifier: GPL-2.0-only
+
+config CLK_BCM2711_DVP
+	tristate "Broadcom BCM2711 DVP support"
+	depends on ARCH_BCM2835 ||COMPILE_TEST
+	depends on COMMON_CLK
+	default ARCH_BCM2835
+	select RESET_SIMPLE
+	help
+	  Enable common clock framework support for the Broadcom BCM2711
+	  DVP Controller.
+
 config CLK_BCM2835
 	bool "Broadcom BCM2835 clock support"
 	depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 0070ddf6cdd2..edb66b44cb27 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
 obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
+obj-$(CONFIG_CLK_BCM2711_DVP)	+= clk-bcm2711-dvp.o
 obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835-aux.o
 obj-$(CONFIG_CLK_RASPBERRYPI)	+= clk-raspberrypi.o
diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
new file mode 100644
index 000000000000..84dbc886e303
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2020 Cerno
+
+#include <linux/clk-provider.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/reset/reset-simple.h>
+
+#define DVP_HT_RPI_SW_INIT	0x04
+#define DVP_HT_RPI_MISC_CONFIG	0x08
+
+#define NR_CLOCKS	2
+#define NR_RESETS	6
+
+struct clk_dvp {
+	struct clk_hw_onecell_data	*data;
+	struct reset_simple_data	reset;
+};
+
+static const struct clk_parent_data clk_dvp_parent = {
+	.index	= 0,
+};
+
+static int clk_dvp_probe(struct platform_device *pdev)
+{
+	struct clk_hw_onecell_data *data;
+	struct resource *res;
+	struct clk_dvp *dvp;
+	void __iomem *base;
+	int ret;
+
+	dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
+	if (!dvp)
+		return -ENOMEM;
+	platform_set_drvdata(pdev, dvp);
+
+	dvp->data = devm_kzalloc(&pdev->dev,
+				 struct_size(dvp->data, hws, NR_CLOCKS),
+				 GFP_KERNEL);
+	if (!dvp->data)
+		return -ENOMEM;
+	data = dvp->data;
+
+	base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	dvp->reset.rcdev.owner = THIS_MODULE;
+	dvp->reset.rcdev.nr_resets = NR_RESETS;
+	dvp->reset.rcdev.ops = &reset_simple_ops;
+	dvp->reset.rcdev.of_node = pdev->dev.of_node;
+	dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
+	spin_lock_init(&dvp->reset.lock);
+
+	ret = devm_reset_controller_register(&pdev->dev, &dvp->reset.rcdev);
+	if (ret)
+		return ret;
+
+	data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev,
+							"hdmi0-108MHz",
+							&clk_dvp_parent, 0,
+							base + DVP_HT_RPI_MISC_CONFIG, 3,
+							CLK_GATE_SET_TO_DISABLE,
+							&dvp->reset.lock);
+	if (IS_ERR(data->hws[0]))
+		return PTR_ERR(data->hws[0]);
+
+	data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev,
+							"hdmi1-108MHz",
+							&clk_dvp_parent, 0,
+							base + DVP_HT_RPI_MISC_CONFIG, 4,
+							CLK_GATE_SET_TO_DISABLE,
+							&dvp->reset.lock);
+	if (IS_ERR(data->hws[1])) {
+		ret = PTR_ERR(data->hws[1]);
+		goto unregister_clk0;
+	}
+
+	data->num = NR_CLOCKS;
+	ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
+				     data);
+	if (ret)
+		goto unregister_clk1;
+
+	return 0;
+
+unregister_clk1:
+	clk_hw_unregister_gate(data->hws[1]);
+
+unregister_clk0:
+	clk_hw_unregister_gate(data->hws[0]);
+	return ret;
+};
+
+static int clk_dvp_remove(struct platform_device *pdev)
+{
+	struct clk_dvp *dvp = platform_get_drvdata(pdev);
+	struct clk_hw_onecell_data *data = dvp->data;
+
+	clk_hw_unregister_gate(data->hws[1]);
+	clk_hw_unregister_gate(data->hws[0]);
+
+	return 0;
+}
+
+static const struct of_device_id clk_dvp_dt_ids[] = {
+	{ .compatible = "brcm,brcm2711-dvp", },
+	{ /* sentinel */ }
+};
+
+static struct platform_driver clk_dvp_driver = {
+	.probe	= clk_dvp_probe,
+	.remove	= clk_dvp_remove,
+	.driver	= {
+		.name		= "brcm2711-dvp",
+		.of_match_table	= clk_dvp_dt_ids,
+	},
+};
+module_platform_driver(clk_dvp_driver);
-- 
git-series 0.9.1

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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stefan Wahren]

Hi Maxime,

Am 11.06.20 um 11:23 schrieb Maxime Ripard:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---
>  drivers/clk/bcm/Kconfig           |  11 +++-
>  drivers/clk/bcm/Makefile          |   1 +-
>  drivers/clk/bcm/clk-bcm2711-dvp.c | 120 +++++++++++++++++++++++++++++++-
>  3 files changed, 132 insertions(+)
>  create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
>
> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> index 8c83977a7dc4..784f12c72365 100644
> --- a/drivers/clk/bcm/Kconfig
> +++ b/drivers/clk/bcm/Kconfig
> @@ -1,4 +1,15 @@
>  # SPDX-License-Identifier: GPL-2.0-only
> +
> +config CLK_BCM2711_DVP
> +	tristate "Broadcom BCM2711 DVP support"
> +	depends on ARCH_BCM2835 ||COMPILE_TEST
> +	depends on COMMON_CLK
> +	default ARCH_BCM2835
> +	select RESET_SIMPLE
> +	help
> +	  Enable common clock framework support for the Broadcom BCM2711
> +	  DVP Controller.
> +
>  config CLK_BCM2835
>  	bool "Broadcom BCM2835 clock support"
>  	depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
> diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> index 0070ddf6cdd2..edb66b44cb27 100644
> --- a/drivers/clk/bcm/Makefile
> +++ b/drivers/clk/bcm/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
>  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
>  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
>  obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
> +obj-$(CONFIG_CLK_BCM2711_DVP)	+= clk-bcm2711-dvp.o
>  obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835.o
>  obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835-aux.o
>  obj-$(CONFIG_CLK_RASPBERRYPI)	+= clk-raspberrypi.o
> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
> new file mode 100644
> index 000000000000..84dbc886e303
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2020 Cerno
> +
> +#include <linux/clk-provider.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/reset/reset-simple.h>
> +
> +#define DVP_HT_RPI_SW_INIT	0x04
> +#define DVP_HT_RPI_MISC_CONFIG	0x08

sorry for not noticing this before. Are these defines specific to the
Raspberry Pi, because of RPI?

Otherwise i like to see this RPI part removed.

Regards
Stefan

Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stefan Wahren]

Hi Maxime,

Am 11.06.20 um 11:23 schrieb Maxime Ripard:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---
>  drivers/clk/bcm/Kconfig           |  11 +++-
>  drivers/clk/bcm/Makefile          |   1 +-
>  drivers/clk/bcm/clk-bcm2711-dvp.c | 120 +++++++++++++++++++++++++++++++-
>  3 files changed, 132 insertions(+)
>  create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
>
> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> index 8c83977a7dc4..784f12c72365 100644
> --- a/drivers/clk/bcm/Kconfig
> +++ b/drivers/clk/bcm/Kconfig
> @@ -1,4 +1,15 @@
>  # SPDX-License-Identifier: GPL-2.0-only
> +
> +config CLK_BCM2711_DVP
> +	tristate "Broadcom BCM2711 DVP support"
> +	depends on ARCH_BCM2835 ||COMPILE_TEST
> +	depends on COMMON_CLK
> +	default ARCH_BCM2835
> +	select RESET_SIMPLE
> +	help
> +	  Enable common clock framework support for the Broadcom BCM2711
> +	  DVP Controller.
> +
>  config CLK_BCM2835
>  	bool "Broadcom BCM2835 clock support"
>  	depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
> diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> index 0070ddf6cdd2..edb66b44cb27 100644
> --- a/drivers/clk/bcm/Makefile
> +++ b/drivers/clk/bcm/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
>  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
>  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
>  obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
> +obj-$(CONFIG_CLK_BCM2711_DVP)	+= clk-bcm2711-dvp.o
>  obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835.o
>  obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835-aux.o
>  obj-$(CONFIG_CLK_RASPBERRYPI)	+= clk-raspberrypi.o
> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
> new file mode 100644
> index 000000000000..84dbc886e303
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2020 Cerno
> +
> +#include <linux/clk-provider.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/reset/reset-simple.h>
> +
> +#define DVP_HT_RPI_SW_INIT	0x04
> +#define DVP_HT_RPI_MISC_CONFIG	0x08

sorry for not noticing this before. Are these defines specific to the
Raspberry Pi, because of RPI?

Otherwise i like to see this RPI part removed.

Regards
Stefan



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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Maxime Ripard]

Hi Stefan,

On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
> > diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > new file mode 100644
> > index 000000000000..84dbc886e303
> > --- /dev/null
> > +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > @@ -0,0 +1,120 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +// Copyright 2020 Cerno
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reset-controller.h>
> > +#include <linux/reset/reset-simple.h>
> > +
> > +#define DVP_HT_RPI_SW_INIT	0x04
> > +#define DVP_HT_RPI_MISC_CONFIG	0x08
> 
> sorry for not noticing this before. Are these defines specific to the
> Raspberry Pi, because of RPI?

I'm not entirely sure to be honest. It's the names that the register
have, but it's not clear to me if it's something specific to the RPi
itself, or it just means something else entirely.

Maxime

Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Maxime Ripard]

Hi Stefan,

On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
> > diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > new file mode 100644
> > index 000000000000..84dbc886e303
> > --- /dev/null
> > +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > @@ -0,0 +1,120 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +// Copyright 2020 Cerno
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reset-controller.h>
> > +#include <linux/reset/reset-simple.h>
> > +
> > +#define DVP_HT_RPI_SW_INIT	0x04
> > +#define DVP_HT_RPI_MISC_CONFIG	0x08
> 
> sorry for not noticing this before. Are these defines specific to the
> Raspberry Pi, because of RPI?

I'm not entirely sure to be honest. It's the names that the register
have, but it's not clear to me if it's something specific to the RPi
itself, or it just means something else entirely.

Maxime

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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Florian Fainelli]

On 6/11/2020 9:52 AM, Maxime Ripard wrote:
> Hi Stefan,
> 
> On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
>>> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>> new file mode 100644
>>> index 000000000000..84dbc886e303
>>> --- /dev/null
>>> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>> @@ -0,0 +1,120 @@
>>> +// SPDX-License-Identifier: GPL-2.0-or-later
>>> +// Copyright 2020 Cerno
>>> +
>>> +#include <linux/clk-provider.h>
>>> +#include <linux/module.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/reset-controller.h>
>>> +#include <linux/reset/reset-simple.h>
>>> +
>>> +#define DVP_HT_RPI_SW_INIT	0x04
>>> +#define DVP_HT_RPI_MISC_CONFIG	0x08
>>
>> sorry for not noticing this before. Are these defines specific to the
>> Raspberry Pi, because of RPI?
> 
> I'm not entirely sure to be honest. It's the names that the register
> have, but it's not clear to me if it's something specific to the RPi
> itself, or it just means something else entirely.

My understanding is that this is a wrapper that was done specifically
for the Raspberry Pi usage of that IP block, which is why it has PI in
the name, so this looks good correct, and this does match the internal
register database name.
-- 
Florian

Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Florian Fainelli]

On 6/11/2020 9:52 AM, Maxime Ripard wrote:
> Hi Stefan,
> 
> On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
>>> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>> new file mode 100644
>>> index 000000000000..84dbc886e303
>>> --- /dev/null
>>> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>> @@ -0,0 +1,120 @@
>>> +// SPDX-License-Identifier: GPL-2.0-or-later
>>> +// Copyright 2020 Cerno
>>> +
>>> +#include <linux/clk-provider.h>
>>> +#include <linux/module.h>
>>> +#include <linux/platform_device.h>
>>> +#include <linux/reset-controller.h>
>>> +#include <linux/reset/reset-simple.h>
>>> +
>>> +#define DVP_HT_RPI_SW_INIT	0x04
>>> +#define DVP_HT_RPI_MISC_CONFIG	0x08
>>
>> sorry for not noticing this before. Are these defines specific to the
>> Raspberry Pi, because of RPI?
> 
> I'm not entirely sure to be honest. It's the names that the register
> have, but it's not clear to me if it's something specific to the RPi
> itself, or it just means something else entirely.

My understanding is that this is a wrapper that was done specifically
for the Raspberry Pi usage of that IP block, which is why it has PI in
the name, so this looks good correct, and this does match the internal
register database name.
-- 
Florian

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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stefan Wahren]

Am 11.06.20 um 19:06 schrieb Florian Fainelli:
>
> On 6/11/2020 9:52 AM, Maxime Ripard wrote:
>> Hi Stefan,
>>
>> On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
>>>> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>>> new file mode 100644
>>>> index 000000000000..84dbc886e303
>>>> --- /dev/null
>>>> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>>> @@ -0,0 +1,120 @@
>>>> +// SPDX-License-Identifier: GPL-2.0-or-later
>>>> +// Copyright 2020 Cerno
>>>> +
>>>> +#include <linux/clk-provider.h>
>>>> +#include <linux/module.h>
>>>> +#include <linux/platform_device.h>
>>>> +#include <linux/reset-controller.h>
>>>> +#include <linux/reset/reset-simple.h>
>>>> +
>>>> +#define DVP_HT_RPI_SW_INIT	0x04
>>>> +#define DVP_HT_RPI_MISC_CONFIG	0x08
>>> sorry for not noticing this before. Are these defines specific to the
>>> Raspberry Pi, because of RPI?
>> I'm not entirely sure to be honest. It's the names that the register
>> have, but it's not clear to me if it's something specific to the RPi
>> itself, or it just means something else entirely.
> My understanding is that this is a wrapper that was done specifically
> for the Raspberry Pi usage of that IP block, which is why it has PI in
> the name, so this looks good correct, and this does match the internal
> register database name.

Okay, i'm fine with that and the whole series.

Acked-by: Stefan Wahren <stefan.wahren@i2se.com>

Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stefan Wahren]

Am 11.06.20 um 19:06 schrieb Florian Fainelli:
>
> On 6/11/2020 9:52 AM, Maxime Ripard wrote:
>> Hi Stefan,
>>
>> On Thu, Jun 11, 2020 at 05:50:30PM +0200, Stefan Wahren wrote:
>>>> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>>> new file mode 100644
>>>> index 000000000000..84dbc886e303
>>>> --- /dev/null
>>>> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
>>>> @@ -0,0 +1,120 @@
>>>> +// SPDX-License-Identifier: GPL-2.0-or-later
>>>> +// Copyright 2020 Cerno
>>>> +
>>>> +#include <linux/clk-provider.h>
>>>> +#include <linux/module.h>
>>>> +#include <linux/platform_device.h>
>>>> +#include <linux/reset-controller.h>
>>>> +#include <linux/reset/reset-simple.h>
>>>> +
>>>> +#define DVP_HT_RPI_SW_INIT	0x04
>>>> +#define DVP_HT_RPI_MISC_CONFIG	0x08
>>> sorry for not noticing this before. Are these defines specific to the
>>> Raspberry Pi, because of RPI?
>> I'm not entirely sure to be honest. It's the names that the register
>> have, but it's not clear to me if it's something specific to the RPi
>> itself, or it just means something else entirely.
> My understanding is that this is a wrapper that was done specifically
> for the Raspberry Pi usage of that IP block, which is why it has PI in
> the name, so this looks good correct, and this does match the internal
> register database name.

Okay, i'm fine with that and the whole series.

Acked-by: Stefan Wahren <stefan.wahren@i2se.com>


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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Nicolas Saenz Julienne]

[-- Attachment #1: Type: text/plain, Size: 652 bytes --]

On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
> 
> Let's expose that through a clock driver implementing a clock and reset
> provider.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Regards,
Nicolas


[-- Attachment #2: This is a digitally signed message part --]
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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Nicolas Saenz Julienne]

[-- Attachment #1.1: Type: text/plain, Size: 652 bytes --]

On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
> 
> Let's expose that through a clock driver implementing a clock and reset
> provider.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>

Regards,
Nicolas


[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stephen Boyd]

Quoting Maxime Ripard (2020-06-11 02:23:16)
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
> 
> Let's expose that through a clock driver implementing a clock and reset
> provider.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied to clk-next

Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stephen Boyd]

Quoting Maxime Ripard (2020-06-11 02:23:16)
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
> 
> Let's expose that through a clock driver implementing a clock and reset
> provider.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied to clk-next

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Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stephen Boyd]

Quoting Maxime Ripard (2020-06-11 02:23:16)
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
> 
> Let's expose that through a clock driver implementing a clock and reset
> provider.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied to clk-next

Re: [PATCH v4 2/3] clk: bcm: Add BCM2711 DVP driver

[Stephen Boyd]

Quoting Maxime Ripard (2020-06-11 02:23:16)
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
> 
> Let's expose that through a clock driver implementing a clock and reset
> provider.
> 
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: linux-clk@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Reviewed-by: Stephen Boyd <sboyd@kernel.org>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied to clk-next

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[PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Maxime Ripard]

Now that we have a driver for the DVP, let's add its DT node.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 arch/arm/boot/dts/bcm2711.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index a91cf68e3c4c..00bcaed1be32 100644
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -12,6 +12,13 @@
 
 	interrupt-parent = <&gicv2>;
 
+	clk_108MHz: clk-108M {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <108000000>;
+		clock-output-names = "108MHz-clock";
+	};
+
 	soc {
 		/*
 		 * Defined ranges:
@@ -244,6 +251,14 @@
 		hvs@7e400000 {
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		dvp: clock@7ef00000 {
+			compatible = "brcm,brcm2711-dvp";
+			reg = <0x7ef00000 0x10>;
+			clocks = <&clk_108MHz>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 
 	/*
-- 
git-series 0.9.1

[PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Maxime Ripard]

Now that we have a driver for the DVP, let's add its DT node.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 arch/arm/boot/dts/bcm2711.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
index a91cf68e3c4c..00bcaed1be32 100644
--- a/arch/arm/boot/dts/bcm2711.dtsi
+++ b/arch/arm/boot/dts/bcm2711.dtsi
@@ -12,6 +12,13 @@
 
 	interrupt-parent = <&gicv2>;
 
+	clk_108MHz: clk-108M {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <108000000>;
+		clock-output-names = "108MHz-clock";
+	};
+
 	soc {
 		/*
 		 * Defined ranges:
@@ -244,6 +251,14 @@
 		hvs@7e400000 {
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		dvp: clock@7ef00000 {
+			compatible = "brcm,brcm2711-dvp";
+			reg = <0x7ef00000 0x10>;
+			clocks = <&clk_108MHz>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 
 	/*
-- 
git-series 0.9.1

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Nicolas Saenz Julienne]

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On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> Now that we have a driver for the DVP, let's add its DT node.
> 
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

I can take this patch, but I guess the rest should go trough the clock tree.
Is it OK with you?

Regards,
Nicolas



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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Nicolas Saenz Julienne]

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On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> Now that we have a driver for the DVP, let's add its DT node.
> 
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

I can take this patch, but I guess the rest should go trough the clock tree.
Is it OK with you?

Regards,
Nicolas



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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Maxime Ripard]

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Hi Nicolas,

On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > Now that we have a driver for the DVP, let's add its DT node.
> > 
> > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > ---
> 
> I can take this patch, but I guess the rest should go trough the clock tree.
> Is it OK with you?

We have a build dependency on the reset framework for that driver, so it
should rather go through the reset tree (or Philipp should make an
immutable branch that the clk maintainers can merge).

Maxime

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Maxime Ripard]

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Hi Nicolas,

On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > Now that we have a driver for the DVP, let's add its DT node.
> > 
> > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > ---
> 
> I can take this patch, but I guess the rest should go trough the clock tree.
> Is it OK with you?

We have a build dependency on the reset framework for that driver, so it
should rather go through the reset tree (or Philipp should make an
immutable branch that the clk maintainers can merge).

Maxime

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Philipp Zabel]

Hi Maxime,

On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> Hi Nicolas,
> 
> On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > Now that we have a driver for the DVP, let's add its DT node.
> > > 
> > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > ---
> > 
> > I can take this patch, but I guess the rest should go trough the clock tree.
> > Is it OK with you?
> 
> We have a build dependency on the reset framework for that driver, so it
> should rather go through the reset tree (or Philipp should make an
> immutable branch that the clk maintainers can merge).

I've prepared an immutable branch that these patches could be based on
and that could be merged into the clk tree:

The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:

  Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)

are available in the Git repository at:

  git://git.pengutronix.de/git/pza/linux reset/simple

for you to fetch changes up to a9701376ed0fb61a5be4bb438daf26bd9cfa24b5:

  reset: simple: Add reset callback (2020-06-16 14:19:57 +0200)

----------------------------------------------------------------
Maxime Ripard (2):
      reset: Move reset-simple header out of drivers/reset
      reset: simple: Add reset callback

 drivers/reset/reset-simple.c                    | 23 +++++++++++++++++++++--
 drivers/reset/reset-socfpga.c                   |  3 +--
 drivers/reset/reset-sunxi.c                     |  3 +--
 drivers/reset/reset-uniphier-glue.c             |  3 +--
 {drivers => include/linux}/reset/reset-simple.h |  7 +++++++
 5 files changed, 31 insertions(+), 8 deletions(-)
 rename {drivers => include/linux}/reset/reset-simple.h (74%)

regards
Philipp

Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Philipp Zabel]

Hi Maxime,

On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> Hi Nicolas,
> 
> On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > Now that we have a driver for the DVP, let's add its DT node.
> > > 
> > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > ---
> > 
> > I can take this patch, but I guess the rest should go trough the clock tree.
> > Is it OK with you?
> 
> We have a build dependency on the reset framework for that driver, so it
> should rather go through the reset tree (or Philipp should make an
> immutable branch that the clk maintainers can merge).

I've prepared an immutable branch that these patches could be based on
and that could be merged into the clk tree:

The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:

  Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)

are available in the Git repository at:

  git://git.pengutronix.de/git/pza/linux reset/simple

for you to fetch changes up to a9701376ed0fb61a5be4bb438daf26bd9cfa24b5:

  reset: simple: Add reset callback (2020-06-16 14:19:57 +0200)

----------------------------------------------------------------
Maxime Ripard (2):
      reset: Move reset-simple header out of drivers/reset
      reset: simple: Add reset callback

 drivers/reset/reset-simple.c                    | 23 +++++++++++++++++++++--
 drivers/reset/reset-socfpga.c                   |  3 +--
 drivers/reset/reset-sunxi.c                     |  3 +--
 drivers/reset/reset-uniphier-glue.c             |  3 +--
 {drivers => include/linux}/reset/reset-simple.h |  7 +++++++
 5 files changed, 31 insertions(+), 8 deletions(-)
 rename {drivers => include/linux}/reset/reset-simple.h (74%)

regards
Philipp

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1987 bytes --]

On Tue, Jun 16, 2020 at 02:56:55PM +0200, Philipp Zabel wrote:
> Hi Maxime,
> 
> On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> > Hi Nicolas,
> > 
> > On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > > Now that we have a driver for the DVP, let's add its DT node.
> > > > 
> > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > > ---
> > > 
> > > I can take this patch, but I guess the rest should go trough the clock tree.
> > > Is it OK with you?
> > 
> > We have a build dependency on the reset framework for that driver, so it
> > should rather go through the reset tree (or Philipp should make an
> > immutable branch that the clk maintainers can merge).
> 
> I've prepared an immutable branch that these patches could be based on
> and that could be merged into the clk tree:
> 
> The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:
> 
>   Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.pengutronix.de/git/pza/linux reset/simple
> 
> for you to fetch changes up to a9701376ed0fb61a5be4bb438daf26bd9cfa24b5:
> 
>   reset: simple: Add reset callback (2020-06-16 14:19:57 +0200)
> 
> ----------------------------------------------------------------
> Maxime Ripard (2):
>       reset: Move reset-simple header out of drivers/reset
>       reset: simple: Add reset callback
> 
>  drivers/reset/reset-simple.c                    | 23 +++++++++++++++++++++--
>  drivers/reset/reset-socfpga.c                   |  3 +--
>  drivers/reset/reset-sunxi.c                     |  3 +--
>  drivers/reset/reset-uniphier-glue.c             |  3 +--
>  {drivers => include/linux}/reset/reset-simple.h |  7 +++++++
>  5 files changed, 31 insertions(+), 8 deletions(-)
>  rename {drivers => include/linux}/reset/reset-simple.h (74%)

Awesome, thanks!
Maxime

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Maxime Ripard]

[-- Attachment #1.1: Type: text/plain, Size: 1987 bytes --]

On Tue, Jun 16, 2020 at 02:56:55PM +0200, Philipp Zabel wrote:
> Hi Maxime,
> 
> On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> > Hi Nicolas,
> > 
> > On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > > Now that we have a driver for the DVP, let's add its DT node.
> > > > 
> > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > > ---
> > > 
> > > I can take this patch, but I guess the rest should go trough the clock tree.
> > > Is it OK with you?
> > 
> > We have a build dependency on the reset framework for that driver, so it
> > should rather go through the reset tree (or Philipp should make an
> > immutable branch that the clk maintainers can merge).
> 
> I've prepared an immutable branch that these patches could be based on
> and that could be merged into the clk tree:
> 
> The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:
> 
>   Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.pengutronix.de/git/pza/linux reset/simple
> 
> for you to fetch changes up to a9701376ed0fb61a5be4bb438daf26bd9cfa24b5:
> 
>   reset: simple: Add reset callback (2020-06-16 14:19:57 +0200)
> 
> ----------------------------------------------------------------
> Maxime Ripard (2):
>       reset: Move reset-simple header out of drivers/reset
>       reset: simple: Add reset callback
> 
>  drivers/reset/reset-simple.c                    | 23 +++++++++++++++++++++--
>  drivers/reset/reset-socfpga.c                   |  3 +--
>  drivers/reset/reset-sunxi.c                     |  3 +--
>  drivers/reset/reset-uniphier-glue.c             |  3 +--
>  {drivers => include/linux}/reset/reset-simple.h |  7 +++++++
>  5 files changed, 31 insertions(+), 8 deletions(-)
>  rename {drivers => include/linux}/reset/reset-simple.h (74%)

Awesome, thanks!
Maxime

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Stephen Boyd]

Quoting Philipp Zabel (2020-06-16 05:56:55)
> Hi Maxime,
> 
> On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> > Hi Nicolas,
> > 
> > On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > > Now that we have a driver for the DVP, let's add its DT node.
> > > > 
> > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > > ---
> > > 
> > > I can take this patch, but I guess the rest should go trough the clock tree.
> > > Is it OK with you?
> > 
> > We have a build dependency on the reset framework for that driver, so it
> > should rather go through the reset tree (or Philipp should make an
> > immutable branch that the clk maintainers can merge).
> 
> I've prepared an immutable branch that these patches could be based on
> and that could be merged into the clk tree:
> 
> The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:
> 
>   Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.pengutronix.de/git/pza/linux reset/simple
> 
> for you to fetch changes up to a9701376ed0fb61a5be4bb438daf26bd9cfa24b5:
> 
>   reset: simple: Add reset callback (2020-06-16 14:19:57 +0200)
> 

Thanks. I've pulled it into clk-next.

Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Stephen Boyd]

Quoting Philipp Zabel (2020-06-16 05:56:55)
> Hi Maxime,
> 
> On Tue, 2020-06-16 at 14:16 +0200, Maxime Ripard wrote:
> > Hi Nicolas,
> > 
> > On Mon, Jun 15, 2020 at 06:26:19PM +0200, Nicolas Saenz Julienne wrote:
> > > On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> > > > Now that we have a driver for the DVP, let's add its DT node.
> > > > 
> > > > Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> > > > ---
> > > 
> > > I can take this patch, but I guess the rest should go trough the clock tree.
> > > Is it OK with you?
> > 
> > We have a build dependency on the reset framework for that driver, so it
> > should rather go through the reset tree (or Philipp should make an
> > immutable branch that the clk maintainers can merge).
> 
> I've prepared an immutable branch that these patches could be based on
> and that could be merged into the clk tree:
> 
> The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407:
> 
>   Linux 5.8-rc1 (2020-06-14 12:45:04 -0700)
> 
> are available in the Git repository at:
> 
>   git://git.pengutronix.de/git/pza/linux reset/simple
> 
> for you to fetch changes up to a9701376ed0fb61a5be4bb438daf26bd9cfa24b5:
> 
>   reset: simple: Add reset callback (2020-06-16 14:19:57 +0200)
> 

Thanks. I've pulled it into clk-next.

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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Nicolas Saenz Julienne]

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On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> Now that we have a driver for the DVP, let's add its DT node.
> 
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied for-next,

Thanks,
Nicolas


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Re: [PATCH v4 3/3] ARM: dts: bcm2711: Add HDMI DVP

[Nicolas Saenz Julienne]

[-- Attachment #1.1: Type: text/plain, Size: 228 bytes --]

On Thu, 2020-06-11 at 11:23 +0200, Maxime Ripard wrote:
> Now that we have a driver for the DVP, let's add its DT node.
> 
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
> ---

Applied for-next,

Thanks,
Nicolas


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