All of lore.kernel.org
 help / color / mirror / Atom feed
From: Keqian Zhu <zhukeqian1@huawei.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	"Tian, Kevin" <kevin.tian@intel.com>
Cc: "Zhao, Yan Y" <yan.y.zhao@intel.com>,
	"maz@kernel.org" <maz@kernel.org>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	Kirti Wankhede <kwankhede@nvidia.com>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"prime.zeng@hisilicon.com" <prime.zeng@hisilicon.com>,
	Will Deacon <will@kernel.org>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC] Use SMMU HTTU for DMA dirty page tracking
Date: Fri, 5 Feb 2021 11:30:47 +0800	[thread overview]
Message-ID: <c1c96639-2311-398a-15e0-2ff2d59fe320@huawei.com> (raw)
In-Reply-To: <20200527091428.GB265288@myrica>

Hi Jean and Kevin,

FYI, I have send out the SMMUv3 HTTU support for DMA dirty tracking[1] a week ago.

Thanks,
Keqian

[1] https://lore.kernel.org/linux-iommu/20210128151742.18840-1-zhukeqian1@huawei.com/

On 2020/5/27 17:14, Jean-Philippe Brucker wrote:
> On Wed, May 27, 2020 at 08:40:47AM +0000, Tian, Kevin wrote:
>>> From: Xiang Zheng <zhengxiang9@huawei.com>
>>> Sent: Wednesday, May 27, 2020 2:45 PM
>>>
>>>
>>> On 2020/5/27 11:27, Tian, Kevin wrote:
>>>>> From: Xiang Zheng
>>>>> Sent: Monday, May 25, 2020 7:34 PM
>>>>>
>>>>> [+cc Kirti, Yan, Alex]
>>>>>
>>>>> On 2020/5/23 1:14, Jean-Philippe Brucker wrote:
>>>>>> Hi,
>>>>>>
>>>>>> On Tue, May 19, 2020 at 05:42:55PM +0800, Xiang Zheng wrote:
>>>>>>> Hi all,
>>>>>>>
>>>>>>> Is there any plan for enabling SMMU HTTU?
>>>>>>
>>>>>> Not outside of SVA, as far as I know.
>>>>>>
>>>>>
>>>>>>> I have seen the patch locates in the SVA series patch, which adds
>>>>>>> support for HTTU:
>>>>>>>     https://www.spinics.net/lists/arm-kernel/msg798694.html
>>>>>>>
>>>>>>> HTTU reduces the number of access faults on SMMU fault queue
>>>>>>> (permission faults also benifit from it).
>>>>>>>
>>>>>>> Besides reducing the faults, HTTU also helps to track dirty pages for
>>>>>>> device DMA. Is it feasible to utilize HTTU to get dirty pages on device
>>>>>>> DMA during VFIO live migration?
>>>>>>
>>>>>> As you know there is a VFIO interface for this under discussion:
>>>>>> https://lore.kernel.org/kvm/1589781397-28368-1-git-send-email-
>>>>> kwankhede@nvidia.com/
>>>>>> It doesn't implement an internal API to communicate with the IOMMU
>>>>> driver
>>>>>> about dirty pages.
>>>>
>>>> We plan to add such API later, e.g. to utilize A/D bit in VT-d 2nd-level
>>>> page tables (Rev 3.0).
>>>>
>>>
>>> Thank you, Kevin.
>>>
>>> When will you send this series patches? Maybe(Hope) we can also support
>>> hardware-based dirty pages tracking via common APIs based on your
>>> patches. :)
>>
>> Yan is working with Kirti on basic live migration support now. After that
>> part is done, we will start working on A/D bit support. Yes, common APIs
>> are definitely the goal here.
>>
>>>
>>>>>
>>>>>>
>>>>>>> If SMMU can track dirty pages, devices are not required to implement
>>>>>>> additional dirty pages tracking to support VFIO live migration.
>>>>>>
>>>>>> It seems feasible, though tracking it in the device might be more
>>>>>> efficient. I might have misunderstood but I think for live migration of
>>>>>> the Intel NIC they trap guest accesses to the device and introspect its
>>>>>> state to figure out which pages it is accessing.
>>>>
>>>> Does HTTU implement A/D-like mechanism in SMMU page tables, or just
>>>> report dirty pages in a log buffer? Either way tracking dirty pages in IOMMU
>>>> side is generic thus doesn't require device-specific tweak like in Intel NIC.
>>>>
>>>
>>> Currently HTTU just implement A/D-like mechanism in SMMU page tables.
>>> We certainly
>>> expect SMMU can also implement PML-like feature so that we can avoid
>>> walking the
>>> whole page table to get the dirty pages.
> 
> There is no reporting of dirty pages in log buffer. It might be possible
> to do software logging based on PRI or Stall, but that requires special
> support in the endpoint as well as the SMMU.
> 
>> Is there a link to HTTU introduction?
> 
> I don't know any gentle introduction, but there are sections D5.4.11
> "Hardware management of the Access flag and dirty state" in the ARM
> Architecture Reference Manual (DDI0487E), and section 3.13 "Translation
> table entries and Access/Dirty flags" in the SMMU specification
> (IHI0070C). HTTU stands for "Hardware Translation Table Update".
> 
> In short, when HTTU is enabled, the SMMU translation performs an atomic
> read-modify-write on the leaf translation table descriptor, setting some
> bits depending on the type of memory access. This can be enabled
> independently on both stage-1 and stage-2 tables (equivalent to your 1st
> and 2nd page tables levels, I think).
> 
> Thanks,
> Jean
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
> .
> 
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Keqian Zhu <zhukeqian1@huawei.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	"Tian, Kevin" <kevin.tian@intel.com>
Cc: "Zhao, Yan Y" <yan.y.zhao@intel.com>,
	"maz@kernel.org" <maz@kernel.org>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	Kirti Wankhede <kwankhede@nvidia.com>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"prime.zeng@hisilicon.com" <prime.zeng@hisilicon.com>,
	Will Deacon <will@kernel.org>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC] Use SMMU HTTU for DMA dirty page tracking
Date: Fri, 5 Feb 2021 11:30:47 +0800	[thread overview]
Message-ID: <c1c96639-2311-398a-15e0-2ff2d59fe320@huawei.com> (raw)
In-Reply-To: <20200527091428.GB265288@myrica>

Hi Jean and Kevin,

FYI, I have send out the SMMUv3 HTTU support for DMA dirty tracking[1] a week ago.

Thanks,
Keqian

[1] https://lore.kernel.org/linux-iommu/20210128151742.18840-1-zhukeqian1@huawei.com/

On 2020/5/27 17:14, Jean-Philippe Brucker wrote:
> On Wed, May 27, 2020 at 08:40:47AM +0000, Tian, Kevin wrote:
>>> From: Xiang Zheng <zhengxiang9@huawei.com>
>>> Sent: Wednesday, May 27, 2020 2:45 PM
>>>
>>>
>>> On 2020/5/27 11:27, Tian, Kevin wrote:
>>>>> From: Xiang Zheng
>>>>> Sent: Monday, May 25, 2020 7:34 PM
>>>>>
>>>>> [+cc Kirti, Yan, Alex]
>>>>>
>>>>> On 2020/5/23 1:14, Jean-Philippe Brucker wrote:
>>>>>> Hi,
>>>>>>
>>>>>> On Tue, May 19, 2020 at 05:42:55PM +0800, Xiang Zheng wrote:
>>>>>>> Hi all,
>>>>>>>
>>>>>>> Is there any plan for enabling SMMU HTTU?
>>>>>>
>>>>>> Not outside of SVA, as far as I know.
>>>>>>
>>>>>
>>>>>>> I have seen the patch locates in the SVA series patch, which adds
>>>>>>> support for HTTU:
>>>>>>>     https://www.spinics.net/lists/arm-kernel/msg798694.html
>>>>>>>
>>>>>>> HTTU reduces the number of access faults on SMMU fault queue
>>>>>>> (permission faults also benifit from it).
>>>>>>>
>>>>>>> Besides reducing the faults, HTTU also helps to track dirty pages for
>>>>>>> device DMA. Is it feasible to utilize HTTU to get dirty pages on device
>>>>>>> DMA during VFIO live migration?
>>>>>>
>>>>>> As you know there is a VFIO interface for this under discussion:
>>>>>> https://lore.kernel.org/kvm/1589781397-28368-1-git-send-email-
>>>>> kwankhede@nvidia.com/
>>>>>> It doesn't implement an internal API to communicate with the IOMMU
>>>>> driver
>>>>>> about dirty pages.
>>>>
>>>> We plan to add such API later, e.g. to utilize A/D bit in VT-d 2nd-level
>>>> page tables (Rev 3.0).
>>>>
>>>
>>> Thank you, Kevin.
>>>
>>> When will you send this series patches? Maybe(Hope) we can also support
>>> hardware-based dirty pages tracking via common APIs based on your
>>> patches. :)
>>
>> Yan is working with Kirti on basic live migration support now. After that
>> part is done, we will start working on A/D bit support. Yes, common APIs
>> are definitely the goal here.
>>
>>>
>>>>>
>>>>>>
>>>>>>> If SMMU can track dirty pages, devices are not required to implement
>>>>>>> additional dirty pages tracking to support VFIO live migration.
>>>>>>
>>>>>> It seems feasible, though tracking it in the device might be more
>>>>>> efficient. I might have misunderstood but I think for live migration of
>>>>>> the Intel NIC they trap guest accesses to the device and introspect its
>>>>>> state to figure out which pages it is accessing.
>>>>
>>>> Does HTTU implement A/D-like mechanism in SMMU page tables, or just
>>>> report dirty pages in a log buffer? Either way tracking dirty pages in IOMMU
>>>> side is generic thus doesn't require device-specific tweak like in Intel NIC.
>>>>
>>>
>>> Currently HTTU just implement A/D-like mechanism in SMMU page tables.
>>> We certainly
>>> expect SMMU can also implement PML-like feature so that we can avoid
>>> walking the
>>> whole page table to get the dirty pages.
> 
> There is no reporting of dirty pages in log buffer. It might be possible
> to do software logging based on PRI or Stall, but that requires special
> support in the endpoint as well as the SMMU.
> 
>> Is there a link to HTTU introduction?
> 
> I don't know any gentle introduction, but there are sections D5.4.11
> "Hardware management of the Access flag and dirty state" in the ARM
> Architecture Reference Manual (DDI0487E), and section 3.13 "Translation
> table entries and Access/Dirty flags" in the SMMU specification
> (IHI0070C). HTTU stands for "Hardware Translation Table Update".
> 
> In short, when HTTU is enabled, the SMMU translation performs an atomic
> read-modify-write on the leaf translation table descriptor, setting some
> bits depending on the type of memory access. This can be enabled
> independently on both stage-1 and stage-2 tables (equivalent to your 1st
> and 2nd page tables levels, I think).
> 
> Thanks,
> Jean
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
> .
> 
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Keqian Zhu <zhukeqian1@huawei.com>
To: Jean-Philippe Brucker <jean-philippe@linaro.org>,
	"Tian, Kevin" <kevin.tian@intel.com>
Cc: "Zhao, Yan Y" <yan.y.zhao@intel.com>,
	"maz@kernel.org" <maz@kernel.org>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	Kirti Wankhede <kwankhede@nvidia.com>,
	"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"prime.zeng@hisilicon.com" <prime.zeng@hisilicon.com>,
	Will Deacon <will@kernel.org>,
	"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC] Use SMMU HTTU for DMA dirty page tracking
Date: Fri, 5 Feb 2021 11:30:47 +0800	[thread overview]
Message-ID: <c1c96639-2311-398a-15e0-2ff2d59fe320@huawei.com> (raw)
In-Reply-To: <20200527091428.GB265288@myrica>

Hi Jean and Kevin,

FYI, I have send out the SMMUv3 HTTU support for DMA dirty tracking[1] a week ago.

Thanks,
Keqian

[1] https://lore.kernel.org/linux-iommu/20210128151742.18840-1-zhukeqian1@huawei.com/

On 2020/5/27 17:14, Jean-Philippe Brucker wrote:
> On Wed, May 27, 2020 at 08:40:47AM +0000, Tian, Kevin wrote:
>>> From: Xiang Zheng <zhengxiang9@huawei.com>
>>> Sent: Wednesday, May 27, 2020 2:45 PM
>>>
>>>
>>> On 2020/5/27 11:27, Tian, Kevin wrote:
>>>>> From: Xiang Zheng
>>>>> Sent: Monday, May 25, 2020 7:34 PM
>>>>>
>>>>> [+cc Kirti, Yan, Alex]
>>>>>
>>>>> On 2020/5/23 1:14, Jean-Philippe Brucker wrote:
>>>>>> Hi,
>>>>>>
>>>>>> On Tue, May 19, 2020 at 05:42:55PM +0800, Xiang Zheng wrote:
>>>>>>> Hi all,
>>>>>>>
>>>>>>> Is there any plan for enabling SMMU HTTU?
>>>>>>
>>>>>> Not outside of SVA, as far as I know.
>>>>>>
>>>>>
>>>>>>> I have seen the patch locates in the SVA series patch, which adds
>>>>>>> support for HTTU:
>>>>>>>     https://www.spinics.net/lists/arm-kernel/msg798694.html
>>>>>>>
>>>>>>> HTTU reduces the number of access faults on SMMU fault queue
>>>>>>> (permission faults also benifit from it).
>>>>>>>
>>>>>>> Besides reducing the faults, HTTU also helps to track dirty pages for
>>>>>>> device DMA. Is it feasible to utilize HTTU to get dirty pages on device
>>>>>>> DMA during VFIO live migration?
>>>>>>
>>>>>> As you know there is a VFIO interface for this under discussion:
>>>>>> https://lore.kernel.org/kvm/1589781397-28368-1-git-send-email-
>>>>> kwankhede@nvidia.com/
>>>>>> It doesn't implement an internal API to communicate with the IOMMU
>>>>> driver
>>>>>> about dirty pages.
>>>>
>>>> We plan to add such API later, e.g. to utilize A/D bit in VT-d 2nd-level
>>>> page tables (Rev 3.0).
>>>>
>>>
>>> Thank you, Kevin.
>>>
>>> When will you send this series patches? Maybe(Hope) we can also support
>>> hardware-based dirty pages tracking via common APIs based on your
>>> patches. :)
>>
>> Yan is working with Kirti on basic live migration support now. After that
>> part is done, we will start working on A/D bit support. Yes, common APIs
>> are definitely the goal here.
>>
>>>
>>>>>
>>>>>>
>>>>>>> If SMMU can track dirty pages, devices are not required to implement
>>>>>>> additional dirty pages tracking to support VFIO live migration.
>>>>>>
>>>>>> It seems feasible, though tracking it in the device might be more
>>>>>> efficient. I might have misunderstood but I think for live migration of
>>>>>> the Intel NIC they trap guest accesses to the device and introspect its
>>>>>> state to figure out which pages it is accessing.
>>>>
>>>> Does HTTU implement A/D-like mechanism in SMMU page tables, or just
>>>> report dirty pages in a log buffer? Either way tracking dirty pages in IOMMU
>>>> side is generic thus doesn't require device-specific tweak like in Intel NIC.
>>>>
>>>
>>> Currently HTTU just implement A/D-like mechanism in SMMU page tables.
>>> We certainly
>>> expect SMMU can also implement PML-like feature so that we can avoid
>>> walking the
>>> whole page table to get the dirty pages.
> 
> There is no reporting of dirty pages in log buffer. It might be possible
> to do software logging based on PRI or Stall, but that requires special
> support in the endpoint as well as the SMMU.
> 
>> Is there a link to HTTU introduction?
> 
> I don't know any gentle introduction, but there are sections D5.4.11
> "Hardware management of the Access flag and dirty state" in the ARM
> Architecture Reference Manual (DDI0487E), and section 3.13 "Translation
> table entries and Access/Dirty flags" in the SMMU specification
> (IHI0070C). HTTU stands for "Hardware Translation Table Update".
> 
> In short, when HTTU is enabled, the SMMU translation performs an atomic
> read-modify-write on the leaf translation table descriptor, setting some
> bits depending on the type of memory access. This can be enabled
> independently on both stage-1 and stage-2 tables (equivalent to your 1st
> and 2nd page tables levels, I think).
> 
> Thanks,
> Jean
> _______________________________________________
> kvmarm mailing list
> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
> .
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-02-05  3:31 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-19  9:42 [RFC] Use SMMU HTTU for DMA dirty page tracking Xiang Zheng
2020-05-19  9:42 ` Xiang Zheng
2020-05-22 17:14 ` Jean-Philippe Brucker
2020-05-22 17:14   ` Jean-Philippe Brucker
2020-05-22 17:14   ` Jean-Philippe Brucker
2020-05-25 11:34   ` Xiang Zheng
2020-05-25 11:34     ` Xiang Zheng
2020-05-25 11:34     ` Xiang Zheng
2020-05-27  3:27     ` Tian, Kevin
2020-05-27  3:27       ` Tian, Kevin
2020-05-27  3:27       ` Tian, Kevin
2020-05-27  6:45       ` Xiang Zheng
2020-05-27  6:45         ` Xiang Zheng
2020-05-27  6:45         ` Xiang Zheng
2020-05-27  8:40         ` Tian, Kevin
2020-05-27  8:40           ` Tian, Kevin
2020-05-27  8:40           ` Tian, Kevin
2020-05-27  9:14           ` Jean-Philippe Brucker
2020-05-27  9:14             ` Jean-Philippe Brucker
2020-05-27  9:14             ` Jean-Philippe Brucker
2021-02-05  3:30             ` Keqian Zhu [this message]
2021-02-05  3:30               ` Keqian Zhu
2021-02-05  3:30               ` Keqian Zhu
2021-02-05  5:21               ` Tian, Kevin
2021-02-05  5:21                 ` Tian, Kevin
2021-02-05  5:21                 ` Tian, Kevin
2020-05-27  6:46     ` Zengtao (B)
2020-05-27  6:46       ` Zengtao (B)
2020-05-27  6:46       ` Zengtao (B)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c1c96639-2311-398a-15e0-2ff2d59fe320@huawei.com \
    --to=zhukeqian1@huawei.com \
    --cc=alex.williamson@redhat.com \
    --cc=iommu@lists.linux-foundation.org \
    --cc=jean-philippe@linaro.org \
    --cc=kevin.tian@intel.com \
    --cc=kvmarm@lists.cs.columbia.edu \
    --cc=kwankhede@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=prime.zeng@hisilicon.com \
    --cc=will@kernel.org \
    --cc=yan.y.zhao@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.