* [PATCH 0/2] target/ppc: Use tcg_constant_*
@ 2021-10-03 14:17 Philippe Mathieu-Daudé
2021-10-03 14:17 ` [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb() Philippe Mathieu-Daudé
2021-10-03 14:17 ` [PATCH 2/2] target/ppc: Use tcg_constant_i64() in gen_brh() Philippe Mathieu-Daudé
0 siblings, 2 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-03 14:17 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Philippe Mathieu-Daudé,
qemu-ppc, Greg Kurz, David Gibson
Replace temporary TCG registers by tcg_constant_*() when possible.
Philippe Mathieu-Daudé (2):
target/ppc: Use tcg_constant_i32() in gen_setb()
target/ppc: Use tcg_constant_i64() in gen_brh()
target/ppc/translate.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
--
2.31.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb()
2021-10-03 14:17 [PATCH 0/2] target/ppc: Use tcg_constant_* Philippe Mathieu-Daudé
@ 2021-10-03 14:17 ` Philippe Mathieu-Daudé
2021-10-03 15:21 ` Richard Henderson
2021-10-05 0:46 ` David Gibson
2021-10-03 14:17 ` [PATCH 2/2] target/ppc: Use tcg_constant_i64() in gen_brh() Philippe Mathieu-Daudé
1 sibling, 2 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-03 14:17 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Philippe Mathieu-Daudé,
qemu-ppc, Greg Kurz, David Gibson
Avoid using TCG temporaries for the -1 and 8 constant values.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/ppc/translate.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index b985e9e55bc..193d8e89152 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -5074,19 +5074,15 @@ static void gen_mtspr(DisasContext *ctx)
static void gen_setb(DisasContext *ctx)
{
TCGv_i32 t0 = tcg_temp_new_i32();
- TCGv_i32 t8 = tcg_temp_new_i32();
- TCGv_i32 tm1 = tcg_temp_new_i32();
+ TCGv_i32 t8 = tcg_constant_i32(8);
+ TCGv_i32 tm1 = tcg_constant_i32(-1);
int crf = crfS(ctx->opcode);
tcg_gen_setcondi_i32(TCG_COND_GEU, t0, cpu_crf[crf], 4);
- tcg_gen_movi_i32(t8, 8);
- tcg_gen_movi_i32(tm1, -1);
tcg_gen_movcond_i32(TCG_COND_GEU, t0, cpu_crf[crf], t8, tm1, t0);
tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
tcg_temp_free_i32(t0);
- tcg_temp_free_i32(t8);
- tcg_temp_free_i32(tm1);
}
#endif
--
2.31.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] target/ppc: Use tcg_constant_i64() in gen_brh()
2021-10-03 14:17 [PATCH 0/2] target/ppc: Use tcg_constant_* Philippe Mathieu-Daudé
2021-10-03 14:17 ` [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb() Philippe Mathieu-Daudé
@ 2021-10-03 14:17 ` Philippe Mathieu-Daudé
2021-10-03 15:22 ` Richard Henderson
1 sibling, 1 reply; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-10-03 14:17 UTC (permalink / raw)
To: qemu-devel
Cc: Richard Henderson, Philippe Mathieu-Daudé,
qemu-ppc, Greg Kurz, David Gibson
The mask of the Byte-Reverse Halfword opcode is a read-only
constant. We can avoid using a TCG temporary by moving the
mask to the constant pool.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/ppc/translate.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 193d8e89152..30a60d60973 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7575,18 +7575,16 @@ static void gen_brw(DisasContext *ctx)
/* brh */
static void gen_brh(DisasContext *ctx)
{
- TCGv_i64 t0 = tcg_temp_new_i64();
+ TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull);
TCGv_i64 t1 = tcg_temp_new_i64();
TCGv_i64 t2 = tcg_temp_new_i64();
- tcg_gen_movi_i64(t0, 0x00ff00ff00ff00ffull);
tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8);
- tcg_gen_and_i64(t2, t1, t0);
- tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], t0);
+ tcg_gen_and_i64(t2, t1, mask);
+ tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], mask);
tcg_gen_shli_i64(t1, t1, 8);
tcg_gen_or_i64(cpu_gpr[rA(ctx->opcode)], t1, t2);
- tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
tcg_temp_free_i64(t2);
}
--
2.31.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb()
2021-10-03 14:17 ` [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb() Philippe Mathieu-Daudé
@ 2021-10-03 15:21 ` Richard Henderson
2021-10-05 0:46 ` David Gibson
1 sibling, 0 replies; 6+ messages in thread
From: Richard Henderson @ 2021-10-03 15:21 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: qemu-ppc, Greg Kurz, David Gibson
On 10/3/21 10:17 AM, Philippe Mathieu-Daudé wrote:
> Avoid using TCG temporaries for the -1 and 8 constant values.
>
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
> target/ppc/translate.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] target/ppc: Use tcg_constant_i64() in gen_brh()
2021-10-03 14:17 ` [PATCH 2/2] target/ppc: Use tcg_constant_i64() in gen_brh() Philippe Mathieu-Daudé
@ 2021-10-03 15:22 ` Richard Henderson
0 siblings, 0 replies; 6+ messages in thread
From: Richard Henderson @ 2021-10-03 15:22 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel; +Cc: qemu-ppc, Greg Kurz, David Gibson
On 10/3/21 10:17 AM, Philippe Mathieu-Daudé wrote:
> The mask of the Byte-Reverse Halfword opcode is a read-only
> constant. We can avoid using a TCG temporary by moving the
> mask to the constant pool.
>
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
> target/ppc/translate.c | 8 +++-----
> 1 file changed, 3 insertions(+), 5 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb()
2021-10-03 14:17 ` [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb() Philippe Mathieu-Daudé
2021-10-03 15:21 ` Richard Henderson
@ 2021-10-05 0:46 ` David Gibson
1 sibling, 0 replies; 6+ messages in thread
From: David Gibson @ 2021-10-05 0:46 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Richard Henderson, qemu-ppc, qemu-devel, Greg Kurz
[-- Attachment #1: Type: text/plain, Size: 1480 bytes --]
On Sun, Oct 03, 2021 at 04:17:10PM +0200, Philippe Mathieu-Daudé wrote:
> Avoid using TCG temporaries for the -1 and 8 constant values.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Both patches applied to ppc-for-6.2, thanks.
> ---
> target/ppc/translate.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index b985e9e55bc..193d8e89152 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -5074,19 +5074,15 @@ static void gen_mtspr(DisasContext *ctx)
> static void gen_setb(DisasContext *ctx)
> {
> TCGv_i32 t0 = tcg_temp_new_i32();
> - TCGv_i32 t8 = tcg_temp_new_i32();
> - TCGv_i32 tm1 = tcg_temp_new_i32();
> + TCGv_i32 t8 = tcg_constant_i32(8);
> + TCGv_i32 tm1 = tcg_constant_i32(-1);
> int crf = crfS(ctx->opcode);
>
> tcg_gen_setcondi_i32(TCG_COND_GEU, t0, cpu_crf[crf], 4);
> - tcg_gen_movi_i32(t8, 8);
> - tcg_gen_movi_i32(tm1, -1);
> tcg_gen_movcond_i32(TCG_COND_GEU, t0, cpu_crf[crf], t8, tm1, t0);
> tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0);
>
> tcg_temp_free_i32(t0);
> - tcg_temp_free_i32(t8);
> - tcg_temp_free_i32(tm1);
> }
> #endif
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-10-05 1:08 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-10-03 14:17 [PATCH 0/2] target/ppc: Use tcg_constant_* Philippe Mathieu-Daudé
2021-10-03 14:17 ` [PATCH 1/2] target/ppc: Use tcg_constant_i32() in gen_setb() Philippe Mathieu-Daudé
2021-10-03 15:21 ` Richard Henderson
2021-10-05 0:46 ` David Gibson
2021-10-03 14:17 ` [PATCH 2/2] target/ppc: Use tcg_constant_i64() in gen_brh() Philippe Mathieu-Daudé
2021-10-03 15:22 ` Richard Henderson
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