* dmaengine: ioatdma: set the completion address register after channel reset
@ 2018-06-11 19:38 Dave Jiang
0 siblings, 0 replies; 3+ messages in thread
From: Dave Jiang @ 2018-06-11 19:38 UTC (permalink / raw)
To: Sinan Kaya, vkoul; +Cc: dmaengine
On 06/11/2018 12:37 PM, Sinan Kaya wrote:
> On 6/11/2018 3:30 PM, Dave Jiang wrote:
>> + /* set the completion address register again */
>> + writel(((u64)ioat_chan->completion_dma) & 0x00000000FFFFFFFF,
>> + ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
>> + writel(((u64)ioat_chan->completion_dma) >> 32,
>> + ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
>
> You could have used lower_32_bits() and upper_32_bits() macros here.
>
I just copy and pasted legacy code from somewhere else in the driver. I
can update.
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^ permalink raw reply [flat|nested] 3+ messages in thread
* dmaengine: ioatdma: set the completion address register after channel reset
@ 2018-06-11 19:37 Sinan Kaya
0 siblings, 0 replies; 3+ messages in thread
From: Sinan Kaya @ 2018-06-11 19:37 UTC (permalink / raw)
To: Dave Jiang, vkoul; +Cc: dmaengine
On 6/11/2018 3:30 PM, Dave Jiang wrote:
> + /* set the completion address register again */
> + writel(((u64)ioat_chan->completion_dma) & 0x00000000FFFFFFFF,
> + ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
> + writel(((u64)ioat_chan->completion_dma) >> 32,
> + ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
You could have used lower_32_bits() and upper_32_bits() macros here.
^ permalink raw reply [flat|nested] 3+ messages in thread
* dmaengine: ioatdma: set the completion address register after channel reset
@ 2018-06-11 19:30 Dave Jiang
0 siblings, 0 replies; 3+ messages in thread
From: Dave Jiang @ 2018-06-11 19:30 UTC (permalink / raw)
To: vkoul; +Cc: dmaengine
It seems that starting with Skylake Xeon, channel reset clears the
completion address register. Make sure the completion address register is
set again after reset.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
drivers/dma/ioat/dma.c | 6 ++++++
1 file changed, 6 insertions(+)
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diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index 8b5b23a8ace9..71852751ef3c 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -688,6 +688,12 @@ static void ioat_restart_channel(struct ioatdma_chan *ioat_chan)
{
u64 phys_complete;
+ /* set the completion address register again */
+ writel(((u64)ioat_chan->completion_dma) & 0x00000000FFFFFFFF,
+ ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
+ writel(((u64)ioat_chan->completion_dma) >> 32,
+ ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
+
ioat_quiesce(ioat_chan, 0);
if (ioat_cleanup_preamble(ioat_chan, &phys_complete))
__cleanup(ioat_chan, phys_complete);
^ permalink raw reply related [flat|nested] 3+ messages in thread
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