Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Adrian Hunter]

On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
> Hello Adrian Hunter,
> 
> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
> 
> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
> 
> I am wondering whether there is a method or patch that can fix this boundary limitation.
> Thanks.
> Best Regards,
> Jyan Chou

Hello Jyan Chou

I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
To restrict DMA to low memory addresses a DMA mask can be used.

But perhaps you mean not to cross a 128 MB boundary?

Please cc your questions to the linux kernel mmc mailing list: linux-mmc@vger.kernel.org because others
can answer too.

Regards
Adrian

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Shawn Lin]

On 2022/11/8 16:20, Adrian Hunter wrote:
> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>> Hello Adrian Hunter,
>>
>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>
>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".

Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But it
has already been solved by upstream driver.

FYI:

commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: sdhci-of-dwcmshc: 
solve 128MB DMA boundary limitation")





>>
>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>> Thanks.
>> Best Regards,
>> Jyan Chou
> 
> Hello Jyan Chou
> 
> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
> To restrict DMA to low memory addresses a DMA mask can be used.
> 
> But perhaps you mean not to cross a 128 MB boundary?
> 
> Please cc your questions to the linux kernel mmc mailing list: linux-mmc@vger.kernel.org because others
> can answer too.
> 
> Regards
> Adrian

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Adrian Hunter]

On 8/11/22 10:28, Shawn Lin wrote:
> On 2022/11/8 16:20, Adrian Hunter wrote:
>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>> Hello Adrian Hunter,
>>>
>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>
>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
> 
> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But it
> has already been solved by upstream driver.
> 
> FYI:
> 
> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")

CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?

> 
>>>
>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>> Thanks.
>>> Best Regards,
>>> Jyan Chou
>>
>> Hello Jyan Chou
>>
>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>> To restrict DMA to low memory addresses a DMA mask can be used.
>>
>> But perhaps you mean not to cross a 128 MB boundary?
>>
>> Please cc your questions to the linux kernel mmc mailing list: linux-mmc@vger.kernel.org because others
>> can answer too.
>>
>> Regards
>> Adrian

RE: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Jyan Chou [周芷安]]

Hello,

But we found that this commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
is supported for sdhci host driver, not for eMMC driver

-----Original Message-----
From: Shawn Lin <shawn.lin@rock-chips.com> 
Sent: Tuesday, November 8, 2022 4:28 PM
To: Jyan Chou [周芷安] <jyanchou@realtek.com>
Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; Adrian Hunter <adrian.hunter@intel.com>
Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

On 2022/11/8 16:20, Adrian Hunter wrote:
> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>> Hello Adrian Hunter,
>>
>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>
>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".

Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But it has already been solved by upstream driver.

FYI:

commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: sdhci-of-dwcmshc: 
solve 128MB DMA boundary limitation")





>>
>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>> Thanks.
>> Best Regards,
>> Jyan Chou
> 
> Hello Jyan Chou
> 
> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
> To restrict DMA to low memory addresses a DMA mask can be used.
> 
> But perhaps you mean not to cross a 128 MB boundary?
> 
> Please cc your questions to the linux kernel mmc mailing list: 
> linux-mmc@vger.kernel.org because others can answer too.
> 
> Regards
> Adrian

------Please consider the environment before printing this e-mail.

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Shawn Lin]

+ Jisheng Zhang

On 2022/11/8 16:34, Adrian Hunter wrote:
> On 8/11/22 10:28, Shawn Lin wrote:
>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>> Hello Adrian Hunter,
>>>>
>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>
>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>
>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But it
>> has already been solved by upstream driver.
>>
>> FYI:
>>
>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
> 
> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?

I didn't find this limitation in synopsys DW IP databook.

> 
>>
>>>>
>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>> Thanks.
>>>> Best Regards,
>>>> Jyan Chou
>>>
>>> Hello Jyan Chou
>>>
>>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>
>>> But perhaps you mean not to cross a 128 MB boundary?
>>>
>>> Please cc your questions to the linux kernel mmc mailing list: linux-mmc@vger.kernel.org because others
>>> can answer too.
>>>
>>> Regards
>>> Adrian
> 

RE: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Jyan Chou [周芷安]]

> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?

I didn't find this limitation in synopsys DW IP databook.
>> I found it on page 84 

-----Original Message-----
From: Shawn Lin <shawn.lin@rock-chips.com> 
Sent: Tuesday, November 8, 2022 5:15 PM
To: Adrian Hunter <adrian.hunter@intel.com>
Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; Jyan Chou [周芷安] <jyanchou@realtek.com>; Jisheng.Zhang@synaptics.com
Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

+ Jisheng Zhang

On 2022/11/8 16:34, Adrian Hunter wrote:
> On 8/11/22 10:28, Shawn Lin wrote:
>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>> Hello Adrian Hunter,
>>>>
>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>
>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>
>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But 
>> it has already been solved by upstream driver.
>>
>> FYI:
>>
>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: 
>> sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
> 
> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?

I didn't find this limitation in synopsys DW IP databook.

> 
>>
>>>>
>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>> Thanks.
>>>> Best Regards,
>>>> Jyan Chou
>>>
>>> Hello Jyan Chou
>>>
>>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>
>>> But perhaps you mean not to cross a 128 MB boundary?
>>>
>>> Please cc your questions to the linux kernel mmc mailing list: 
>>> linux-mmc@vger.kernel.org because others can answer too.
>>>
>>> Regards
>>> Adrian
> 

------Please consider the environment before printing this e-mail.

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Shawn Lin]

On 2022/11/8 17:19, Jyan Chou [周芷安] wrote:
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
> 
> I didn't find this limitation in synopsys DW IP databook.
>>> I found it on page 84

I see, but it wasn't clear to me if this description on P84 is for CQ
engine part as well.  But seems yes after checking with the IP vendor.
So you do need a similar change for CQHCI in cqhci_host_alloc_tdl.

> 
> -----Original Message-----
> From: Shawn Lin <shawn.lin@rock-chips.com>
> Sent: Tuesday, November 8, 2022 5:15 PM
> To: Adrian Hunter <adrian.hunter@intel.com>
> Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; Jyan Chou [周芷安] <jyanchou@realtek.com>; Jisheng.Zhang@synaptics.com
> Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER
> 
> + Jisheng Zhang
> 
> On 2022/11/8 16:34, Adrian Hunter wrote:
>> On 8/11/22 10:28, Shawn Lin wrote:
>>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>>> Hello Adrian Hunter,
>>>>>
>>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>>
>>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>>
>>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But
>>> it has already been solved by upstream driver.
>>>
>>> FYI:
>>>
>>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc:
>>> sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
>>
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
> 
> I didn't find this limitation in synopsys DW IP databook.
> 
>>
>>>
>>>>>
>>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>>> Thanks.
>>>>> Best Regards,
>>>>> Jyan Chou
>>>>
>>>> Hello Jyan Chou
>>>>
>>>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>>
>>>> But perhaps you mean not to cross a 128 MB boundary?
>>>>
>>>> Please cc your questions to the linux kernel mmc mailing list:
>>>> linux-mmc@vger.kernel.org because others can answer too.
>>>>
>>>> Regards
>>>> Adrian
>>
> 
> ------Please consider the environment before printing this e-mail.

RE: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Jyan Chou [周芷安]]

> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
> So you do need a similar change for CQHCI

>> According to these comments, it is acceptable for us to update a patch to solve the limitation of 128MB boundary ?
	We have a patch and it works well on cmdq case.
	Thanks. 

-----Original Message-----
From: Shawn Lin <shawn.lin@rock-chips.com> 
Sent: Wednesday, November 9, 2022 11:46 AM
To: Jyan Chou [周芷安] <jyanchou@realtek.com>
Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; Jisheng.Zhang@synaptics.com; Adrian Hunter <adrian.hunter@intel.com>
Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER


On 2022/11/8 17:19, Jyan Chou [周芷安] wrote:
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
> 
> I didn't find this limitation in synopsys DW IP databook.
>>> I found it on page 84

I see, but it wasn't clear to me if this description on P84 is for CQ engine part as well.  But seems yes after checking with the IP vendor.
So you do need a similar change for CQHCI in cqhci_host_alloc_tdl.

> 
> -----Original Message-----
> From: Shawn Lin <shawn.lin@rock-chips.com>
> Sent: Tuesday, November 8, 2022 5:15 PM
> To: Adrian Hunter <adrian.hunter@intel.com>
> Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; 
> Jyan Chou [周芷安] <jyanchou@realtek.com>; Jisheng.Zhang@synaptics.com
> Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE 
> (CQHCI) DRIVER
> 
> + Jisheng Zhang
> 
> On 2022/11/8 16:34, Adrian Hunter wrote:
>> On 8/11/22 10:28, Shawn Lin wrote:
>>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>>> Hello Adrian Hunter,
>>>>>
>>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>>
>>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>>
>>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. 
>>> But it has already been solved by upstream driver.
>>>
>>> FYI:
>>>
>>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc:
>>> sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
>>
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
> 
> I didn't find this limitation in synopsys DW IP databook.
> 
>>
>>>
>>>>>
>>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>>> Thanks.
>>>>> Best Regards,
>>>>> Jyan Chou
>>>>
>>>> Hello Jyan Chou
>>>>
>>>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>>
>>>> But perhaps you mean not to cross a 128 MB boundary?
>>>>
>>>> Please cc your questions to the linux kernel mmc mailing list:
>>>> linux-mmc@vger.kernel.org because others can answer too.
>>>>
>>>> Regards
>>>> Adrian
>>
> 
> ------Please consider the environment before printing this e-mail.

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Adrian Hunter]

On 10/11/22 04:11, Jyan Chou [周芷安] wrote:
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
>> So you do need a similar change for CQHCI
> 
>>> According to these comments, it is acceptable for us to update a patch to solve the limitation of 128MB boundary ?
> 	We have a patch and it works well on cmdq case.
> 	Thanks. 

If you have a patch, you can of course submit it.

> 
> -----Original Message-----
> From: Shawn Lin <shawn.lin@rock-chips.com> 
> Sent: Wednesday, November 9, 2022 11:46 AM
> To: Jyan Chou [周芷安] <jyanchou@realtek.com>
> Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; Jisheng.Zhang@synaptics.com; Adrian Hunter <adrian.hunter@intel.com>
> Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER
> 
> 
> On 2022/11/8 17:19, Jyan Chou [周芷安] wrote:
>>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
>>
>> I didn't find this limitation in synopsys DW IP databook.
>>>> I found it on page 84
> 
> I see, but it wasn't clear to me if this description on P84 is for CQ engine part as well.  But seems yes after checking with the IP vendor.
> So you do need a similar change for CQHCI in cqhci_host_alloc_tdl.
> 
>>
>> -----Original Message-----
>> From: Shawn Lin <shawn.lin@rock-chips.com>
>> Sent: Tuesday, November 8, 2022 5:15 PM
>> To: Adrian Hunter <adrian.hunter@intel.com>
>> Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; 
>> Jyan Chou [周芷安] <jyanchou@realtek.com>; Jisheng.Zhang@synaptics.com
>> Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE 
>> (CQHCI) DRIVER
>>
>> + Jisheng Zhang
>>
>> On 2022/11/8 16:34, Adrian Hunter wrote:
>>> On 8/11/22 10:28, Shawn Lin wrote:
>>>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>>>> Hello Adrian Hunter,
>>>>>>
>>>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>>>
>>>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>>>
>>>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. 
>>>> But it has already been solved by upstream driver.
>>>>
>>>> FYI:
>>>>
>>>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc:
>>>> sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
>>>
>>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
>>
>> I didn't find this limitation in synopsys DW IP databook.
>>
>>>
>>>>
>>>>>>
>>>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>>>> Thanks.
>>>>>> Best Regards,
>>>>>> Jyan Chou
>>>>>
>>>>> Hello Jyan Chou
>>>>>
>>>>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>>>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>>>
>>>>> But perhaps you mean not to cross a 128 MB boundary?
>>>>>
>>>>> Please cc your questions to the linux kernel mmc mailing list:
>>>>> linux-mmc@vger.kernel.org because others can answer too.
>>>>>
>>>>> Regards
>>>>> Adrian
>>>
>>
>> ------Please consider the environment before printing this e-mail.

Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Adrian Hunter]

On 16/06/23 10:04, Jyan Chou [周芷安] wrote:
> Hello Adrian,
> 
>  
> 
> We had push one patch that would like to add a callback function in cqhci driver.
> 
> Due to the suggestion you gave us , we soon added our driver that implements ->setup_tran_desc() callback.
> 
> https://patchwork.kernel.org/project/linux-mmc/patch/20230616063731.17591-1-jyanchou@realtek.com/ <https://patchwork.kernel.org/project/linux-mmc/patch/20230616063731.17591-1-jyanchou@realtek.com/>

Why not add CQHCI support to dw_mmc.c ?

> 
> Do we need to push the setup_tran_desc() patch again, or can we use the patch below?
> 
> https://patchwork.kernel.org/project/linux-mmc/patch/20221116020012.19318-1-jyanchou@realtek.com/ <https://patchwork.kernel.org/project/linux-mmc/patch/20221116020012.19318-1-jyanchou@realtek.com/>

Please submit patches together as a patch set.

> 
>  
> 
> Please help to review the patch or give some advice.
> 
>  
> 
> Thanks a lot.
> 
>  
> 
> Best Regards,
> 
> Jyan
>