From: Suzuki K Poulose <suzuki.poulose@arm.com> To: mathieu.poirier@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mike.leach@linaro.org, coresight@lists.linaro.org Subject: Re: [RFC PATCH 08/14] coresight: etm4x: Convert all register accesses Date: Fri, 31 Jul 2020 10:49:37 +0100 [thread overview] Message-ID: <c3f6b2a2-67d6-44ed-9e03-c9f929bb469e@arm.com> (raw) In-Reply-To: <20200730202021.GE3155687@xps15> On 07/30/2020 09:20 PM, Mathieu Poirier wrote: > On Wed, Jul 22, 2020 at 06:20:34PM +0100, Suzuki K Poulose wrote: >> Convert all register accesses from etm4x driver to use a wrapper >> to allow switching the access at runtime with little overhead. >> >> co-developed by sed tool ;-), mostly equivalent to : >> >> s/readl\(_relaxed\)\?(drvdata->base + \(.*\))/etm4x_\1_read32(csdev, \2) >> s/writel\(_relaxed\)\?(\(.*\), drvdata->base + \(.*\))/etm4x_\1_write32(csdev, \2, \3) >> >> We don't want to replace them with the csdev_access_* to >> avoid a function call for every register access for system >> register access. >> >> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> >> Cc: Mike Leach <mike.leach@linaro.org> >> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> >> --- >> .../coresight/coresight-etm4x-sysfs.c | 9 +- >> drivers/hwtracing/coresight/coresight-etm4x.c | 334 +++++++++--------- >> drivers/hwtracing/coresight/coresight-etm4x.h | 24 ++ >> 3 files changed, 189 insertions(+), 178 deletions(-) >> Agreed to all the comments. >> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h >> index b8283e1d6d88..2b51d03ab6d7 100644 >> --- a/drivers/hwtracing/coresight/coresight-etm4x.h >> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h >> @@ -120,6 +120,30 @@ >> #define TRCCIDR2 0xFF8 >> #define TRCCIDR3 0xFFC >> >> +#define etm4x_relaxed_read32(csa, offset) \ >> + readl_relaxed((csa)->base + (offset)) >> + >> +#define etm4x_read32(csa, offset) \ >> + readl((csa)->base + (offset)) >> + >> +#define etm4x_relaxed_write32(csa, val, offset) \ >> + writel_relaxed((val), (csa)->base + (offset)) >> + >> +#define etm4x_write32(csa, val, offset) \ >> + writel((val), (csa)->base + (offset)) >> + >> +#define etm4x_relaxed_read64(csa, offset) \ >> + readq_relaxed((csa)->base + (offset)) >> + >> +#define etm4x_read64(csa, offset) \ >> + readq((csa)->base + (offset)) >> + >> +#define etm4x_relaxed_write64(csa, val, offset) \ >> + writeq_relaxed((val), (csa)->base + (offset)) >> + >> +#define etm4x_write64(csa, val, offset) \ >> + writeq((val), (csa)->base + (offset)) >> + > > Since I haven't gone through the rest of the patches I'll assume you want to > enhance the above to pick an access type at some point in the future. > Yes, they are plumbed in with the introduction of system instruction support. We don't want to the overhead of a function call for each register access. Also, we would like to avoid jumping through the large switch..cases for a compile time constant offset. Hence this macro. Cheers Suzuki
WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com> To: mathieu.poirier@linaro.org Cc: coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org Subject: Re: [RFC PATCH 08/14] coresight: etm4x: Convert all register accesses Date: Fri, 31 Jul 2020 10:49:37 +0100 [thread overview] Message-ID: <c3f6b2a2-67d6-44ed-9e03-c9f929bb469e@arm.com> (raw) In-Reply-To: <20200730202021.GE3155687@xps15> On 07/30/2020 09:20 PM, Mathieu Poirier wrote: > On Wed, Jul 22, 2020 at 06:20:34PM +0100, Suzuki K Poulose wrote: >> Convert all register accesses from etm4x driver to use a wrapper >> to allow switching the access at runtime with little overhead. >> >> co-developed by sed tool ;-), mostly equivalent to : >> >> s/readl\(_relaxed\)\?(drvdata->base + \(.*\))/etm4x_\1_read32(csdev, \2) >> s/writel\(_relaxed\)\?(\(.*\), drvdata->base + \(.*\))/etm4x_\1_write32(csdev, \2, \3) >> >> We don't want to replace them with the csdev_access_* to >> avoid a function call for every register access for system >> register access. >> >> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> >> Cc: Mike Leach <mike.leach@linaro.org> >> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> >> --- >> .../coresight/coresight-etm4x-sysfs.c | 9 +- >> drivers/hwtracing/coresight/coresight-etm4x.c | 334 +++++++++--------- >> drivers/hwtracing/coresight/coresight-etm4x.h | 24 ++ >> 3 files changed, 189 insertions(+), 178 deletions(-) >> Agreed to all the comments. >> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h >> index b8283e1d6d88..2b51d03ab6d7 100644 >> --- a/drivers/hwtracing/coresight/coresight-etm4x.h >> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h >> @@ -120,6 +120,30 @@ >> #define TRCCIDR2 0xFF8 >> #define TRCCIDR3 0xFFC >> >> +#define etm4x_relaxed_read32(csa, offset) \ >> + readl_relaxed((csa)->base + (offset)) >> + >> +#define etm4x_read32(csa, offset) \ >> + readl((csa)->base + (offset)) >> + >> +#define etm4x_relaxed_write32(csa, val, offset) \ >> + writel_relaxed((val), (csa)->base + (offset)) >> + >> +#define etm4x_write32(csa, val, offset) \ >> + writel((val), (csa)->base + (offset)) >> + >> +#define etm4x_relaxed_read64(csa, offset) \ >> + readq_relaxed((csa)->base + (offset)) >> + >> +#define etm4x_read64(csa, offset) \ >> + readq((csa)->base + (offset)) >> + >> +#define etm4x_relaxed_write64(csa, val, offset) \ >> + writeq_relaxed((val), (csa)->base + (offset)) >> + >> +#define etm4x_write64(csa, val, offset) \ >> + writeq((val), (csa)->base + (offset)) >> + > > Since I haven't gone through the rest of the patches I'll assume you want to > enhance the above to pick an access type at some point in the future. > Yes, they are plumbed in with the introduction of system instruction support. We don't want to the overhead of a function call for each register access. Also, we would like to avoid jumping through the large switch..cases for a compile time constant offset. Hence this macro. Cheers Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-07-31 9:44 UTC|newest] Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-22 17:20 [RFC PATCH 00/14] coresight: Support for ETMv4.4 system instructions Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 01/14] coresight: etm4x: Skip save/restore before device registration Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-29 18:01 ` Mathieu Poirier 2020-07-29 18:01 ` Mathieu Poirier 2020-07-30 14:45 ` Suzuki K Poulose 2020-07-30 14:45 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 02/14] coresight: Introduce device access abstraction Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-24 4:40 ` kernel test robot 2020-07-29 19:56 ` Mathieu Poirier 2020-07-29 19:56 ` Mathieu Poirier 2020-07-30 14:58 ` Suzuki K Poulose 2020-07-30 14:58 ` Suzuki K Poulose 2020-07-29 20:56 ` kernel test robot 2020-07-22 17:20 ` [RFC PATCH 03/14] coresight: tpiu: Use coresight " Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-29 21:01 ` Mathieu Poirier 2020-07-29 21:01 ` Mathieu Poirier 2020-07-31 11:36 ` Suzuki K Poulose 2020-07-31 11:36 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 04/14] coresight: etm4x: Free up argument of etm4_init_arch_data Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-30 17:31 ` Mathieu Poirier 2020-07-30 17:31 ` Mathieu Poirier 2020-07-31 9:39 ` Suzuki K Poulose 2020-07-31 9:39 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 05/14] coresight: Convert coresight_timeout to use access abstraction Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-30 18:00 ` Mathieu Poirier 2020-07-30 18:00 ` Mathieu Poirier 2020-07-22 17:20 ` [RFC PATCH 06/14] coresight: Convert claim and lock operations to use access wrappers Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-27 6:04 ` kernel test robot 2020-07-27 17:56 ` kernel test robot 2020-07-28 9:47 ` Suzuki K Poulose 2020-07-30 19:54 ` Mathieu Poirier 2020-07-30 19:54 ` Mathieu Poirier 2020-07-31 9:46 ` Suzuki K Poulose 2020-07-31 9:46 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 07/14] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-30 19:56 ` Mathieu Poirier 2020-07-30 19:56 ` Mathieu Poirier 2020-07-22 17:20 ` [RFC PATCH 08/14] coresight: etm4x: Convert all register accesses Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-30 20:20 ` Mathieu Poirier 2020-07-30 20:20 ` Mathieu Poirier 2020-07-31 9:49 ` Suzuki K Poulose [this message] 2020-07-31 9:49 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 09/14] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-30 21:41 ` Mathieu Poirier 2020-07-30 21:41 ` Mathieu Poirier 2020-07-31 9:51 ` Suzuki K Poulose 2020-07-31 9:51 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 10/14] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 11/14] coresight: etm4x: Detect system register access support Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 12/14] coresight: etm4x: Refactor probing routine Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 13/14] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-22 17:20 ` [RFC PATCH 14/14] dts: bindings: coresight: ETMv4.4 system register access only units Suzuki K Poulose 2020-07-22 17:20 ` Suzuki K Poulose 2020-07-23 17:27 ` Rob Herring 2020-07-23 17:27 ` Rob Herring 2020-07-29 17:20 ` Mathieu Poirier 2020-07-29 17:20 ` Mathieu Poirier 2020-07-30 16:38 ` Suzuki K Poulose 2020-07-30 16:38 ` Suzuki K Poulose 2020-08-10 20:14 ` Mathieu Poirier 2020-08-10 20:14 ` Mathieu Poirier
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