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From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Stephen Boyd" <sboyd@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>
Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-actions@lists.infradead.org
Subject: [PATCH v3 1/6] clk: actions: Fix h_clk for Actions S500 SoC
Date: Fri,  3 Jul 2020 20:05:07 +0300	[thread overview]
Message-ID: <c57e7ebabfa970014f073b92fe95b47d3e5a70b1.1593788312.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1593788312.git.cristian.ciocaltea@gmail.com>

The h_clk clock in the Actions Semi S500 SoC clock driver has an
invalid parent. Replace with the correct one.

Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v3:
 - Added Fixes tag
 - Added Mani's Reviewed-by tag

Changes in v2:
 - None

 drivers/clk/actions/owl-s500.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/actions/owl-s500.c b/drivers/clk/actions/owl-s500.c
index e2007ac4d235..0eb83a0b70bc 100644
--- a/drivers/clk/actions/owl-s500.c
+++ b/drivers/clk/actions/owl-s500.c
@@ -183,7 +183,7 @@ static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
 static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0);
 
 /* divider clocks */
-static OWL_DIVIDER(h_clk, "h_clk", "ahbprevdiv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
+static OWL_DIVIDER(h_clk, "h_clk", "ahbprediv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
 static OWL_DIVIDER(rmii_ref_clk, "rmii_ref_clk", "ethernet_pll_clk", CMU_ETHERNETPLL, 1, 1, rmii_ref_div_table, 0, 0);
 
 /* factor clocks */
-- 
2.27.0


WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Stephen Boyd" <sboyd@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: [PATCH v3 1/6] clk: actions: Fix h_clk for Actions S500 SoC
Date: Fri,  3 Jul 2020 20:05:07 +0300	[thread overview]
Message-ID: <c57e7ebabfa970014f073b92fe95b47d3e5a70b1.1593788312.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1593788312.git.cristian.ciocaltea@gmail.com>

The h_clk clock in the Actions Semi S500 SoC clock driver has an
invalid parent. Replace with the correct one.

Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v3:
 - Added Fixes tag
 - Added Mani's Reviewed-by tag

Changes in v2:
 - None

 drivers/clk/actions/owl-s500.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/actions/owl-s500.c b/drivers/clk/actions/owl-s500.c
index e2007ac4d235..0eb83a0b70bc 100644
--- a/drivers/clk/actions/owl-s500.c
+++ b/drivers/clk/actions/owl-s500.c
@@ -183,7 +183,7 @@ static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
 static OWL_GATE(hdmi_clk, "hdmi_clk", "hosc", CMU_DEVCLKEN1, 3, 0, 0);
 
 /* divider clocks */
-static OWL_DIVIDER(h_clk, "h_clk", "ahbprevdiv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
+static OWL_DIVIDER(h_clk, "h_clk", "ahbprediv_clk", CMU_BUSCLK1, 12, 2, NULL, 0, 0);
 static OWL_DIVIDER(rmii_ref_clk, "rmii_ref_clk", "ethernet_pll_clk", CMU_ETHERNETPLL, 1, 1, rmii_ref_div_table, 0, 0);
 
 /* factor clocks */
-- 
2.27.0


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  reply	other threads:[~2020-07-03 17:05 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-03 17:05 [PATCH v3 0/6] Add RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs Cristian Ciocaltea
2020-07-03 17:05 ` Cristian Ciocaltea
2020-07-03 17:05 ` Cristian Ciocaltea [this message]
2020-07-03 17:05   ` [PATCH v3 1/6] clk: actions: Fix h_clk for Actions S500 SoC Cristian Ciocaltea
2020-07-21  8:52   ` Stephen Boyd
2020-07-21  8:52     ` Stephen Boyd
2020-07-03 17:05 ` [PATCH v3 2/6] dt-bindings: clock: Add APB, DMAC, GPIO bindings " Cristian Ciocaltea
2020-07-03 17:05   ` Cristian Ciocaltea
2020-07-12 16:56   ` Manivannan Sadhasivam
2020-07-12 16:56     ` Manivannan Sadhasivam
2020-07-13 21:39   ` Rob Herring
2020-07-13 21:39     ` Rob Herring
2020-07-21  8:52   ` Stephen Boyd
2020-07-21  8:52     ` Stephen Boyd
2020-07-03 17:05 ` [PATCH v3 3/6] clk: actions: Add APB, DMAC, GPIO clock support " Cristian Ciocaltea
2020-07-03 17:05   ` Cristian Ciocaltea
2020-07-12 16:57   ` Manivannan Sadhasivam
2020-07-12 16:57     ` Manivannan Sadhasivam
2020-07-21  8:52   ` Stephen Boyd
2020-07-21  8:52     ` Stephen Boyd
2020-07-03 17:05 ` [PATCH v3 4/6] dt-bindings: reset: Add binding constants for Actions S500 RMU Cristian Ciocaltea
2020-07-03 17:05   ` Cristian Ciocaltea
2020-07-12 16:57   ` Manivannan Sadhasivam
2020-07-12 16:57     ` Manivannan Sadhasivam
2020-07-13 21:39   ` Rob Herring
2020-07-13 21:39     ` Rob Herring
2020-07-21  8:52   ` Stephen Boyd
2020-07-21  8:52     ` Stephen Boyd
2020-07-03 17:05 ` [PATCH v3 5/6] clk: actions: Add Actions S500 SoC Reset Management Unit support Cristian Ciocaltea
2020-07-03 17:05   ` Cristian Ciocaltea
2020-07-21  8:52   ` Stephen Boyd
2020-07-21  8:52     ` Stephen Boyd
2020-07-03 17:05 ` [PATCH v3 6/6] MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs Cristian Ciocaltea
2020-07-03 17:05   ` Cristian Ciocaltea
2020-07-12 16:58   ` Manivannan Sadhasivam
2020-07-12 16:58     ` Manivannan Sadhasivam
2020-07-21  8:52   ` Stephen Boyd
2020-07-21  8:52     ` Stephen Boyd

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