* [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se
@ 2022-12-28 18:52 Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Dmitry Baryshkov
` (16 more replies)
0 siblings, 17 replies; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Drop core_bi_pll_test_se from all Qualcomm clock controller's bindings
and drivers. The clock is not used by anyone.
Changes since v1:
- Fixed error in the qcom,gcc-msm8998 example.
Dmitry Baryshkov (16):
dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se
dt-bindings: clock: qcom,gcc-sdx55: drop core_bi_pll_test_se
dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se
dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se
dt-bindings: clock: qcom,mmcc-msm8998: drop core_bi_pll_test_se
dt-bindings: clock: qcom: gcc-sm8350: drop test clock
dt-bindings: clock: qcom: gcc-sm8450: drop test clock
clk: qcom: dispcc-qcm2290: get rid of test clock
clk: qcom: gcc-msm8998: get rid of test clock
clk: qcom: gcc-sc7180: get rid of test clock
clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents
clk: qcom: gcc-sdx55: get rid of test clock
clk: qcom: gcc-sm8150: get rid of test clock
clk: qcom: gcc-sm8350: get rid of test clock
clk: qcom: mmcc-msm8998: get rid of test clock
arm64: dts: qcom: msm8998: get rid of test clock
.../bindings/clock/qcom,gcc-msm8998.yaml | 6 +-
.../bindings/clock/qcom,gcc-sdx55.yaml | 9 +--
.../bindings/clock/qcom,gcc-sdx65.yaml | 8 +--
.../bindings/clock/qcom,gcc-sm8350.yaml | 2 -
.../devicetree/bindings/clock/qcom,mmcc.yaml | 2 -
arch/arm64/boot/dts/qcom/msm8998.dtsi | 4 +-
drivers/clk/qcom/dispcc-qcm2290.c | 6 --
drivers/clk/qcom/gcc-msm8998.c | 13 ----
drivers/clk/qcom/gcc-sc7180.c | 16 -----
drivers/clk/qcom/gcc-sdx55.c | 64 ++++++++-----------
drivers/clk/qcom/gcc-sm8150.c | 17 -----
drivers/clk/qcom/gcc-sm8350.c | 15 -----
drivers/clk/qcom/mmcc-msm8998.c | 25 --------
include/dt-bindings/clock/qcom,gcc-sm8350.h | 1 -
include/dt-bindings/clock/qcom,gcc-sm8450.h | 1 -
15 files changed, 33 insertions(+), 156 deletions(-)
--
2.39.0
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:41 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: " Dmitry Baryshkov
` (15 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/clock/qcom,gcc-msm8998.yaml | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
index 2d5355cf9def..3c9729050d6f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
@@ -25,7 +25,6 @@ properties:
- description: Board XO source
- description: Sleep clock source
- description: Audio reference clock (Optional clock)
- - description: PLL test clock source (Optional clock)
minItems: 2
clock-names:
@@ -33,7 +32,6 @@ properties:
- const: xo
- const: sleep_clk
- const: aud_ref_clk # Optional clock
- - const: core_bi_pll_test_se # Optional clock
minItems: 2
required:
@@ -57,11 +55,9 @@ examples:
reg = <0x00100000 0xb0000>;
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&sleep>,
- <0>,
<0>;
clock-names = "xo",
"sleep_clk",
- "aud_ref_clk",
- "core_bi_pll_test_se";
+ "aud_ref_clk";
};
...
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: drop core_bi_pll_test_se
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:42 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: " Dmitry Baryshkov
` (14 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/clock/qcom,gcc-sdx55.yaml | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
index 68d3099c96ae..428e954d7638 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
@@ -24,15 +24,11 @@ properties:
items:
- description: Board XO source
- description: Sleep clock source
- - description: PLL test clock source (Optional clock)
- minItems: 2
clock-names:
items:
- const: bi_tcxo
- const: sleep_clk
- - const: core_bi_pll_test_se # Optional clock
- minItems: 2
required:
- compatible
@@ -51,8 +47,9 @@ examples:
compatible = "qcom,gcc-sdx55";
reg = <0x00100000 0x1f0000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&sleep_clk>, <&pll_test_clk>;
- clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se";
+ <&sleep_clk>;
+ clock-names = "bi_tcxo",
+ "sleep_clk";
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:42 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: " Dmitry Baryshkov
` (13 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/clock/qcom,gcc-sdx65.yaml | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
index ba62baab916c..523e18d7f150 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
@@ -26,8 +26,6 @@ properties:
- description: Sleep clock source
- description: PCIE Pipe clock source
- description: USB3 phy wrapper pipe clock source
- - description: PLL test clock source (Optional clock)
- minItems: 5
clock-names:
items:
@@ -36,8 +34,6 @@ properties:
- const: sleep_clk
- const: pcie_pipe_clk
- const: usb3_phy_wrapper_gcc_usb30_pipe_clk
- - const: core_bi_pll_test_se # Optional clock
- minItems: 5
required:
- compatible
@@ -56,9 +52,9 @@ examples:
compatible = "qcom,gcc-sdx65";
reg = <0x100000 0x1f7400>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
- <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>, <&pll_test_clk>;
+ <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
- "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk", "core_bi_pll_test_se";
+ "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (2 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:44 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: " Dmitry Baryshkov
` (12 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
index 703d9e075247..b4fdde71ef18 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
@@ -23,7 +23,6 @@ properties:
items:
- description: Board XO source
- description: Sleep clock source
- - description: PLL test clock source (Optional clock)
- description: PCIE 0 Pipe clock source (Optional clock)
- description: PCIE 1 Pipe clock source (Optional clock)
- description: UFS card Rx symbol 0 clock source (Optional clock)
@@ -40,7 +39,6 @@ properties:
items:
- const: bi_tcxo
- const: sleep_clk
- - const: core_bi_pll_test_se # Optional clock
- const: pcie_0_pipe_clk # Optional clock
- const: pcie_1_pipe_clk # Optional clock
- const: ufs_card_rx_symbol_0_clk # Optional clock
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: drop core_bi_pll_test_se
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (3 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Dmitry Baryshkov
` (11 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
index e6d17426e903..cf04d791093f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
@@ -229,7 +229,6 @@ allOf:
- description: HDMI phy PLL clock
- description: DisplayPort phy PLL link clock
- description: DisplayPort phy PLL vco clock
- - description: Test clock
clock-names:
items:
@@ -242,7 +241,6 @@ allOf:
- const: hdmipll
- const: dplink
- const: dpvco
- - const: core_bi_pll_test_se
- if:
properties:
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (4 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: " Dmitry Baryshkov
` (10 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
include/dt-bindings/clock/qcom,gcc-sm8350.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/dt-bindings/clock/qcom,gcc-sm8350.h b/include/dt-bindings/clock/qcom,gcc-sm8350.h
index f6be3da5f781..529c1b8b0417 100644
--- a/include/dt-bindings/clock/qcom,gcc-sm8350.h
+++ b/include/dt-bindings/clock/qcom,gcc-sm8350.h
@@ -8,7 +8,6 @@
#define _DT_BINDINGS_CLK_QCOM_GCC_SM8350_H
/* GCC HW clocks */
-#define CORE_BI_PLL_TEST_SE 0
#define PCIE_0_PIPE_CLK 1
#define PCIE_1_PIPE_CLK 2
#define UFS_CARD_RX_SYMBOL_0_CLK 3
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: drop test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (5 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of " Dmitry Baryshkov
` (9 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
include/dt-bindings/clock/qcom,gcc-sm8450.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/dt-bindings/clock/qcom,gcc-sm8450.h b/include/dt-bindings/clock/qcom,gcc-sm8450.h
index cf1469312c4c..9679410843a0 100644
--- a/include/dt-bindings/clock/qcom,gcc-sm8450.h
+++ b/include/dt-bindings/clock/qcom,gcc-sm8450.h
@@ -8,7 +8,6 @@
#define _DT_BINDINGS_CLK_QCOM_GCC_SM8450_H
/* GCC HW clocks */
-#define CORE_BI_PLL_TEST_SE 0
#define PCIE_0_PIPE_CLK 1
#define PCIE_1_PHY_AUX_CLK 2
#define PCIE_1_PIPE_CLK 3
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (6 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:34 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 09/16] clk: qcom: gcc-msm8998: " Dmitry Baryshkov
` (8 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/dispcc-qcm2290.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
index 96b149365912..2ebd9a02b895 100644
--- a/drivers/clk/qcom/dispcc-qcm2290.c
+++ b/drivers/clk/qcom/dispcc-qcm2290.c
@@ -71,7 +71,6 @@ static const struct parent_map disp_cc_parent_map_0[] = {
static const struct clk_parent_data disp_cc_parent_data_0[] = {
{ .fw_name = "bi_tcxo" },
{ .fw_name = "dsi0_phy_pll_out_byteclk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map disp_cc_parent_map_1[] = {
@@ -80,7 +79,6 @@ static const struct parent_map disp_cc_parent_map_1[] = {
static const struct clk_parent_data disp_cc_parent_data_1[] = {
{ .fw_name = "bi_tcxo" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map disp_cc_parent_map_2[] = {
@@ -91,7 +89,6 @@ static const struct parent_map disp_cc_parent_map_2[] = {
static const struct clk_parent_data disp_cc_parent_data_2[] = {
{ .fw_name = "bi_tcxo_ao" },
{ .fw_name = "gcc_disp_gpll0_div_clk_src" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map disp_cc_parent_map_3[] = {
@@ -104,7 +101,6 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = {
{ .fw_name = "bi_tcxo" },
{ .hw = &disp_cc_pll0.clkr.hw },
{ .fw_name = "gcc_disp_gpll0_clk_src" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map disp_cc_parent_map_4[] = {
@@ -117,7 +113,6 @@ static const struct clk_parent_data disp_cc_parent_data_4[] = {
{ .fw_name = "bi_tcxo" },
{ .fw_name = "dsi0_phy_pll_out_dsiclk" },
{ .fw_name = "dsi1_phy_pll_out_dsiclk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map disp_cc_parent_map_5[] = {
@@ -126,7 +121,6 @@ static const struct parent_map disp_cc_parent_map_5[] = {
static const struct clk_parent_data disp_cc_parent_data_5[] = {
{ .fw_name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = {
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 09/16] clk: qcom: gcc-msm8998: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (7 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:34 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 10/16] clk: qcom: gcc-sc7180: " Dmitry Baryshkov
` (7 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-msm8998.c | 13 -------------
1 file changed, 13 deletions(-)
diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
index 33473c52eb90..908e996841c2 100644
--- a/drivers/clk/qcom/gcc-msm8998.c
+++ b/drivers/clk/qcom/gcc-msm8998.c
@@ -387,7 +387,6 @@ static struct clk_alpha_pll_postdiv gpll4_out_test = {
enum {
P_AUD_REF_CLK,
- P_CORE_BI_PLL_TEST_SE,
P_GPLL0_OUT_MAIN,
P_GPLL4_OUT_MAIN,
P_PLL0_EARLY_DIV_CLK_SRC,
@@ -399,26 +398,22 @@ static const struct parent_map gcc_parent_map_0[] = {
{ P_XO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_PLL0_EARLY_DIV_CLK_SRC, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_0[] = {
{ .fw_name = "xo" },
{ .hw = &gpll0_out_main.clkr.hw },
{ .hw = &gpll0_out_main.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_1[] = {
{ P_XO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_1[] = {
{ .fw_name = "xo" },
{ .hw = &gpll0_out_main.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_2[] = {
@@ -426,7 +421,6 @@ static const struct parent_map gcc_parent_map_2[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
{ P_PLL0_EARLY_DIV_CLK_SRC, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_2[] = {
@@ -434,47 +428,40 @@ static const struct clk_parent_data gcc_parent_data_2[] = {
{ .hw = &gpll0_out_main.clkr.hw },
{ .fw_name = "sleep_clk" },
{ .hw = &gpll0_out_main.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_3[] = {
{ P_XO, 0 },
{ P_SLEEP_CLK, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_3[] = {
{ .fw_name = "xo" },
{ .fw_name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_4[] = {
{ P_XO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL4_OUT_MAIN, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_4[] = {
{ .fw_name = "xo" },
{ .hw = &gpll0_out_main.clkr.hw },
{ .hw = &gpll4_out_main.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_5[] = {
{ P_XO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_AUD_REF_CLK, 2 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_5[] = {
{ .fw_name = "xo" },
{ .hw = &gpll0_out_main.clkr.hw },
{ .fw_name = "aud_ref_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_blsp1_qup1_i2c_apps_clk_src[] = {
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 10/16] clk: qcom: gcc-sc7180: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (8 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 09/16] clk: qcom: gcc-msm8998: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Dmitry Baryshkov
` (6 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-sc7180.c | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
index 2d3980251e78..105c4762ca84 100644
--- a/drivers/clk/qcom/gcc-sc7180.c
+++ b/drivers/clk/qcom/gcc-sc7180.c
@@ -23,7 +23,6 @@
enum {
P_BI_TCXO,
- P_CORE_BI_PLL_TEST_SE,
P_GPLL0_OUT_EVEN,
P_GPLL0_OUT_MAIN,
P_GPLL1_OUT_MAIN,
@@ -162,21 +161,18 @@ static const struct parent_map gcc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_0[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct clk_parent_data gcc_parent_data_0_ao[] = {
{ .fw_name = "bi_tcxo_ao", .name = "bi_tcxo_ao" },
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_1[] = {
@@ -184,7 +180,6 @@ static const struct parent_map gcc_parent_map_1[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL6_OUT_MAIN, 2 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_1[] = {
@@ -192,7 +187,6 @@ static const struct clk_parent_data gcc_parent_data_1[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll6.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_2[] = {
@@ -201,7 +195,6 @@ static const struct parent_map gcc_parent_map_2[] = {
{ P_GPLL1_OUT_MAIN, 4 },
{ P_GPLL4_OUT_MAIN, 5 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_2[] = {
@@ -210,19 +203,16 @@ static const struct clk_parent_data gcc_parent_data_2[] = {
{ .hw = &gpll1.clkr.hw },
{ .hw = &gpll4.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_3[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_3[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_4[] = {
@@ -230,7 +220,6 @@ static const struct parent_map gcc_parent_map_4[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_4[] = {
@@ -238,7 +227,6 @@ static const struct clk_parent_data gcc_parent_data_4[] = {
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_5[] = {
@@ -246,7 +234,6 @@ static const struct parent_map gcc_parent_map_5[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL7_OUT_MAIN, 3 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_5[] = {
@@ -254,21 +241,18 @@ static const struct clk_parent_data gcc_parent_data_5[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll7.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_6[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_6[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = {
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (9 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 10/16] clk: qcom: gcc-sc7180: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock Dmitry Baryshkov
` (5 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data/names/hws easy and errorproof.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-sdx55.c | 52 ++++++++++++++++++------------------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c
index 4fca19006a77..758b295e1bfa 100644
--- a/drivers/clk/qcom/gcc-sdx55.c
+++ b/drivers/clk/qcom/gcc-sdx55.c
@@ -232,7 +232,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup1_i2c_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -258,7 +258,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_spi_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup1_spi_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -272,7 +272,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup2_i2c_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -286,7 +286,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_spi_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup2_spi_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -300,7 +300,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup3_i2c_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -314,7 +314,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_spi_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup3_spi_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -328,7 +328,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_i2c_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup4_i2c_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -342,7 +342,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_spi_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_qup4_spi_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -386,7 +386,7 @@ static struct clk_rcg2 gcc_blsp1_uart1_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_uart1_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -400,7 +400,7 @@ static struct clk_rcg2 gcc_blsp1_uart2_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_uart2_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -414,7 +414,7 @@ static struct clk_rcg2 gcc_blsp1_uart3_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_uart3_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -428,7 +428,7 @@ static struct clk_rcg2 gcc_blsp1_uart4_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_blsp1_uart4_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -450,7 +450,7 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_cpuss_ahb_clk_src",
.parent_data = gcc_parents_0_ao,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0_ao),
.ops = &clk_rcg2_ops,
},
};
@@ -469,7 +469,7 @@ static struct clk_rcg2 gcc_cpuss_rbcpr_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_cpuss_rbcpr_clk_src",
.parent_data = gcc_parents_0_ao,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0_ao),
.ops = &clk_rcg2_ops,
},
};
@@ -493,7 +493,7 @@ static struct clk_rcg2 gcc_emac_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_emac_clk_src",
.parent_data = gcc_parents_5,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(gcc_parents_5),
.ops = &clk_rcg2_ops,
},
};
@@ -514,7 +514,7 @@ static struct clk_rcg2 gcc_emac_ptp_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_emac_ptp_clk_src",
.parent_data = gcc_parents_2,
- .num_parents = 6,
+ .num_parents = ARRAY_SIZE(gcc_parents_2),
.ops = &clk_rcg2_ops,
},
};
@@ -537,7 +537,7 @@ static struct clk_rcg2 gcc_gp1_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_gp1_clk_src",
.parent_data = gcc_parents_3,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(gcc_parents_3),
.ops = &clk_rcg2_ops,
},
};
@@ -551,7 +551,7 @@ static struct clk_rcg2 gcc_gp2_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_gp2_clk_src",
.parent_data = gcc_parents_3,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(gcc_parents_3),
.ops = &clk_rcg2_ops,
},
};
@@ -565,7 +565,7 @@ static struct clk_rcg2 gcc_gp3_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_gp3_clk_src",
.parent_data = gcc_parents_3,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(gcc_parents_3),
.ops = &clk_rcg2_ops,
},
};
@@ -579,7 +579,7 @@ static struct clk_rcg2 gcc_pcie_aux_phy_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_pcie_aux_phy_clk_src",
.parent_data = gcc_parents_4,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(gcc_parents_4),
.ops = &clk_rcg2_ops,
},
};
@@ -598,7 +598,7 @@ static struct clk_rcg2 gcc_pcie_rchng_phy_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_pcie_rchng_phy_clk_src",
.parent_data = gcc_parents_3,
- .num_parents = 5,
+ .num_parents = ARRAY_SIZE(gcc_parents_3),
.ops = &clk_rcg2_ops,
},
};
@@ -619,7 +619,7 @@ static struct clk_rcg2 gcc_pdm2_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_pdm2_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -633,7 +633,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_sdcc1_apps_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -652,7 +652,7 @@ static struct clk_rcg2 gcc_usb30_master_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_usb30_master_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -671,7 +671,7 @@ static struct clk_rcg2 gcc_usb30_mock_utmi_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_usb30_mock_utmi_clk_src",
.parent_data = gcc_parents_0,
- .num_parents = 4,
+ .num_parents = ARRAY_SIZE(gcc_parents_0),
.ops = &clk_rcg2_ops,
},
};
@@ -691,7 +691,7 @@ static struct clk_rcg2 gcc_usb3_phy_aux_clk_src = {
.clkr.hw.init = &(struct clk_init_data){
.name = "gcc_usb3_phy_aux_clk_src",
.parent_data = gcc_parents_4,
- .num_parents = 3,
+ .num_parents = ARRAY_SIZE(gcc_parents_4),
.ops = &clk_rcg2_ops,
},
};
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (10 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 13/16] clk: qcom: gcc-sm8150: " Dmitry Baryshkov
` (4 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-sdx55.c | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c
index 758b295e1bfa..d5e17122698c 100644
--- a/drivers/clk/qcom/gcc-sdx55.c
+++ b/drivers/clk/qcom/gcc-sdx55.c
@@ -22,7 +22,6 @@
enum {
P_BI_TCXO,
- P_CORE_BI_PLL_TEST_SE,
P_GPLL0_OUT_EVEN,
P_GPLL0_OUT_MAIN,
P_GPLL4_OUT_EVEN,
@@ -137,21 +136,18 @@ static const struct parent_map gcc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_0[] = {
{ .fw_name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct clk_parent_data gcc_parents_0_ao[] = {
{ .fw_name = "bi_tcxo_ao" },
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_2[] = {
@@ -160,7 +156,6 @@ static const struct parent_map gcc_parent_map_2[] = {
{ P_GPLL4_OUT_EVEN, 2 },
{ P_GPLL5_OUT_MAIN, 5 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_2[] = {
@@ -169,7 +164,6 @@ static const struct clk_parent_data gcc_parents_2[] = {
{ .hw = &gpll4_out_even.clkr.hw },
{ .hw = &gpll5.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_3[] = {
@@ -177,7 +171,6 @@ static const struct parent_map gcc_parent_map_3[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_3[] = {
@@ -185,19 +178,16 @@ static const struct clk_parent_data gcc_parents_3[] = {
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_4[] = {
{ P_BI_TCXO, 0 },
{ P_SLEEP_CLK, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_4[] = {
{ .fw_name = "bi_tcxo" },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_5[] = {
@@ -205,7 +195,6 @@ static const struct parent_map gcc_parent_map_5[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL4_OUT_EVEN, 2 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_5[] = {
@@ -213,7 +202,6 @@ static const struct clk_parent_data gcc_parents_5[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll4_out_even.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_gcc_blsp1_qup1_i2c_apps_clk_src[] = {
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 13/16] clk: qcom: gcc-sm8150: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (11 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 14/16] clk: qcom: gcc-sm8350: " Dmitry Baryshkov
` (3 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-sm8150.c | 17 -----------------
1 file changed, 17 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
index 09cf827addab..70b067f3618c 100644
--- a/drivers/clk/qcom/gcc-sm8150.c
+++ b/drivers/clk/qcom/gcc-sm8150.c
@@ -26,7 +26,6 @@
enum {
P_BI_TCXO,
P_AUD_REF_CLK,
- P_CORE_BI_PLL_TEST_SE,
P_GPLL0_OUT_EVEN,
P_GPLL0_OUT_MAIN,
P_GPLL7_OUT_MAIN,
@@ -117,14 +116,12 @@ static const struct parent_map gcc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_0[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_1[] = {
@@ -132,7 +129,6 @@ static const struct parent_map gcc_parent_map_1[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_1[] = {
@@ -140,41 +136,34 @@ static const struct clk_parent_data gcc_parents_1[] = {
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_2[] = {
{ P_BI_TCXO, 0 },
{ P_SLEEP_CLK, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_2[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .fw_name = "sleep_clk", .name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_3[] = {
{ P_BI_TCXO, 0 },
{ P_GPLL0_OUT_MAIN, 1 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_3[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &gpll0.clkr.hw },
- { .fw_name = "core_bi_pll_test_se"},
};
static const struct parent_map gcc_parent_map_4[] = {
{ P_BI_TCXO, 0 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_4[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_5[] = {
@@ -182,7 +171,6 @@ static const struct parent_map gcc_parent_map_5[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL7_OUT_MAIN, 3 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_5[] = {
@@ -190,7 +178,6 @@ static const struct clk_parent_data gcc_parents_5[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll7.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_6[] = {
@@ -198,7 +185,6 @@ static const struct parent_map gcc_parent_map_6[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_GPLL9_OUT_MAIN, 2 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_6[] = {
@@ -206,7 +192,6 @@ static const struct clk_parent_data gcc_parents_6[] = {
{ .hw = &gpll0.clkr.hw },
{ .hw = &gpll9.clkr.hw },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_7[] = {
@@ -214,7 +199,6 @@ static const struct parent_map gcc_parent_map_7[] = {
{ P_GPLL0_OUT_MAIN, 1 },
{ P_AUD_REF_CLK, 2 },
{ P_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parents_7[] = {
@@ -222,7 +206,6 @@ static const struct clk_parent_data gcc_parents_7[] = {
{ .hw = &gpll0.clkr.hw },
{ .fw_name = "aud_ref_clk", .name = "aud_ref_clk" },
{ .hw = &gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = {
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 14/16] clk: qcom: gcc-sm8350: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (12 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 13/16] clk: qcom: gcc-sm8150: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 15/16] clk: qcom: mmcc-msm8998: " Dmitry Baryshkov
` (2 subsequent siblings)
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gcc-sm8350.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c
index c3731f96c8e6..af4a1ea28421 100644
--- a/drivers/clk/qcom/gcc-sm8350.c
+++ b/drivers/clk/qcom/gcc-sm8350.c
@@ -22,7 +22,6 @@
enum {
P_BI_TCXO,
- P_CORE_BI_PLL_TEST_SE,
P_GCC_GPLL0_OUT_EVEN,
P_GCC_GPLL0_OUT_MAIN,
P_GCC_GPLL4_OUT_MAIN,
@@ -119,14 +118,12 @@ static const struct parent_map gcc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_GCC_GPLL0_OUT_MAIN, 1 },
{ P_GCC_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_0[] = {
{ .fw_name = "bi_tcxo" },
{ .hw = &gcc_gpll0.clkr.hw },
{ .hw = &gcc_gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_1[] = {
@@ -134,7 +131,6 @@ static const struct parent_map gcc_parent_map_1[] = {
{ P_GCC_GPLL0_OUT_MAIN, 1 },
{ P_SLEEP_CLK, 5 },
{ P_GCC_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_1[] = {
@@ -142,29 +138,24 @@ static const struct clk_parent_data gcc_parent_data_1[] = {
{ .hw = &gcc_gpll0.clkr.hw },
{ .fw_name = "sleep_clk" },
{ .hw = &gcc_gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_2[] = {
{ P_BI_TCXO, 0 },
{ P_SLEEP_CLK, 5 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_2[] = {
{ .fw_name = "bi_tcxo" },
{ .fw_name = "sleep_clk" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_3[] = {
{ P_BI_TCXO, 0 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_3[] = {
{ .fw_name = "bi_tcxo" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_4[] = {
@@ -193,7 +184,6 @@ static const struct parent_map gcc_parent_map_6[] = {
{ P_GCC_GPLL9_OUT_MAIN, 2 },
{ P_GCC_GPLL4_OUT_MAIN, 5 },
{ P_GCC_GPLL0_OUT_EVEN, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 },
};
static const struct clk_parent_data gcc_parent_data_6[] = {
@@ -202,7 +192,6 @@ static const struct clk_parent_data gcc_parent_data_6[] = {
{ .hw = &gcc_gpll9.clkr.hw },
{ .hw = &gcc_gpll4.clkr.hw },
{ .hw = &gcc_gpll0_out_even.clkr.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map gcc_parent_map_7[] = {
@@ -267,25 +256,21 @@ static const struct clk_parent_data gcc_parent_data_12[] = {
static const struct parent_map gcc_parent_map_13[] = {
{ P_USB3_PHY_WRAPPER_GCC_USB30_PIPE_CLK, 0 },
- { P_CORE_BI_PLL_TEST_SE, 1 },
{ P_BI_TCXO, 2 },
};
static const struct clk_parent_data gcc_parent_data_13[] = {
{ .fw_name = "usb3_phy_wrapper_gcc_usb30_pipe_clk" },
- { .fw_name = "core_bi_pll_test_se" },
{ .fw_name = "bi_tcxo" },
};
static const struct parent_map gcc_parent_map_14[] = {
{ P_USB3_UNI_PHY_SEC_GCC_USB30_PIPE_CLK, 0 },
- { P_CORE_BI_PLL_TEST_SE, 1 },
{ P_BI_TCXO, 2 },
};
static const struct clk_parent_data gcc_parent_data_14[] = {
{ .fw_name = "usb3_uni_phy_sec_gcc_usb30_pipe_clk" },
- { .fw_name = "core_bi_pll_test_se" },
{ .fw_name = "bi_tcxo" },
};
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 15/16] clk: qcom: mmcc-msm8998: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (13 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 14/16] clk: qcom: gcc-sm8350: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-13 0:36 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 16/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
2023-01-11 5:09 ` (subset) [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Bjorn Andersson
16 siblings, 1 reply; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/mmcc-msm8998.c | 25 -------------------------
1 file changed, 25 deletions(-)
diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c
index c421b1291651..4490594bde69 100644
--- a/drivers/clk/qcom/mmcc-msm8998.c
+++ b/drivers/clk/qcom/mmcc-msm8998.c
@@ -44,7 +44,6 @@ enum {
P_HDMIPLL,
P_DPVCO,
P_DPLINK,
- P_CORE_BI_PLL_TEST_SE,
};
static struct clk_fixed_factor gpll0_div = {
@@ -303,69 +302,59 @@ static struct clk_alpha_pll_postdiv mmpll10_out_even = {
static const struct parent_map mmss_xo_hdmi_map[] = {
{ P_XO, 0 },
{ P_HDMIPLL, 1 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_hdmi[] = {
{ .fw_name = "xo" },
{ .fw_name = "hdmipll" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_dsi0pll_dsi1pll_map[] = {
{ P_XO, 0 },
{ P_DSI0PLL, 1 },
{ P_DSI1PLL, 2 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_dsi0pll_dsi1pll[] = {
{ .fw_name = "xo" },
{ .fw_name = "dsi0dsi" },
{ .fw_name = "dsi1dsi" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_dsibyte_map[] = {
{ P_XO, 0 },
{ P_DSI0PLL_BYTE, 1 },
{ P_DSI1PLL_BYTE, 2 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_dsibyte[] = {
{ .fw_name = "xo" },
{ .fw_name = "dsi0byte" },
{ .fw_name = "dsi1byte" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_dp_map[] = {
{ P_XO, 0 },
{ P_DPLINK, 1 },
{ P_DPVCO, 2 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_dp[] = {
{ .fw_name = "xo" },
{ .fw_name = "dplink" },
{ .fw_name = "dpvco" },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_gpll0_gpll0_div_map[] = {
{ P_XO, 0 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_gpll0_gpll0_div[] = {
{ .fw_name = "xo" },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] = {
@@ -373,7 +362,6 @@ static const struct parent_map mmss_xo_mmpll0_gpll0_gpll0_div_map[] = {
{ P_MMPLL0_OUT_EVEN, 1 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll0_gpll0_gpll0_div[] = {
@@ -381,7 +369,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_gpll0_gpll0_div[] = {
{ .hw = &mmpll0_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[] = {
@@ -390,7 +377,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div_map[] = {
{ P_MMPLL1_OUT_EVEN, 2 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div[] = {
@@ -399,7 +385,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll1_gpll0_gpll0_div[] = {
{ .hw = &mmpll1_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[] = {
@@ -408,7 +393,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div_map[] = {
{ P_MMPLL5_OUT_EVEN, 2 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div[] = {
@@ -417,7 +401,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll5_gpll0_gpll0_div[] = {
{ .hw = &mmpll5_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map[] = {
@@ -427,7 +410,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div_map[
{ P_MMPLL6_OUT_EVEN, 4 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div[] = {
@@ -437,7 +419,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll3_mmpll6_gpll0_gpll0_div
{ .hw = &mmpll6_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = {
@@ -447,7 +428,6 @@ static const struct parent_map mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map
{ P_MMPLL10_OUT_EVEN, 3 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div[] = {
@@ -457,7 +437,6 @@ static const struct clk_parent_data mmss_xo_mmpll4_mmpll7_mmpll10_gpll0_gpll0_di
{ .hw = &mmpll10_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map[] = {
@@ -467,7 +446,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div_map
{ P_MMPLL10_OUT_EVEN, 3 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_div[] = {
@@ -477,7 +455,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll7_mmpll10_gpll0_gpll0_di
{ .hw = &mmpll10_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div_map[] = {
@@ -488,7 +465,6 @@ static const struct parent_map mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_
{ P_MMPLL10_OUT_EVEN, 4 },
{ P_GPLL0, 5 },
{ P_GPLL0_DIV, 6 },
- { P_CORE_BI_PLL_TEST_SE, 7 }
};
static const struct clk_parent_data mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_gpll0_div[] = {
@@ -499,7 +475,6 @@ static const struct clk_parent_data mmss_xo_mmpll0_mmpll4_mmpll7_mmpll10_gpll0_g
{ .hw = &mmpll10_out_even.clkr.hw },
{ .fw_name = "gpll0" },
{ .hw = &gpll0_div.hw },
- { .fw_name = "core_bi_pll_test_se" },
};
static struct clk_rcg2 byte0_clk_src = {
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v2 16/16] arm64: dts: qcom: msm8998: get rid of test clock
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (14 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 15/16] clk: qcom: mmcc-msm8998: " Dmitry Baryshkov
@ 2022-12-28 18:52 ` Dmitry Baryshkov
2023-01-11 5:09 ` (subset) [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Bjorn Andersson
16 siblings, 0 replies; 34+ messages in thread
From: Dmitry Baryshkov @ 2022-12-28 18:52 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Rob Herring, Krzysztof Kozlowski, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
The test clock apparently it's not used by anyone upstream. Remove it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 18cc149b6be4..6d69dce14dba 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2398,8 +2398,7 @@ mmcc: clock-controller@c8c0000 {
"dsi1byte",
"hdmipll",
"dplink",
- "dpvco",
- "core_bi_pll_test_se";
+ "dpvco";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&gcc GCC_MMSS_GPLL0_CLK>,
<0>,
@@ -2408,7 +2407,6 @@ mmcc: clock-controller@c8c0000 {
<0>,
<0>,
<0>,
- <0>,
<0>;
};
--
2.39.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* Re: [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se
2022-12-28 18:52 ` [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Dmitry Baryshkov
@ 2023-01-08 18:41 ` Rob Herring
2023-01-08 22:17 ` Dmitry Baryshkov
0 siblings, 1 reply; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:41 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Stephen Boyd, Bjorn Andersson, Taniya Das, devicetree,
Konrad Dybcio, Rob Herring, linux-clk, Andy Gross,
Michael Turquette, Krzysztof Kozlowski, linux-arm-msm
On Wed, 28 Dec 2022 20:52:22 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../devicetree/bindings/clock/qcom,gcc-msm8998.yaml | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: drop core_bi_pll_test_se
2022-12-28 18:52 ` [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: " Dmitry Baryshkov
@ 2023-01-08 18:42 ` Rob Herring
0 siblings, 0 replies; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:42 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: linux-arm-msm, Konrad Dybcio, Taniya Das, Krzysztof Kozlowski,
linux-clk, Bjorn Andersson, Rob Herring, devicetree,
Michael Turquette, Andy Gross, Stephen Boyd
On Wed, 28 Dec 2022 20:52:23 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../devicetree/bindings/clock/qcom,gcc-sdx55.yaml | 9 +++------
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se
2022-12-28 18:52 ` [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: " Dmitry Baryshkov
@ 2023-01-08 18:42 ` Rob Herring
0 siblings, 0 replies; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:42 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Taniya Das, Michael Turquette, Bjorn Andersson, Konrad Dybcio,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-arm-msm,
Andy Gross, linux-clk, Stephen Boyd
On Wed, 28 Dec 2022 20:52:24 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> .../devicetree/bindings/clock/qcom,gcc-sdx65.yaml | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se
2022-12-28 18:52 ` [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: " Dmitry Baryshkov
@ 2023-01-08 18:44 ` Rob Herring
0 siblings, 0 replies; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:44 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Konrad Dybcio, Michael Turquette, linux-arm-msm, devicetree,
Krzysztof Kozlowski, Bjorn Andersson, Taniya Das, linux-clk,
Rob Herring, Andy Gross, Stephen Boyd
On Wed, 28 Dec 2022 20:52:25 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 2 --
> 1 file changed, 2 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: drop core_bi_pll_test_se
2022-12-28 18:52 ` [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: " Dmitry Baryshkov
@ 2023-01-08 18:45 ` Rob Herring
0 siblings, 0 replies; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:45 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, linux-clk, Konrad Dybcio, Rob Herring,
linux-arm-msm, Stephen Boyd, Andy Gross, devicetree,
Krzysztof Kozlowski, Taniya Das, Michael Turquette
On Wed, 28 Dec 2022 20:52:26 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> Documentation/devicetree/bindings/clock/qcom,mmcc.yaml | 2 --
> 1 file changed, 2 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock
2022-12-28 18:52 ` [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Dmitry Baryshkov
@ 2023-01-08 18:45 ` Rob Herring
0 siblings, 0 replies; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:45 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: devicetree, Michael Turquette, Andy Gross, linux-clk,
Konrad Dybcio, Taniya Das, Stephen Boyd, Bjorn Andersson,
Krzysztof Kozlowski, linux-arm-msm, Rob Herring
On Wed, 28 Dec 2022 20:52:27 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> include/dt-bindings/clock/qcom,gcc-sm8350.h | 1 -
> 1 file changed, 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: drop test clock
2022-12-28 18:52 ` [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: " Dmitry Baryshkov
@ 2023-01-08 18:45 ` Rob Herring
0 siblings, 0 replies; 34+ messages in thread
From: Rob Herring @ 2023-01-08 18:45 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Stephen Boyd, Krzysztof Kozlowski, Taniya Das, devicetree,
Michael Turquette, Bjorn Andersson, linux-arm-msm, Konrad Dybcio,
Rob Herring, linux-clk, Andy Gross
On Wed, 28 Dec 2022 20:52:28 +0200, Dmitry Baryshkov wrote:
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
> include/dt-bindings/clock/qcom,gcc-sm8450.h | 1 -
> 1 file changed, 1 deletion(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se
2023-01-08 18:41 ` Rob Herring
@ 2023-01-08 22:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 34+ messages in thread
From: Dmitry Baryshkov @ 2023-01-08 22:17 UTC (permalink / raw)
To: Rob Herring
Cc: Stephen Boyd, Bjorn Andersson, Taniya Das, devicetree,
Konrad Dybcio, Rob Herring, linux-clk, Andy Gross,
Michael Turquette, Krzysztof Kozlowski, linux-arm-msm
On 08/01/2023 20:41, Rob Herring wrote:
>
> On Wed, 28 Dec 2022 20:52:22 +0200, Dmitry Baryshkov wrote:
>> The test clock apparently it's not used by anyone upstream. Remove it.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> ---
>> .../devicetree/bindings/clock/qcom,gcc-msm8998.yaml | 6 +-----
>> 1 file changed, 1 insertion(+), 5 deletions(-)
>>
>
> Reviewed-by: Rob Herring <robh@kernel.org>
Just at the point when we decided to keep the clock in bindings and just
drop it from the driver :-(
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: (subset) [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
` (15 preceding siblings ...)
2022-12-28 18:52 ` [PATCH v2 16/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
@ 2023-01-11 5:09 ` Bjorn Andersson
16 siblings, 0 replies; 34+ messages in thread
From: Bjorn Andersson @ 2023-01-11 5:09 UTC (permalink / raw)
To: quic_tdas, dmitry.baryshkov, konrad.dybcio, agross, mturquette,
krzysztof.kozlowski+dt, sboyd, robh+dt
Cc: linux-arm-msm, devicetree, linux-clk
On Wed, 28 Dec 2022 20:52:21 +0200, Dmitry Baryshkov wrote:
> Drop core_bi_pll_test_se from all Qualcomm clock controller's bindings
> and drivers. The clock is not used by anyone.
>
> Changes since v1:
> - Fixed error in the qcom,gcc-msm8998 example.
>
> Dmitry Baryshkov (16):
> dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se
> dt-bindings: clock: qcom,gcc-sdx55: drop core_bi_pll_test_se
> dt-bindings: clock: qcom,gcc-sdx65: drop core_bi_pll_test_se
> dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se
> dt-bindings: clock: qcom,mmcc-msm8998: drop core_bi_pll_test_se
> dt-bindings: clock: qcom: gcc-sm8350: drop test clock
> dt-bindings: clock: qcom: gcc-sm8450: drop test clock
> clk: qcom: dispcc-qcm2290: get rid of test clock
> clk: qcom: gcc-msm8998: get rid of test clock
> clk: qcom: gcc-sc7180: get rid of test clock
> clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents
> clk: qcom: gcc-sdx55: get rid of test clock
> clk: qcom: gcc-sm8150: get rid of test clock
> clk: qcom: gcc-sm8350: get rid of test clock
> clk: qcom: mmcc-msm8998: get rid of test clock
> arm64: dts: qcom: msm8998: get rid of test clock
>
> [...]
Applied, thanks!
[16/16] arm64: dts: qcom: msm8998: get rid of test clock
commit: ef6868a2d69d18273ebda3b3bc304242532aa76c
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of " Dmitry Baryshkov
@ 2023-01-13 0:34 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:29)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 09/16] clk: qcom: gcc-msm8998: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 09/16] clk: qcom: gcc-msm8998: " Dmitry Baryshkov
@ 2023-01-13 0:34 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:34 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:30)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 10/16] clk: qcom: gcc-sc7180: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 10/16] clk: qcom: gcc-sc7180: " Dmitry Baryshkov
@ 2023-01-13 0:35 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:35 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:31)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents
2022-12-28 18:52 ` [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Dmitry Baryshkov
@ 2023-01-13 0:35 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:35 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:32)
> Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
> adding/removing entries to/from parent_data/names/hws easy and errorproof.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock Dmitry Baryshkov
@ 2023-01-13 0:35 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:35 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:33)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 13/16] clk: qcom: gcc-sm8150: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 13/16] clk: qcom: gcc-sm8150: " Dmitry Baryshkov
@ 2023-01-13 0:35 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:35 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:34)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 14/16] clk: qcom: gcc-sm8350: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 14/16] clk: qcom: gcc-sm8350: " Dmitry Baryshkov
@ 2023-01-13 0:35 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:35 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:35)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v2 15/16] clk: qcom: mmcc-msm8998: get rid of test clock
2022-12-28 18:52 ` [PATCH v2 15/16] clk: qcom: mmcc-msm8998: " Dmitry Baryshkov
@ 2023-01-13 0:36 ` Stephen Boyd
0 siblings, 0 replies; 34+ messages in thread
From: Stephen Boyd @ 2023-01-13 0:36 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Taniya Das
Cc: linux-arm-msm, linux-clk, devicetree
Quoting Dmitry Baryshkov (2022-12-28 10:52:36)
> The test clock apparently it's not used by anyone upstream. Remove it.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 34+ messages in thread
end of thread, other threads:[~2023-01-13 0:36 UTC | newest]
Thread overview: 34+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-28 18:52 [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 01/16] dt-bindings: clock: qcom,gcc-msm8998: drop core_bi_pll_test_se Dmitry Baryshkov
2023-01-08 18:41 ` Rob Herring
2023-01-08 22:17 ` Dmitry Baryshkov
2022-12-28 18:52 ` [PATCH v2 02/16] dt-bindings: clock: qcom,gcc-sdx55: " Dmitry Baryshkov
2023-01-08 18:42 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 03/16] dt-bindings: clock: qcom,gcc-sdx65: " Dmitry Baryshkov
2023-01-08 18:42 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 04/16] dt-bindings: clock: qcom,gcc-sm8350: " Dmitry Baryshkov
2023-01-08 18:44 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 05/16] dt-bindings: clock: qcom,mmcc-msm8998: " Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 06/16] dt-bindings: clock: qcom: gcc-sm8350: drop test clock Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 07/16] dt-bindings: clock: qcom: gcc-sm8450: " Dmitry Baryshkov
2023-01-08 18:45 ` Rob Herring
2022-12-28 18:52 ` [PATCH v2 08/16] clk: qcom: dispcc-qcm2290: get rid of " Dmitry Baryshkov
2023-01-13 0:34 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 09/16] clk: qcom: gcc-msm8998: " Dmitry Baryshkov
2023-01-13 0:34 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 10/16] clk: qcom: gcc-sc7180: " Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 11/16] clk: qcom: gcc-sdx55: use ARRAY_SIZE instead of specifying num_parents Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 12/16] clk: qcom: gcc-sdx55: get rid of test clock Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 13/16] clk: qcom: gcc-sm8150: " Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 14/16] clk: qcom: gcc-sm8350: " Dmitry Baryshkov
2023-01-13 0:35 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 15/16] clk: qcom: mmcc-msm8998: " Dmitry Baryshkov
2023-01-13 0:36 ` Stephen Boyd
2022-12-28 18:52 ` [PATCH v2 16/16] arm64: dts: qcom: msm8998: " Dmitry Baryshkov
2023-01-11 5:09 ` (subset) [PATCH v2 00/16] clk: qcom: get rid of core_bi_pll_test_se Bjorn Andersson
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