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From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"adouglas@cadence.com" <adouglas@cadence.com>,
	"niklas.cassel@axis.com" <niklas.cassel@axis.com>,
	"jesper.nilsson@axis.com" <jesper.nilsson@axis.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC 06/10] misc: pci_endpoint_test: Add MSI-X support
Date: Tue, 17 Apr 2018 18:38:58 +0100	[thread overview]
Message-ID: <c6d1d492-38a0-6a03-7e61-b8b50226734b@synopsys.com> (raw)
In-Reply-To: <b25dcfb1-e770-e302-d9aa-7c35f6c58fa5@ti.com>

Hi Kishon,

On 17/04/2018 11:33, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Tuesday 10 April 2018 10:44 PM, Gustavo Pimentel wrote:
>> Adds the MSI-X support and updates driver documentation accordingly.
>>
>> Changes the driver parameter in order to allow the interruption type
>> selection.
>>
>> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
>> ---
>>  Documentation/misc-devices/pci-endpoint-test.txt |   3 +
>>  drivers/misc/pci_endpoint_test.c                 | 102 +++++++++++++++++------
>>  2 files changed, 79 insertions(+), 26 deletions(-)
>>
>> diff --git a/Documentation/misc-devices/pci-endpoint-test.txt b/Documentation/misc-devices/pci-endpoint-test.txt
>> index 4ebc359..fdfa0f6 100644
>> --- a/Documentation/misc-devices/pci-endpoint-test.txt
>> +++ b/Documentation/misc-devices/pci-endpoint-test.txt
>> @@ -10,6 +10,7 @@ The PCI driver for the test device performs the following tests
>>  	*) verifying addresses programmed in BAR
>>  	*) raise legacy IRQ
>>  	*) raise MSI IRQ
>> +	*) raise MSI-X IRQ
>>  	*) read data
>>  	*) write data
>>  	*) copy data
>> @@ -25,6 +26,8 @@ ioctl
>>   PCITEST_LEGACY_IRQ: Tests legacy IRQ
>>   PCITEST_MSI: Tests message signalled interrupts. The MSI number
>>  	      to be tested should be passed as argument.
>> + PCITEST_MSIX: Tests message signalled interrupts. The MSI-X number
>> +	      to be tested should be passed as argument.
>>   PCITEST_WRITE: Perform write tests. The size of the buffer should be passed
>>  		as argument.
>>   PCITEST_READ: Perform read tests. The size of the buffer should be passed
>> diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
>> index 37db0fc..a7d9354 100644
>> --- a/drivers/misc/pci_endpoint_test.c
>> +++ b/drivers/misc/pci_endpoint_test.c
>> @@ -42,11 +42,16 @@
>>  #define PCI_ENDPOINT_TEST_COMMAND	0x4
>>  #define COMMAND_RAISE_LEGACY_IRQ	BIT(0)
>>  #define COMMAND_RAISE_MSI_IRQ		BIT(1)
>> -#define MSI_NUMBER_SHIFT		2
>> -/* 6 bits for MSI number */
>> -#define COMMAND_READ                    BIT(8)
>> -#define COMMAND_WRITE                   BIT(9)
>> -#define COMMAND_COPY                    BIT(10)
>> +#define COMMAND_RAISE_MSIX_IRQ		BIT(2)
>> +#define IRQ_TYPE_SHIFT			3
>> +#define IRQ_TYPE_LEGACY			0
>> +#define IRQ_TYPE_MSI			1
>> +#define IRQ_TYPE_MSIX			2
>> +#define MSI_NUMBER_SHIFT		5
> 
> Now that you are anyways fixing this, add a new register entry for MSI numbers.
> Let's not keep COMMAND and MSI's together.

What you suggest?

>> +/* 12 bits for MSI number */
>> +#define COMMAND_READ                    BIT(17)
>> +#define COMMAND_WRITE                   BIT(18)
>> +#define COMMAND_COPY                    BIT(19)
> 
> This change should be done along with the pci-epf-test in a single patch.

To be clear, you're saying is this patch should be just be squashed into the
patch number 8 [1], because there is a lot of dependencies namely the defines,
that is used on the alter functions.

[1] -> https://patchwork.ozlabs.org/patch/896841/

>>  
>>  #define PCI_ENDPOINT_TEST_STATUS	0x8
>>  #define STATUS_READ_SUCCESS             BIT(0)
>> @@ -73,9 +78,9 @@ static DEFINE_IDA(pci_endpoint_test_ida);
>>  #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
>>  					    miscdev)
>>  
>> -static bool no_msi;
>> -module_param(no_msi, bool, 0444);
>> -MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
> 
> Let's not remove this just to make sure existing users doesn't get affected.

Hum, by making an internal conversion? Like this
no_msi = false <=> irq_type = 1
no_msi = true <=> irq_type = 0

>> +static int irq_type = IRQ_TYPE_MSIX;
>> +module_param(irq_type, int, 0444);
>> +MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
>>  
>>  enum pci_barno {
>>  	BAR_0,
>> @@ -103,7 +108,7 @@ struct pci_endpoint_test {
>>  struct pci_endpoint_test_data {
>>  	enum pci_barno test_reg_bar;
>>  	size_t alignment;
>> -	bool no_msi;
>> +	int irq_type;
>>  };
>>  
>>  static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
>> @@ -177,10 +182,10 @@ static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
>>  
>>  static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
>>  {
>> -	u32 val;
>> +	u32 val = COMMAND_RAISE_LEGACY_IRQ;
>>  
>> -	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
>> -				 COMMAND_RAISE_LEGACY_IRQ);
>> +	val |= (IRQ_TYPE_LEGACY << IRQ_TYPE_SHIFT);
>> +	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, val);
>>  	val = wait_for_completion_timeout(&test->irq_raised,
>>  					  msecs_to_jiffies(1000));
>>  	if (!val)
>> @@ -192,12 +197,12 @@ static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
>>  static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
>>  				      u8 msi_num)
>>  {
>> -	u32 val;
>> +	u32 val = COMMAND_RAISE_MSI_IRQ;
>>  	struct pci_dev *pdev = test->pdev;
>>  
>> -	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
>> -				 msi_num << MSI_NUMBER_SHIFT |
>> -				 COMMAND_RAISE_MSI_IRQ);
>> +	val |= (msi_num << MSI_NUMBER_SHIFT);
>> +	val |= (IRQ_TYPE_MSI << IRQ_TYPE_SHIFT);
>> +	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, val);
>>  	val = wait_for_completion_timeout(&test->irq_raised,
>>  					  msecs_to_jiffies(1000));
>>  	if (!val)
>> @@ -209,6 +214,26 @@ static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
>>  	return false;
>>  }
>>  
>> +static bool pci_endpoint_test_msix_irq(struct pci_endpoint_test *test,
>> +				       u16 msix_num)
>> +{
>> +	u32 val = COMMAND_RAISE_MSIX_IRQ;
>> +	struct pci_dev *pdev = test->pdev;
>> +
>> +	val |= (msix_num << MSI_NUMBER_SHIFT);
>> +	val |= (IRQ_TYPE_MSIX << IRQ_TYPE_SHIFT);
>> +	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, val);
>> +	val = wait_for_completion_timeout(&test->irq_raised,
>> +					  msecs_to_jiffies(1000));
>> +	if (!val)
>> +		return false;
>> +
>> +	if (test->last_irq - pdev->irq == msix_num - 1)
>> +		return true;
>> +
>> +	return false;
> 
> I think you can have a single function for msix_irq and msi_irq.

Ok.

> 
> Thanks
> Kishon
> 

WARNING: multiple messages have this Message-ID (diff)
From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"adouglas@cadence.com" <adouglas@cadence.com>,
	"niklas.cassel@axis.com" <niklas.cassel@axis.com>,
	"jesper.nilsson@axis.com" <jesper.nilsson@axis.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC 06/10] misc: pci_endpoint_test: Add MSI-X support
Date: Tue, 17 Apr 2018 18:38:58 +0100	[thread overview]
Message-ID: <c6d1d492-38a0-6a03-7e61-b8b50226734b@synopsys.com> (raw)
In-Reply-To: <b25dcfb1-e770-e302-d9aa-7c35f6c58fa5@ti.com>

Hi Kishon,

On 17/04/2018 11:33, Kishon Vijay Abraham I wrote:
> Hi,
> 
> On Tuesday 10 April 2018 10:44 PM, Gustavo Pimentel wrote:
>> Adds the MSI-X support and updates driver documentation accordingly.
>>
>> Changes the driver parameter in order to allow the interruption type
>> selection.
>>
>> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
>> ---
>>  Documentation/misc-devices/pci-endpoint-test.txt |   3 +
>>  drivers/misc/pci_endpoint_test.c                 | 102 +++++++++++++++++------
>>  2 files changed, 79 insertions(+), 26 deletions(-)
>>
>> diff --git a/Documentation/misc-devices/pci-endpoint-test.txt b/Documentation/misc-devices/pci-endpoint-test.txt
>> index 4ebc359..fdfa0f6 100644
>> --- a/Documentation/misc-devices/pci-endpoint-test.txt
>> +++ b/Documentation/misc-devices/pci-endpoint-test.txt
>> @@ -10,6 +10,7 @@ The PCI driver for the test device performs the following tests
>>  	*) verifying addresses programmed in BAR
>>  	*) raise legacy IRQ
>>  	*) raise MSI IRQ
>> +	*) raise MSI-X IRQ
>>  	*) read data
>>  	*) write data
>>  	*) copy data
>> @@ -25,6 +26,8 @@ ioctl
>>   PCITEST_LEGACY_IRQ: Tests legacy IRQ
>>   PCITEST_MSI: Tests message signalled interrupts. The MSI number
>>  	      to be tested should be passed as argument.
>> + PCITEST_MSIX: Tests message signalled interrupts. The MSI-X number
>> +	      to be tested should be passed as argument.
>>   PCITEST_WRITE: Perform write tests. The size of the buffer should be passed
>>  		as argument.
>>   PCITEST_READ: Perform read tests. The size of the buffer should be passed
>> diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
>> index 37db0fc..a7d9354 100644
>> --- a/drivers/misc/pci_endpoint_test.c
>> +++ b/drivers/misc/pci_endpoint_test.c
>> @@ -42,11 +42,16 @@
>>  #define PCI_ENDPOINT_TEST_COMMAND	0x4
>>  #define COMMAND_RAISE_LEGACY_IRQ	BIT(0)
>>  #define COMMAND_RAISE_MSI_IRQ		BIT(1)
>> -#define MSI_NUMBER_SHIFT		2
>> -/* 6 bits for MSI number */
>> -#define COMMAND_READ                    BIT(8)
>> -#define COMMAND_WRITE                   BIT(9)
>> -#define COMMAND_COPY                    BIT(10)
>> +#define COMMAND_RAISE_MSIX_IRQ		BIT(2)
>> +#define IRQ_TYPE_SHIFT			3
>> +#define IRQ_TYPE_LEGACY			0
>> +#define IRQ_TYPE_MSI			1
>> +#define IRQ_TYPE_MSIX			2
>> +#define MSI_NUMBER_SHIFT		5
> 
> Now that you are anyways fixing this, add a new register entry for MSI numbers.
> Let's not keep COMMAND and MSI's together.

What you suggest?

>> +/* 12 bits for MSI number */
>> +#define COMMAND_READ                    BIT(17)
>> +#define COMMAND_WRITE                   BIT(18)
>> +#define COMMAND_COPY                    BIT(19)
> 
> This change should be done along with the pci-epf-test in a single patch.

To be clear, you're saying is this patch should be just be squashed into the
patch number 8 [1], because there is a lot of dependencies namely the defines,
that is used on the alter functions.

[1] -> https://patchwork.ozlabs.org/patch/896841/

>>  
>>  #define PCI_ENDPOINT_TEST_STATUS	0x8
>>  #define STATUS_READ_SUCCESS             BIT(0)
>> @@ -73,9 +78,9 @@ static DEFINE_IDA(pci_endpoint_test_ida);
>>  #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
>>  					    miscdev)
>>  
>> -static bool no_msi;
>> -module_param(no_msi, bool, 0444);
>> -MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
> 
> Let's not remove this just to make sure existing users doesn't get affected.

Hum, by making an internal conversion? Like this
no_msi = false <=> irq_type = 1
no_msi = true <=> irq_type = 0

>> +static int irq_type = IRQ_TYPE_MSIX;
>> +module_param(irq_type, int, 0444);
>> +MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
>>  
>>  enum pci_barno {
>>  	BAR_0,
>> @@ -103,7 +108,7 @@ struct pci_endpoint_test {
>>  struct pci_endpoint_test_data {
>>  	enum pci_barno test_reg_bar;
>>  	size_t alignment;
>> -	bool no_msi;
>> +	int irq_type;
>>  };
>>  
>>  static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
>> @@ -177,10 +182,10 @@ static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
>>  
>>  static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
>>  {
>> -	u32 val;
>> +	u32 val = COMMAND_RAISE_LEGACY_IRQ;
>>  
>> -	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
>> -				 COMMAND_RAISE_LEGACY_IRQ);
>> +	val |= (IRQ_TYPE_LEGACY << IRQ_TYPE_SHIFT);
>> +	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, val);
>>  	val = wait_for_completion_timeout(&test->irq_raised,
>>  					  msecs_to_jiffies(1000));
>>  	if (!val)
>> @@ -192,12 +197,12 @@ static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
>>  static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
>>  				      u8 msi_num)
>>  {
>> -	u32 val;
>> +	u32 val = COMMAND_RAISE_MSI_IRQ;
>>  	struct pci_dev *pdev = test->pdev;
>>  
>> -	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
>> -				 msi_num << MSI_NUMBER_SHIFT |
>> -				 COMMAND_RAISE_MSI_IRQ);
>> +	val |= (msi_num << MSI_NUMBER_SHIFT);
>> +	val |= (IRQ_TYPE_MSI << IRQ_TYPE_SHIFT);
>> +	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, val);
>>  	val = wait_for_completion_timeout(&test->irq_raised,
>>  					  msecs_to_jiffies(1000));
>>  	if (!val)
>> @@ -209,6 +214,26 @@ static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
>>  	return false;
>>  }
>>  
>> +static bool pci_endpoint_test_msix_irq(struct pci_endpoint_test *test,
>> +				       u16 msix_num)
>> +{
>> +	u32 val = COMMAND_RAISE_MSIX_IRQ;
>> +	struct pci_dev *pdev = test->pdev;
>> +
>> +	val |= (msix_num << MSI_NUMBER_SHIFT);
>> +	val |= (IRQ_TYPE_MSIX << IRQ_TYPE_SHIFT);
>> +	pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, val);
>> +	val = wait_for_completion_timeout(&test->irq_raised,
>> +					  msecs_to_jiffies(1000));
>> +	if (!val)
>> +		return false;
>> +
>> +	if (test->last_irq - pdev->irq == msix_num - 1)
>> +		return true;
>> +
>> +	return false;
> 
> I think you can have a single function for msix_irq and msi_irq.

Ok.

> 
> Thanks
> Kishon
> 


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  reply	other threads:[~2018-04-17 17:40 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-10 17:14 [RFC 00/10] Adds pcitest tool support for MSI-X Gustavo Pimentel
2018-04-10 17:14 ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 01/10] PCI: dwc: Add MSI-X callbacks handler Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-16  9:29   ` Kishon Vijay Abraham I
2018-04-16  9:29     ` Kishon Vijay Abraham I
2018-04-23  9:36     ` Gustavo Pimentel
2018-04-23  9:36       ` Gustavo Pimentel
2018-04-24  7:07       ` Kishon Vijay Abraham I
2018-04-24  7:07         ` Kishon Vijay Abraham I
2018-04-24  9:36         ` Gustavo Pimentel
2018-04-24  9:36           ` Gustavo Pimentel
2018-04-24 11:24           ` Kishon Vijay Abraham I
2018-04-24 11:24             ` Kishon Vijay Abraham I
2018-04-26 15:30             ` Gustavo Pimentel
2018-04-26 15:30               ` Gustavo Pimentel
2018-04-24 14:05           ` Alan Douglas
2018-04-24 14:05             ` Alan Douglas
2018-04-24 14:05             ` Alan Douglas
2018-04-24  9:15   ` Alan Douglas
2018-04-24  9:15     ` Alan Douglas
2018-04-24  9:15     ` Alan Douglas
2018-04-24 11:43     ` Gustavo Pimentel
2018-04-24 11:43       ` Gustavo Pimentel
2018-05-10 10:40     ` Gustavo Pimentel
2018-05-10 10:40       ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 02/10] PCI: cadence: Update cdns_pcie_ep_raise_irq function signature Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-13 16:05   ` Alan Douglas
2018-04-13 16:05     ` Alan Douglas
2018-04-13 16:05     ` Alan Douglas
2018-04-10 17:14 ` [RFC 03/10] PCI: endpoint: Add MSI-X interfaces Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-17 10:24   ` Kishon Vijay Abraham I
2018-04-17 10:24     ` Kishon Vijay Abraham I
2018-04-17 15:51     ` Gustavo Pimentel
2018-04-17 15:51       ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 04/10] PCI: dwc: MSI callbacks handler rework Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 05/10] PCI: dwc: Add legacy interrupt callback handler Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 06/10] misc: pci_endpoint_test: Add MSI-X support Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-17 10:33   ` Kishon Vijay Abraham I
2018-04-17 10:33     ` Kishon Vijay Abraham I
2018-04-17 17:38     ` Gustavo Pimentel [this message]
2018-04-17 17:38       ` Gustavo Pimentel
2018-04-24  7:19       ` Kishon Vijay Abraham I
2018-04-24  7:19         ` Kishon Vijay Abraham I
2018-04-24 10:57         ` Gustavo Pimentel
2018-04-24 10:57           ` Gustavo Pimentel
2018-04-24 11:43           ` Kishon Vijay Abraham I
2018-04-24 11:43             ` Kishon Vijay Abraham I
2018-04-26 15:36             ` Gustavo Pimentel
2018-04-26 15:36               ` Gustavo Pimentel
2018-04-24  6:59   ` Alan Douglas
2018-04-24  6:59     ` Alan Douglas
2018-04-24  6:59     ` Alan Douglas
2018-04-24 11:11     ` Gustavo Pimentel
2018-04-24 11:11       ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 07/10] misc: pci_endpoint_test: Replace lower into upper case characters Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 08/10] PCI: endpoint: functions/pci-epf-test: Add MSI-X support Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 09/10] PCI: endpoint: functions/pci-epf-test: Replace lower into upper case characters Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-10 17:14 ` [RFC 10/10] tools: PCI: Add MSI-X support Gustavo Pimentel
2018-04-10 17:14   ` Gustavo Pimentel
2018-04-24  9:57   ` Alan Douglas
2018-04-24  9:57     ` Alan Douglas
2018-04-24  9:57     ` Alan Douglas
2018-04-24 17:18     ` Gustavo Pimentel
2018-04-24 17:18       ` Gustavo Pimentel
2018-04-24  6:48 ` [RFC 00/10] Adds pcitest tool support for MSI-X Alan Douglas
2018-04-24  6:48   ` Alan Douglas
2018-04-24  6:48   ` Alan Douglas
2018-04-24  8:49   ` Gustavo Pimentel
2018-04-24  8:49     ` Gustavo Pimentel
2018-04-24  9:28     ` Alan Douglas
2018-04-24  9:28       ` Alan Douglas

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