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From: Frederic Barrat <fbarrat@linux.ibm.com>
To: Daniel Henrique Barboza <danielhb413@gmail.com>, qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, clg@kaod.org
Subject: Re: [PATCH for-7.2 v4 01/11] ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties
Date: Fri, 12 Aug 2022 16:39:31 +0200	[thread overview]
Message-ID: <c73ae54a-30b9-5eda-059f-71dc76c48eff@linux.ibm.com> (raw)
In-Reply-To: <20220811163950.578927-2-danielhb413@gmail.com>



On 11/08/2022 18:39, Daniel Henrique Barboza wrote:
> We rely on the phb-id and chip-id, which are PHB properties, to assign
> chassis and slot to the root port. For default devices this is no big
> deal: the root port is being created under pnv_phb_realize() and the
> values are being passed on via the 'index' and 'chip-id' of the
> pnv_phb_attach_root_port() helper.
> 
> If we want to implement user created root ports we have a problem. The
> user created root port will not be aware of which PHB it belongs to,
> unless we're willing to violate QOM best practices and access the PHB
> via dev->parent_bus->parent. What we can do is to access the root bus
> parent bus.
> 
> Since we're already assigning the root port as QOM child of the bus, and
> the bus is initiated using PHB properties, let's add phb-id and chip-id
> as properties of the bus. This will allow us trivial access to them, for
> both user-created and default root ports, without doing anything too
> shady with QOM.
> 
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> ---


Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>

   Fred


>   hw/pci-host/pnv_phb3.c         | 50 ++++++++++++++++++++++++++++++++++
>   include/hw/pci-host/pnv_phb3.h |  9 +++++-
>   2 files changed, 58 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index d4c04a281a..af8575c007 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -1006,6 +1006,11 @@ void pnv_phb3_bus_init(DeviceState *dev, PnvPHB3 *phb)
>                                        &phb->pci_mmio, &phb->pci_io,
>                                        0, 4, TYPE_PNV_PHB3_ROOT_BUS);
>   
> +    object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id,
> +                            &error_abort);
> +    object_property_set_int(OBJECT(pci->bus), "chip-id", phb->chip_id,
> +                            &error_abort);
> +
>       pci_setup_iommu(pci->bus, pnv_phb3_dma_iommu, phb);
>   }
>   
> @@ -1105,10 +1110,55 @@ static const TypeInfo pnv_phb3_type_info = {
>       .instance_init = pnv_phb3_instance_init,
>   };
>   
> +static void pnv_phb3_root_bus_get_prop(Object *obj, Visitor *v,
> +                                       const char *name,
> +                                       void *opaque, Error **errp)
> +{
> +    PnvPHB3RootBus *bus = PNV_PHB3_ROOT_BUS(obj);
> +    uint64_t value = 0;
> +
> +    if (strcmp(name, "phb-id") == 0) {
> +        value = bus->phb_id;
> +    } else {
> +        value = bus->chip_id;
> +    }
> +
> +    visit_type_size(v, name, &value, errp);
> +}
> +
> +static void pnv_phb3_root_bus_set_prop(Object *obj, Visitor *v,
> +                                       const char *name,
> +                                       void *opaque, Error **errp)
> +
> +{
> +    PnvPHB3RootBus *bus = PNV_PHB3_ROOT_BUS(obj);
> +    uint64_t value;
> +
> +    if (!visit_type_size(v, name, &value, errp)) {
> +        return;
> +    }
> +
> +    if (strcmp(name, "phb-id") == 0) {
> +        bus->phb_id = value;
> +    } else {
> +        bus->chip_id = value;
> +    }
> +}
> +
>   static void pnv_phb3_root_bus_class_init(ObjectClass *klass, void *data)
>   {
>       BusClass *k = BUS_CLASS(klass);
>   
> +    object_class_property_add(klass, "phb-id", "int",
> +                              pnv_phb3_root_bus_get_prop,
> +                              pnv_phb3_root_bus_set_prop,
> +                              NULL, NULL);
> +
> +    object_class_property_add(klass, "chip-id", "int",
> +                              pnv_phb3_root_bus_get_prop,
> +                              pnv_phb3_root_bus_set_prop,
> +                              NULL, NULL);
> +
>       /*
>        * PHB3 has only a single root complex. Enforce the limit on the
>        * parent bus
> diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
> index bff69201d9..4854f6d2f6 100644
> --- a/include/hw/pci-host/pnv_phb3.h
> +++ b/include/hw/pci-host/pnv_phb3.h
> @@ -104,9 +104,16 @@ struct PnvPBCQState {
>   };
>   
>   /*
> - * PHB3 PCIe Root port
> + * PHB3 PCIe Root Bus
>    */
>   #define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root"
> +struct PnvPHB3RootBus {
> +    PCIBus parent;
> +
> +    uint32_t chip_id;
> +    uint32_t phb_id;
> +};
> +OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3RootBus, PNV_PHB3_ROOT_BUS)
>   
>   /*
>    * PHB3 PCIe Host Bridge for PowerNV machines (POWER8)


  reply	other threads:[~2022-08-12 14:46 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-11 16:39 [PATCH for-7.2 v4 00/11] enable pnv-phb user created devices Daniel Henrique Barboza
2022-08-11 16:39 ` [PATCH for-7.2 v4 01/11] ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties Daniel Henrique Barboza
2022-08-12 14:39   ` Frederic Barrat [this message]
2022-08-11 16:39 ` [PATCH for-7.2 v4 02/11] ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties Daniel Henrique Barboza
2022-08-12 14:39   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 03/11] ppc/pnv: set root port chassis and slot using Bus properties Daniel Henrique Barboza
2022-08-12 14:40   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 04/11] ppc/pnv: add helpers for pnv-phb user devices Daniel Henrique Barboza
2022-08-11 18:47   ` Cédric Le Goater
2022-08-12 14:49   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 05/11] ppc/pnv: turn chip8->phbs[] into a PnvPHB* array Daniel Henrique Barboza
2022-08-11 18:48   ` Cédric Le Goater
2022-08-12 14:52   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 06/11] ppc/pnv: enable user created pnv-phb for powernv8 Daniel Henrique Barboza
2022-08-12 16:15   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 07/11] ppc/pnv: add PHB4 helpers for user created pnv-phb Daniel Henrique Barboza
2022-08-11 18:44   ` Cédric Le Goater
2022-08-12 15:23   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 08/11] ppc/pnv: enable user created pnv-phb for powernv9 Daniel Henrique Barboza
2022-08-12 16:16   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 09/11] ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs Daniel Henrique Barboza
2022-08-11 18:45   ` Cédric Le Goater
2022-08-12 15:26   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 10/11] ppc/pnv: user creatable pnv-phb for powernv10 Daniel Henrique Barboza
2022-08-12 15:27   ` Frederic Barrat
2022-08-11 16:39 ` [PATCH for-7.2 v4 11/11] ppc/pnv: fix QOM parenting of user creatable root ports Daniel Henrique Barboza
2022-08-12 16:13   ` Frederic Barrat
2022-08-16 20:00     ` Daniel Henrique Barboza

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