* [PATCH 0/2] *** IT6505 driver read dt properties ***
@ 2022-09-13 8:48 ` allen
0 siblings, 0 replies; 8+ messages in thread
From: allen @ 2022-09-13 8:48 UTC (permalink / raw)
Cc: Allen Chen, Pin-yen Lin, Jau-Chih Tseng, Kenneth Hung, Hermes Wu,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:DRM DRIVERS, Jernej Skrabec, Jonas Karlman,
Laurent Pinchart, open list
From: allen chen <allen.chen@ite.com.tw>
This series let driver can read properties from dt to restrict dp output
bandwidth.
allen chen (2):
dt-bindings: it6505: add properties to restrict output bandwidth
drm/bridge: add it6505 driver to read data-lanes and
max-pixel-clock-khz from dt
.../bindings/display/bridge/ite,it6505.yaml | 10 ++++++
drivers/gpu/drm/bridge/ite-it6505.c | 35 +++++++++++++++++--
2 files changed, 42 insertions(+), 3 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/2] *** IT6505 driver read dt properties ***
@ 2022-09-13 8:48 ` allen
0 siblings, 0 replies; 8+ messages in thread
From: allen @ 2022-09-13 8:48 UTC (permalink / raw)
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Kenneth Hung, Jau-Chih Tseng, Allen Chen, Jonas Karlman,
open list, open list:DRM DRIVERS, Pin-yen Lin, Hermes Wu,
Jernej Skrabec, Laurent Pinchart
From: allen chen <allen.chen@ite.com.tw>
This series let driver can read properties from dt to restrict dp output
bandwidth.
allen chen (2):
dt-bindings: it6505: add properties to restrict output bandwidth
drm/bridge: add it6505 driver to read data-lanes and
max-pixel-clock-khz from dt
.../bindings/display/bridge/ite,it6505.yaml | 10 ++++++
drivers/gpu/drm/bridge/ite-it6505.c | 35 +++++++++++++++++--
2 files changed, 42 insertions(+), 3 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
2022-09-13 8:48 ` allen
@ 2022-09-13 8:48 ` allen
-1 siblings, 0 replies; 8+ messages in thread
From: allen @ 2022-09-13 8:48 UTC (permalink / raw)
Cc: Allen Chen, Pin-yen Lin, Jau-Chih Tseng, Kenneth Hung, Hermes Wu,
Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter,
Rob Herring, Krzysztof Kozlowski, open list:DRM DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
From: allen chen <allen.chen@ite.com.tw>
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin <treapking@chromium.org>
Signed-off-by: Allen Chen <allen.chen@ite.com.tw>
---
.../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a..62b9f2192202 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,6 +52,14 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ data-lanes:
+ maxItems: 1
+ description: restrict the dp output data-lanes with value of 1-4
+
+ max-pixel-clock-khz:
+ maxItems: 1
+ description: restrict max pixel clock
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
@@ -84,6 +92,8 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+ data-lanes = <2>;
+ max-pixel-clock-khz = <150000>;
port {
it6505_in: endpoint {
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
@ 2022-09-13 8:48 ` allen
0 siblings, 0 replies; 8+ messages in thread
From: allen @ 2022-09-13 8:48 UTC (permalink / raw)
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Kenneth Hung, Jernej Skrabec, Krzysztof Kozlowski,
Jau-Chih Tseng, David Airlie, Allen Chen, open list:DRM DRIVERS,
Neil Armstrong, open list, Robert Foss, Pin-yen Lin, Hermes Wu,
Rob Herring, Laurent Pinchart, Andrzej Hajda, Jonas Karlman
From: allen chen <allen.chen@ite.com.tw>
Add properties to restrict dp output data-lanes and clock.
Signed-off-by: Pin-Yen Lin <treapking@chromium.org>
Signed-off-by: Allen Chen <allen.chen@ite.com.tw>
---
.../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
index 833d11b2303a..62b9f2192202 100644
--- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml
@@ -52,6 +52,14 @@ properties:
maxItems: 1
description: extcon specifier for the Power Delivery
+ data-lanes:
+ maxItems: 1
+ description: restrict the dp output data-lanes with value of 1-4
+
+ max-pixel-clock-khz:
+ maxItems: 1
+ description: restrict max pixel clock
+
port:
$ref: /schemas/graph.yaml#/properties/port
description: A port node pointing to DPI host port node
@@ -84,6 +92,8 @@ examples:
pwr18-supply = <&it6505_pp18_reg>;
reset-gpios = <&pio 179 1>;
extcon = <&usbc_extcon>;
+ data-lanes = <2>;
+ max-pixel-clock-khz = <150000>;
port {
it6505_in: endpoint {
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt
2022-09-13 8:48 ` allen
@ 2022-09-13 8:48 ` allen
-1 siblings, 0 replies; 8+ messages in thread
From: allen @ 2022-09-13 8:48 UTC (permalink / raw)
Cc: Allen Chen, Pin-yen Lin, Jau-Chih Tseng, Kenneth Hung, Hermes Wu,
Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter,
open list:DRM DRIVERS, open list
From: allen chen <allen.chen@ite.com.tw>
Add driver to read data-lanes and max-pixel-clock-khz from dt property
to restrict output bandwidth.
Signed-off-by: Allen chen <allen.chen@ite.com.tw>
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
index 2767b70fa2cb..cfa25a176a29 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3081,7 +3086,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "data-lanes",
+ max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-pixel-clock-khz",
+ max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+ it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+ it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt
@ 2022-09-13 8:48 ` allen
0 siblings, 0 replies; 8+ messages in thread
From: allen @ 2022-09-13 8:48 UTC (permalink / raw)
Cc: Kenneth Hung, Jernej Skrabec, Jau-Chih Tseng, David Airlie,
Allen Chen, open list:DRM DRIVERS, Neil Armstrong, open list,
Robert Foss, Pin-yen Lin, Hermes Wu, Laurent Pinchart,
Andrzej Hajda, Jonas Karlman
From: allen chen <allen.chen@ite.com.tw>
Add driver to read data-lanes and max-pixel-clock-khz from dt property
to restrict output bandwidth.
Signed-off-by: Allen chen <allen.chen@ite.com.tw>
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
---
drivers/gpu/drm/bridge/ite-it6505.c | 35 ++++++++++++++++++++++++++---
1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
index 2767b70fa2cb..cfa25a176a29 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -436,6 +436,8 @@ struct it6505 {
bool powered;
bool hpd_state;
u32 afe_setting;
+ u32 max_dpi_pixel_clock;
+ u32 max_lane_count;
enum hdcp_state hdcp_status;
struct delayed_work hdcp_work;
struct work_struct hdcp_wait_ksv_list;
@@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505)
it6505->lane_count = link->num_lanes;
DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training",
it6505->lane_count);
- it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT);
+ it6505->lane_count = min_t(int, it6505->lane_count,
+ it6505->max_lane_count);
it6505->branch_device = drm_dp_is_branch(it6505->dpcd);
DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device",
@@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
return MODE_NO_INTERLACE;
- if (mode->clock > DPI_PIXEL_CLK_MAX)
+ if (mode->clock > it6505->max_dpi_pixel_clock)
return MODE_CLOCK_HIGH;
it6505->video_info.clock = mode->clock;
@@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505)
{
struct device *dev = &it6505->client->dev;
u32 *afe_setting = &it6505->afe_setting;
+ u32 *max_lane_count = &it6505->max_lane_count;
+ u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock;
it6505->lane_swap_disabled =
device_property_read_bool(dev, "no-laneswap");
@@ -3081,7 +3086,31 @@ static void it6505_parse_dt(struct it6505 *it6505)
} else {
*afe_setting = 0;
}
- DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting);
+
+ if (device_property_read_u32(dev, "data-lanes",
+ max_lane_count) == 0) {
+ if (*max_lane_count > 4 || *max_lane_count == 3) {
+ dev_err(dev, "max lane count error, use default");
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+ } else {
+ *max_lane_count = MAX_LANE_COUNT;
+ }
+
+ if (device_property_read_u32(dev, "max-pixel-clock-khz",
+ max_dpi_pixel_clock) == 0) {
+ if (*max_dpi_pixel_clock > 297000) {
+ dev_err(dev, "max pixel clock error, use default");
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+ } else {
+ *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX;
+ }
+
+ DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u",
+ it6505->afe_setting, it6505->max_lane_count);
+ DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz",
+ it6505->max_dpi_pixel_clock);
}
static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf,
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
2022-09-13 8:48 ` allen
@ 2022-09-13 9:03 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 9:03 UTC (permalink / raw)
To: allen
Cc: Pin-yen Lin, Jau-Chih Tseng, Kenneth Hung, Hermes Wu,
Andrzej Hajda, Neil Armstrong, Robert Foss, Laurent Pinchart,
Jonas Karlman, Jernej Skrabec, David Airlie, Daniel Vetter,
Rob Herring, Krzysztof Kozlowski, open list:DRM DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On 13/09/2022 10:48, allen wrote:
> From: allen chen <allen.chen@ite.com.tw>
>
> Add properties to restrict dp output data-lanes and clock.
>
> Signed-off-by: Pin-Yen Lin <treapking@chromium.org>
> Signed-off-by: Allen Chen <allen.chen@ite.com.tw>
> ---
> .../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
Thank you for your patch. There is something to discuss/improve.
You already sent it. Please version your patches (git help format-patch)
or mark them as RESEND (it's nice sometimes to explain why it is being
resent).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] dt-bindings: it6505: add properties to restrict output bandwidth
@ 2022-09-13 9:03 ` Krzysztof Kozlowski
0 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2022-09-13 9:03 UTC (permalink / raw)
To: allen
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Kenneth Hung, Jernej Skrabec, Krzysztof Kozlowski,
Neil Armstrong, David Airlie, open list:DRM DRIVERS,
Jau-Chih Tseng, open list, Robert Foss, Pin-yen Lin, Hermes Wu,
Rob Herring, Laurent Pinchart, Andrzej Hajda, Jonas Karlman
On 13/09/2022 10:48, allen wrote:
> From: allen chen <allen.chen@ite.com.tw>
>
> Add properties to restrict dp output data-lanes and clock.
>
> Signed-off-by: Pin-Yen Lin <treapking@chromium.org>
> Signed-off-by: Allen Chen <allen.chen@ite.com.tw>
> ---
> .../devicetree/bindings/display/bridge/ite,it6505.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
Thank you for your patch. There is something to discuss/improve.
You already sent it. Please version your patches (git help format-patch)
or mark them as RESEND (it's nice sometimes to explain why it is being
resent).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-09-13 9:03 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-13 8:48 [PATCH 0/2] *** IT6505 driver read dt properties *** allen
2022-09-13 8:48 ` allen
2022-09-13 8:48 ` [PATCH 1/2] dt-bindings: it6505: add properties to restrict output bandwidth allen
2022-09-13 8:48 ` allen
2022-09-13 9:03 ` Krzysztof Kozlowski
2022-09-13 9:03 ` Krzysztof Kozlowski
2022-09-13 8:48 ` [PATCH 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-khz from dt allen
2022-09-13 8:48 ` allen
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