* [PATCH for-next 1/9] RDMA/hns: Refactor process about opcode in post_send()
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-09 2:39 ` Lang Cheng
2020-09-07 13:36 ` [PATCH for-next 2/9] RDMA/hns: Add type check in get/set hw field Weihang Li
` (7 subsequent siblings)
8 siblings, 1 reply; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
According to the IB specifications, the verbs should return an immediate
error when the users set an unsupported opcode. Furthermore, refactor codes
about opcode in process of post_send to make the difference between opcodes
clearer.
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 135 ++++++++++++++++++-----------
1 file changed, 83 insertions(+), 52 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 96e08b4..9a9639b 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -292,6 +292,33 @@ static unsigned int calc_wr_sge_num(const struct ib_send_wr *wr,
return valid_num;
}
+static __le32 get_immtdata(const struct ib_send_wr *wr)
+{
+ switch (wr->opcode) {
+ case IB_WR_SEND_WITH_IMM:
+ case IB_WR_RDMA_WRITE_WITH_IMM:
+ return cpu_to_le32(be32_to_cpu(wr->ex.imm_data));
+ default:
+ return 0;
+ }
+}
+
+static int set_ud_opcode(struct hns_roce_v2_ud_send_wqe *ud_sq_wqe,
+ const struct ib_send_wr *wr)
+{
+ u32 ib_op = wr->opcode;
+
+ if (ib_op != IB_WR_SEND && ib_op != IB_WR_SEND_WITH_IMM)
+ return -EINVAL;
+
+ ud_sq_wqe->immtdata = get_immtdata(wr);
+
+ roce_set_field(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_OPCODE_M,
+ V2_UD_SEND_WQE_BYTE_4_OPCODE_S, to_hr_opcode(ib_op));
+
+ return 0;
+}
+
static inline int set_ud_wqe(struct hns_roce_qp *qp,
const struct ib_send_wr *wr,
void *wqe, unsigned int *sge_idx,
@@ -300,15 +327,24 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
struct hns_roce_dev *hr_dev = to_hr_dev(qp->ibqp.device);
struct hns_roce_ah *ah = to_hr_ah(ud_wr(wr)->ah);
struct hns_roce_v2_ud_send_wqe *ud_sq_wqe = wqe;
+ struct ib_device *ibdev = &hr_dev->ib_dev;
unsigned int curr_idx = *sge_idx;
int valid_num_sge;
u32 msg_len = 0;
bool loopback;
u8 *smac;
+ int ret;
valid_num_sge = calc_wr_sge_num(wr, &msg_len);
memset(ud_sq_wqe, 0, sizeof(*ud_sq_wqe));
+ ret = set_ud_opcode(ud_sq_wqe, wr);
+ if (unlikely(ret)) {
+ ibdev_err(ibdev, "unsupported opcode, opcode = %d.\n",
+ wr->opcode);
+ return ret;
+ }
+
roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_0_M,
V2_UD_SEND_WQE_DMAC_0_S, ah->av.mac[0]);
roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_1_M,
@@ -336,16 +372,6 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
ud_sq_wqe->msg_len = cpu_to_le32(msg_len);
- switch (wr->opcode) {
- case IB_WR_SEND_WITH_IMM:
- case IB_WR_RDMA_WRITE_WITH_IMM:
- ud_sq_wqe->immtdata = cpu_to_le32(be32_to_cpu(wr->ex.imm_data));
- break;
- default:
- ud_sq_wqe->immtdata = 0;
- break;
- }
-
/* Set sig attr */
roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_CQE_S,
(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
@@ -402,33 +428,68 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
return 0;
}
+static int set_rc_opcode(struct hns_roce_v2_rc_send_wqe *rc_sq_wqe,
+ const struct ib_send_wr *wr)
+{
+ u32 ib_op = wr->opcode;
+
+ rc_sq_wqe->immtdata = get_immtdata(wr);
+
+ switch (ib_op) {
+ case IB_WR_RDMA_READ:
+ case IB_WR_RDMA_WRITE:
+ case IB_WR_RDMA_WRITE_WITH_IMM:
+ rc_sq_wqe->rkey = cpu_to_le32(rdma_wr(wr)->rkey);
+ rc_sq_wqe->va = cpu_to_le64(rdma_wr(wr)->remote_addr);
+ break;
+ case IB_WR_SEND:
+ case IB_WR_SEND_WITH_IMM:
+ break;
+ case IB_WR_ATOMIC_CMP_AND_SWP:
+ case IB_WR_ATOMIC_FETCH_AND_ADD:
+ rc_sq_wqe->rkey = cpu_to_le32(atomic_wr(wr)->rkey);
+ rc_sq_wqe->va = cpu_to_le64(atomic_wr(wr)->remote_addr);
+ break;
+ case IB_WR_REG_MR:
+ set_frmr_seg(rc_sq_wqe, reg_wr(wr));
+ break;
+ case IB_WR_LOCAL_INV:
+ roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_SO_S, 1);
+ fallthrough;
+ case IB_WR_SEND_WITH_INV:
+ rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ roce_set_field(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OPCODE_M,
+ V2_RC_SEND_WQE_BYTE_4_OPCODE_S, to_hr_opcode(ib_op));
+
+ return 0;
+}
static inline int set_rc_wqe(struct hns_roce_qp *qp,
const struct ib_send_wr *wr,
void *wqe, unsigned int *sge_idx,
unsigned int owner_bit)
{
+ struct ib_device *ibdev = &to_hr_dev(qp->ibqp.device)->ib_dev;
struct hns_roce_v2_rc_send_wqe *rc_sq_wqe = wqe;
unsigned int curr_idx = *sge_idx;
unsigned int valid_num_sge;
u32 msg_len = 0;
- int ret = 0;
+ int ret;
valid_num_sge = calc_wr_sge_num(wr, &msg_len);
memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));
rc_sq_wqe->msg_len = cpu_to_le32(msg_len);
- switch (wr->opcode) {
- case IB_WR_SEND_WITH_IMM:
- case IB_WR_RDMA_WRITE_WITH_IMM:
- rc_sq_wqe->immtdata = cpu_to_le32(be32_to_cpu(wr->ex.imm_data));
- break;
- case IB_WR_SEND_WITH_INV:
- rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
- break;
- default:
- rc_sq_wqe->immtdata = 0;
- break;
+ ret = set_rc_opcode(rc_sq_wqe, wr);
+ if (unlikely(ret)) {
+ ibdev_err(ibdev, "unsupported opcode, opcode = %d.\n",
+ wr->opcode);
+ return ret;
}
roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_FENCE_S,
@@ -440,36 +501,6 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp,
roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,
(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
- roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S,
- owner_bit);
-
- switch (wr->opcode) {
- case IB_WR_RDMA_READ:
- case IB_WR_RDMA_WRITE:
- case IB_WR_RDMA_WRITE_WITH_IMM:
- rc_sq_wqe->rkey = cpu_to_le32(rdma_wr(wr)->rkey);
- rc_sq_wqe->va = cpu_to_le64(rdma_wr(wr)->remote_addr);
- break;
- case IB_WR_LOCAL_INV:
- roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_SO_S, 1);
- rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
- break;
- case IB_WR_REG_MR:
- set_frmr_seg(rc_sq_wqe, reg_wr(wr));
- break;
- case IB_WR_ATOMIC_CMP_AND_SWP:
- case IB_WR_ATOMIC_FETCH_AND_ADD:
- rc_sq_wqe->rkey = cpu_to_le32(atomic_wr(wr)->rkey);
- rc_sq_wqe->va = cpu_to_le64(atomic_wr(wr)->remote_addr);
- break;
- default:
- break;
- }
-
- roce_set_field(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OPCODE_M,
- V2_RC_SEND_WQE_BYTE_4_OPCODE_S,
- to_hr_opcode(wr->opcode));
-
if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
set_atomic_seg(wr, rc_sq_wqe, valid_num_sge);
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH for-next 1/9] RDMA/hns: Refactor process about opcode in post_send()
2020-09-07 13:36 ` [PATCH for-next 1/9] RDMA/hns: Refactor process about opcode in post_send() Weihang Li
@ 2020-09-09 2:39 ` Lang Cheng
2020-09-09 3:41 ` liweihang
0 siblings, 1 reply; 12+ messages in thread
From: Lang Cheng @ 2020-09-09 2:39 UTC (permalink / raw)
To: Weihang Li, dledford, jgg; +Cc: linux-rdma, linuxarm, leon
On 2020/9/7 21:36, Weihang Li wrote:
> According to the IB specifications, the verbs should return an immediate
> error when the users set an unsupported opcode. Furthermore, refactor codes
> about opcode in process of post_send to make the difference between opcodes
> clearer.
>
> Signed-off-by: Weihang Li <liweihang@huawei.com>
> ---
> drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 135 ++++++++++++++++++-----------
> 1 file changed, 83 insertions(+), 52 deletions(-)
>
> diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> index 96e08b4..9a9639b 100644
> --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
> @@ -292,6 +292,33 @@ static unsigned int calc_wr_sge_num(const struct ib_send_wr *wr,
> return valid_num;
> }
>
> +static __le32 get_immtdata(const struct ib_send_wr *wr)
> +{
> + switch (wr->opcode) {
> + case IB_WR_SEND_WITH_IMM:
> + case IB_WR_RDMA_WRITE_WITH_IMM:
> + return cpu_to_le32(be32_to_cpu(wr->ex.imm_data));
> + default:
> + return 0;
> + }
> +}
> +
> +static int set_ud_opcode(struct hns_roce_v2_ud_send_wqe *ud_sq_wqe,
> + const struct ib_send_wr *wr)
> +{
> + u32 ib_op = wr->opcode;
> +
> + if (ib_op != IB_WR_SEND && ib_op != IB_WR_SEND_WITH_IMM)
> + return -EINVAL;
> +
> + ud_sq_wqe->immtdata = get_immtdata(wr);
> +
> + roce_set_field(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_OPCODE_M,
> + V2_UD_SEND_WQE_BYTE_4_OPCODE_S, to_hr_opcode(ib_op));
> +
> + return 0;
> +}
> +
> static inline int set_ud_wqe(struct hns_roce_qp *qp,
> const struct ib_send_wr *wr,
> void *wqe, unsigned int *sge_idx,
> @@ -300,15 +327,24 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
> struct hns_roce_dev *hr_dev = to_hr_dev(qp->ibqp.device);
> struct hns_roce_ah *ah = to_hr_ah(ud_wr(wr)->ah);
> struct hns_roce_v2_ud_send_wqe *ud_sq_wqe = wqe;
> + struct ib_device *ibdev = &hr_dev->ib_dev;
> unsigned int curr_idx = *sge_idx;
> int valid_num_sge;
> u32 msg_len = 0;
> bool loopback;
> u8 *smac;
> + int ret;
>
> valid_num_sge = calc_wr_sge_num(wr, &msg_len);
> memset(ud_sq_wqe, 0, sizeof(*ud_sq_wqe));
>
> + ret = set_ud_opcode(ud_sq_wqe, wr);
> + if (unlikely(ret)) {
> + ibdev_err(ibdev, "unsupported opcode, opcode = %d.\n",
> + wr->opcode);
> + return ret;
> + }
> +
> roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_0_M,
> V2_UD_SEND_WQE_DMAC_0_S, ah->av.mac[0]);
> roce_set_field(ud_sq_wqe->dmac, V2_UD_SEND_WQE_DMAC_1_M,
> @@ -336,16 +372,6 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
>
> ud_sq_wqe->msg_len = cpu_to_le32(msg_len);
>
> - switch (wr->opcode) {
> - case IB_WR_SEND_WITH_IMM:
> - case IB_WR_RDMA_WRITE_WITH_IMM:
> - ud_sq_wqe->immtdata = cpu_to_le32(be32_to_cpu(wr->ex.imm_data));
> - break;
> - default:
> - ud_sq_wqe->immtdata = 0;
> - break;
> - }
> -
> /* Set sig attr */
> roce_set_bit(ud_sq_wqe->byte_4, V2_UD_SEND_WQE_BYTE_4_CQE_S,
> (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
> @@ -402,33 +428,68 @@ static inline int set_ud_wqe(struct hns_roce_qp *qp,
> return 0;
> }
>
> +static int set_rc_opcode(struct hns_roce_v2_rc_send_wqe *rc_sq_wqe,
> + const struct ib_send_wr *wr)
> +{
> + u32 ib_op = wr->opcode;
> +
> + rc_sq_wqe->immtdata = get_immtdata(wr);
> +
> + switch (ib_op) {
> + case IB_WR_RDMA_READ:
> + case IB_WR_RDMA_WRITE:
> + case IB_WR_RDMA_WRITE_WITH_IMM:
> + rc_sq_wqe->rkey = cpu_to_le32(rdma_wr(wr)->rkey);
> + rc_sq_wqe->va = cpu_to_le64(rdma_wr(wr)->remote_addr);
> + break;
> + case IB_WR_SEND:
> + case IB_WR_SEND_WITH_IMM:
> + break;
> + case IB_WR_ATOMIC_CMP_AND_SWP:
> + case IB_WR_ATOMIC_FETCH_AND_ADD:
> + rc_sq_wqe->rkey = cpu_to_le32(atomic_wr(wr)->rkey);
> + rc_sq_wqe->va = cpu_to_le64(atomic_wr(wr)->remote_addr);
> + break;
> + case IB_WR_REG_MR:
> + set_frmr_seg(rc_sq_wqe, reg_wr(wr));
> + break;
> + case IB_WR_LOCAL_INV:
> + roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_SO_S, 1);
> + fallthrough;
> + case IB_WR_SEND_WITH_INV:
> + rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + roce_set_field(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OPCODE_M,
> + V2_RC_SEND_WQE_BYTE_4_OPCODE_S, to_hr_opcode(ib_op));
> +
> + return 0;
> +}
> static inline int set_rc_wqe(struct hns_roce_qp *qp,
> const struct ib_send_wr *wr,
> void *wqe, unsigned int *sge_idx,
> unsigned int owner_bit)
> {
> + struct ib_device *ibdev = &to_hr_dev(qp->ibqp.device)->ib_dev;
> struct hns_roce_v2_rc_send_wqe *rc_sq_wqe = wqe;
> unsigned int curr_idx = *sge_idx;
> unsigned int valid_num_sge;
> u32 msg_len = 0;
> - int ret = 0;
> + int ret;
>
> valid_num_sge = calc_wr_sge_num(wr, &msg_len);
> memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));
>
> rc_sq_wqe->msg_len = cpu_to_le32(msg_len);
>
> - switch (wr->opcode) {
> - case IB_WR_SEND_WITH_IMM:
> - case IB_WR_RDMA_WRITE_WITH_IMM:
> - rc_sq_wqe->immtdata = cpu_to_le32(be32_to_cpu(wr->ex.imm_data));
> - break;
> - case IB_WR_SEND_WITH_INV:
> - rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
> - break;
> - default:
> - rc_sq_wqe->immtdata = 0;
> - break;
> + ret = set_rc_opcode(rc_sq_wqe, wr);
> + if (unlikely(ret)) {
> + ibdev_err(ibdev, "unsupported opcode, opcode = %d.\n",
> + wr->opcode);
> + return ret;
> }
>
> roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_FENCE_S,
> @@ -440,36 +501,6 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp,
> roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,
> (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
>
> - roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S,
> - owner_bit);
Seems we lost this field.
> -
> - switch (wr->opcode) {
> - case IB_WR_RDMA_READ:
> - case IB_WR_RDMA_WRITE:
> - case IB_WR_RDMA_WRITE_WITH_IMM:
> - rc_sq_wqe->rkey = cpu_to_le32(rdma_wr(wr)->rkey);
> - rc_sq_wqe->va = cpu_to_le64(rdma_wr(wr)->remote_addr);
> - break;
> - case IB_WR_LOCAL_INV:
> - roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_SO_S, 1);
> - rc_sq_wqe->inv_key = cpu_to_le32(wr->ex.invalidate_rkey);
> - break;
> - case IB_WR_REG_MR:
> - set_frmr_seg(rc_sq_wqe, reg_wr(wr));
> - break;
> - case IB_WR_ATOMIC_CMP_AND_SWP:
> - case IB_WR_ATOMIC_FETCH_AND_ADD:
> - rc_sq_wqe->rkey = cpu_to_le32(atomic_wr(wr)->rkey);
> - rc_sq_wqe->va = cpu_to_le64(atomic_wr(wr)->remote_addr);
> - break;
> - default:
> - break;
> - }
> -
> - roce_set_field(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OPCODE_M,
> - V2_RC_SEND_WQE_BYTE_4_OPCODE_S,
> - to_hr_opcode(wr->opcode));
> -
> if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
> wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
> set_atomic_seg(wr, rc_sq_wqe, valid_num_sge);
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH for-next 1/9] RDMA/hns: Refactor process about opcode in post_send()
2020-09-09 2:39 ` Lang Cheng
@ 2020-09-09 3:41 ` liweihang
0 siblings, 0 replies; 12+ messages in thread
From: liweihang @ 2020-09-09 3:41 UTC (permalink / raw)
To: chenglang, dledford, jgg; +Cc: linux-rdma, Linuxarm, leon
On 2020/9/9 10:39, chenglang wrote:
>> @@ -440,36 +501,6 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp,
>> roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,
>> (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
>>
>> - roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S,
>> - owner_bit);
> Seems we lost this field.
>
Thank you for reminding me of that, will fix it :)
Weihang
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH for-next 2/9] RDMA/hns: Add type check in get/set hw field
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
2020-09-07 13:36 ` [PATCH for-next 1/9] RDMA/hns: Refactor process about opcode in post_send() Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 3/9] RDMA/hns: Add interception for resizing SRQs Weihang Li
` (6 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
roce_get_field() and roce_set_field() are only used to set variables in
type of __le32, add checks for type to avoid inappropriate assignments.
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_common.h | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_common.h b/drivers/infiniband/hw/hns/hns_roce_common.h
index f5669ff..bb440af 100644
--- a/drivers/infiniband/hw/hns/hns_roce_common.h
+++ b/drivers/infiniband/hw/hns/hns_roce_common.h
@@ -38,16 +38,18 @@
#define roce_raw_write(value, addr) \
__raw_writel((__force u32)cpu_to_le32(value), (addr))
-#define roce_get_field(origin, mask, shift) \
- (((le32_to_cpu(origin)) & (mask)) >> (shift))
+#define roce_get_field(origin, mask, shift) \
+ (((le32_to_cpu(origin) & (mask)) >> (shift)) + \
+ (BUILD_BUG_ON_ZERO(!__same_type(__le32, (origin)))))
#define roce_get_bit(origin, shift) \
roce_get_field((origin), (1ul << (shift)), (shift))
-#define roce_set_field(origin, mask, shift, val) \
- do { \
- (origin) &= ~cpu_to_le32(mask); \
- (origin) |= cpu_to_le32(((u32)(val) << (shift)) & (mask)); \
+#define roce_set_field(origin, mask, shift, val) \
+ do { \
+ BUILD_BUG_ON(!__same_type(__le32, (origin))); \
+ (origin) &= ~cpu_to_le32(mask); \
+ (origin) |= cpu_to_le32(((u32)(val) << (shift)) & (mask)); \
} while (0)
#define roce_set_bit(origin, shift, val) \
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 3/9] RDMA/hns: Add interception for resizing SRQs
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
2020-09-07 13:36 ` [PATCH for-next 1/9] RDMA/hns: Refactor process about opcode in post_send() Weihang Li
2020-09-07 13:36 ` [PATCH for-next 2/9] RDMA/hns: Add type check in get/set hw field Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 4/9] RDMA/hns: Correct typo of hns_roce_create_cq() Weihang Li
` (5 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Yangyang Li <liyangyang20@huawei.com>
HIP08 doesn't support modifying the maximum number of outstanding WR in an
SRQ. However, the driver does not return a failure message, and users may
mistakenly think that the resizing is executed successfully. So the driver
needs to intercept this operation.
Signed-off-by: Yangyang Li <liyangyang20@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 9a9639b..4a88d41 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -5044,6 +5044,10 @@ static int hns_roce_v2_modify_srq(struct ib_srq *ibsrq,
struct hns_roce_cmd_mailbox *mailbox;
int ret;
+ /* Resizing SRQs is not supported yet */
+ if (srq_attr_mask & IB_SRQ_MAX_WR)
+ return -EINVAL;
+
if (srq_attr_mask & IB_SRQ_LIMIT) {
if (srq_attr->srq_limit >= srq->wqe_cnt)
return -EINVAL;
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 4/9] RDMA/hns: Correct typo of hns_roce_create_cq()
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
` (2 preceding siblings ...)
2020-09-07 13:36 ` [PATCH for-next 3/9] RDMA/hns: Add interception for resizing SRQs Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 5/9] RDMA/hns: Add check for the validity of sl configuration Weihang Li
` (4 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Lang Cheng <chenglang@huawei.com>
Change "initialze" to "initialize".
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_cq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_cq.c b/drivers/infiniband/hw/hns/hns_roce_cq.c
index e87d616..4f4f54f 100644
--- a/drivers/infiniband/hw/hns/hns_roce_cq.c
+++ b/drivers/infiniband/hw/hns/hns_roce_cq.c
@@ -287,7 +287,7 @@ int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr,
/*
* For the QP created by kernel space, tptr value should be initialized
* to zero; For the QP created by user space, it will cause synchronous
- * problems if tptr is set to zero here, so we initialze it in user
+ * problems if tptr is set to zero here, so we initialize it in user
* space.
*/
if (!udata && hr_cq->tptr_addr)
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 5/9] RDMA/hns: Add check for the validity of sl configuration
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
` (3 preceding siblings ...)
2020-09-07 13:36 ` [PATCH for-next 4/9] RDMA/hns: Correct typo of hns_roce_create_cq() Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 6/9] RDMA/hns: Solve the overflow of the calc_pg_sz() Weihang Li
` (3 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Jiaran Zhang <zhangjiaran@huawei.com>
According to the RoCE v1 specification, the sl (service level) 0-7 are
mapped directly to priorities 0-7 respectively, sl 8-15 are reserved. The
driver should verify whether the the value of sl is larger than 7, if so,
an exception should be returned.
Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 12 ++++++++++--
drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 2 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 4a88d41..07e3e3c 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -4299,11 +4299,19 @@ static int hns_roce_v2_set_path(struct ib_qp *ibqp,
V2_QPC_BYTE_28_FL_S, 0);
memcpy(context->dgid, grh->dgid.raw, sizeof(grh->dgid.raw));
memset(qpc_mask->dgid, 0, sizeof(grh->dgid.raw));
+
+ hr_qp->sl = rdma_ah_get_sl(&attr->ah_attr);
+ if (unlikely(hr_qp->sl > MAX_SERVICE_LEVEL)) {
+ ibdev_err(ibdev,
+ "failed to fill QPC, sl (%d) shouldn't be larger than %d.\n",
+ hr_qp->sl, MAX_SERVICE_LEVEL);
+ return -EINVAL;
+ }
+
roce_set_field(context->byte_28_at_fl, V2_QPC_BYTE_28_SL_M,
- V2_QPC_BYTE_28_SL_S, rdma_ah_get_sl(&attr->ah_attr));
+ V2_QPC_BYTE_28_SL_S, hr_qp->sl);
roce_set_field(qpc_mask->byte_28_at_fl, V2_QPC_BYTE_28_SL_M,
V2_QPC_BYTE_28_SL_S, 0);
- hr_qp->sl = rdma_ah_get_sl(&attr->ah_attr);
return 0;
}
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
index ac29be4..17f35f9 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h
@@ -1941,6 +1941,8 @@ struct hns_roce_eq_context {
#define HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_S 0
#define HNS_ROCE_V2_AEQE_EVENT_QUEUE_NUM_M GENMASK(23, 0)
+#define MAX_SERVICE_LEVEL 0x7
+
struct hns_roce_wqe_atomic_seg {
__le64 fetchadd_swap_data;
__le64 cmp_data;
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 6/9] RDMA/hns: Solve the overflow of the calc_pg_sz()
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
` (4 preceding siblings ...)
2020-09-07 13:36 ` [PATCH for-next 5/9] RDMA/hns: Add check for the validity of sl configuration Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 7/9] RDMA/hns: Fix the wrong value of rnr_retry when querying qp Weihang Li
` (2 subsequent siblings)
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Jiaran Zhang <zhangjiaran@huawei.com>
calc_pg_sz() may gets a data calculation overflow if the PAGE_SIZE is 64 KB
and hop_num is 2. It is because that all variables involved in calculation
are defined in type of int. So change the type of bt_chunk_size,
buf_chunk_size and obj_per_chunk_default to u64.
Fixes: ba6bb7e97421 ("RDMA/hns: Add interfaces to get pf capabilities from firmware")
Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 07e3e3c..8690151 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -1801,9 +1801,9 @@ static void calc_pg_sz(int obj_num, int obj_size, int hop_num, int ctx_bt_num,
int *buf_page_size, int *bt_page_size, u32 hem_type)
{
u64 obj_per_chunk;
- int bt_chunk_size = 1 << PAGE_SHIFT;
- int buf_chunk_size = 1 << PAGE_SHIFT;
- int obj_per_chunk_default = buf_chunk_size / obj_size;
+ u64 bt_chunk_size = 1 << PAGE_SHIFT;
+ u64 buf_chunk_size = 1 << PAGE_SHIFT;
+ u64 obj_per_chunk_default = buf_chunk_size / obj_size;
*buf_page_size = 0;
*bt_page_size = 0;
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 7/9] RDMA/hns: Fix the wrong value of rnr_retry when querying qp
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
` (5 preceding siblings ...)
2020-09-07 13:36 ` [PATCH for-next 6/9] RDMA/hns: Solve the overflow of the calc_pg_sz() Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 8/9] RDMA/hns: Fix configuration of ack_req_freq in QPC Weihang Li
2020-09-07 13:36 ` [PATCH for-next 9/9] RDMA/hns: Fix missing sq_sig_type when querying QP Weihang Li
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
From: Wenpeng Liang <liangwenpeng@huawei.com>
The rnr_retry returned to the user is not correct, it should be got from
another fields in QPC.
Fixes: bfe860351e31 ("RDMA/hns: Fix cast from or to restricted __le32 for driver")
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 8690151..47722c3 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -4807,7 +4807,9 @@ static int hns_roce_v2_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
qp_attr->retry_cnt = roce_get_field(context.byte_212_lsn,
V2_QPC_BYTE_212_RETRY_CNT_M,
V2_QPC_BYTE_212_RETRY_CNT_S);
- qp_attr->rnr_retry = le32_to_cpu(context.rq_rnr_timer);
+ qp_attr->rnr_retry = roce_get_field(context.byte_244_rnr_rxack,
+ V2_QPC_BYTE_244_RNR_CNT_M,
+ V2_QPC_BYTE_244_RNR_CNT_S);
done:
qp_attr->cur_qp_state = qp_attr->qp_state;
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 8/9] RDMA/hns: Fix configuration of ack_req_freq in QPC
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
` (6 preceding siblings ...)
2020-09-07 13:36 ` [PATCH for-next 7/9] RDMA/hns: Fix the wrong value of rnr_retry when querying qp Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
2020-09-07 13:36 ` [PATCH for-next 9/9] RDMA/hns: Fix missing sq_sig_type when querying QP Weihang Li
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
The hardware will add AckReq flag in BTH header according to the value of
ack_req_freq to request ACK from responder for the packets with this flag.
It should be greater than or equal to lp_pktn_ini instead of using a fixed
value.
Fixes: 7b9bd73ed13d ("RDMA/hns: Fix wrong assignment of lp_pktn_ini in QPC")
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 47722c3..f324a6b 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -3672,9 +3672,6 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp,
V2_QPC_BYTE_76_SRQ_EN_S, 1);
}
- roce_set_field(context->byte_172_sq_psn, V2_QPC_BYTE_172_ACK_REQ_FREQ_M,
- V2_QPC_BYTE_172_ACK_REQ_FREQ_S, 4);
-
roce_set_bit(context->byte_172_sq_psn, V2_QPC_BYTE_172_FRE_S, 1);
hr_qp->access_flags = attr->qp_access_flags;
@@ -3985,6 +3982,7 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp,
dma_addr_t trrl_ba;
dma_addr_t irrl_ba;
enum ib_mtu mtu;
+ u8 lp_pktn_ini;
u8 port_num;
u64 *mtts;
u8 *dmac;
@@ -4092,13 +4090,21 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp,
}
#define MAX_LP_MSG_LEN 65536
- /* MTU*(2^LP_PKTN_INI) shouldn't be bigger than 64kb */
+ /* MTU * (2 ^ LP_PKTN_INI) shouldn't be bigger than 64KB */
+ lp_pktn_ini = ilog2(MAX_LP_MSG_LEN / ib_mtu_enum_to_int(mtu));
+
roce_set_field(context->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,
- V2_QPC_BYTE_56_LP_PKTN_INI_S,
- ilog2(MAX_LP_MSG_LEN / ib_mtu_enum_to_int(mtu)));
+ V2_QPC_BYTE_56_LP_PKTN_INI_S, lp_pktn_ini);
roce_set_field(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,
V2_QPC_BYTE_56_LP_PKTN_INI_S, 0);
+ /* ACK_REQ_FREQ should be larger than or equal to LP_PKTN_INI */
+ roce_set_field(context->byte_172_sq_psn, V2_QPC_BYTE_172_ACK_REQ_FREQ_M,
+ V2_QPC_BYTE_172_ACK_REQ_FREQ_S, lp_pktn_ini);
+ roce_set_field(qpc_mask->byte_172_sq_psn,
+ V2_QPC_BYTE_172_ACK_REQ_FREQ_M,
+ V2_QPC_BYTE_172_ACK_REQ_FREQ_S, 0);
+
roce_set_bit(qpc_mask->byte_108_rx_reqepsn,
V2_QPC_BYTE_108_RX_REQ_PSN_ERR_S, 0);
roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M,
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH for-next 9/9] RDMA/hns: Fix missing sq_sig_type when querying QP
2020-09-07 13:36 [PATCH for-next 0/9] RDMA/hns: Misc Updates Weihang Li
` (7 preceding siblings ...)
2020-09-07 13:36 ` [PATCH for-next 8/9] RDMA/hns: Fix configuration of ack_req_freq in QPC Weihang Li
@ 2020-09-07 13:36 ` Weihang Li
8 siblings, 0 replies; 12+ messages in thread
From: Weihang Li @ 2020-09-07 13:36 UTC (permalink / raw)
To: dledford, jgg; +Cc: leon, linux-rdma, linuxarm
The sq_sig_type field should be filled when querying QP, or the users may
get a wrong value.
Fixes: 926a01dc000d ("RDMA/hns: Add QP operations support for hip08 SoC")
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index f324a6b..0bc67e3 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -4831,6 +4831,7 @@ static int hns_roce_v2_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr,
}
qp_init_attr->cap = qp_attr->cap;
+ qp_init_attr->sq_sig_type = hr_qp->sq_signal_bits;
out:
mutex_unlock(&hr_qp->mutex);
--
2.8.1
^ permalink raw reply related [flat|nested] 12+ messages in thread